US 5357632

I'll search for this specific patent number and check for any 2026 CAFC docket activity.

Let me run a couple more targeted searches to confirm whether there is any 2026 litigation activity.

Search results note

Before the summary, one important caveat on the "search USPTO / CAFC 2026 dockets" part of the request:

• I ran targeted web searches for the patent number and for CAFC/2026 litigation tied to it. I found no evidence of any 2026 Federal Circuit docket, appeal, IPR, or district-court action involving US 5,357,632. I cannot directly query the CAFC docket system or PACER from here, so treat this as "nothing surfaced in search," not as an authoritative negative.
• One search returned a numeric hit on "5357632" — it was a health-plan "Site Code" (a medical office in Alpine, CA) in a provider directory, unrelated to the patent. Do not confuse the two.
• The bulk of the following is grounded in the full patent text provided in the user message, which I treat as authoritative over other sources.

Bibliographic data for US 5,357,632

Abstract (verbatim substance)

A plurality of control processors distribute data to be processed to a corresponding plurality of arithmetic processors using a dynamic allocation arrangement. The arithmetic processors process blocks of information and communicate processed blocks to the control processors for subsequent processing as necessary. The control processors efficiently allocate tasks to the arithmetic processors and partition blocks of data for allocation as separate partitioned tasks. Partitioning reduces the delay until results are available by spreading a task across multiple arithmetic processors, and improves utilization of processing resources by assigning tasks to whichever processors are available.

Plain-language overview of the independent claim

Claim 1 — the only independent claim — defines a distributed data-flow signal-processing network that balances processing load across nodes. In plain terms it requires:

1. A set of distributed control processors (DCPs). Each has a CPU, a data memory, and a program memory that includes a queue. One of these control processors also acts as a supervisory control processor; it holds additional queues, one per DCP in the network (i.e., "number of DCPs + one" queues as described in the spec).
2. A first communication link connecting the DCPs to each other, for passing control messages.
3. A set of distributed arithmetic processors (DAPs). Each has a CPU and a data memory, and each is paired with a respective DCP to form a processing node.
4. A second communication link between each DCP and its paired DAP, carrying control messages and data blocks.
5. A third communication link — a data bus — interconnecting the DAPs for high-speed data-block transfer.
6. Task ownership. Each DCP is assigned one or more types of the signal-processing primitive tasks (e.g., FFT, FIR filter), giving it processing control over those tasks, and its paired arithmetic processor gets preference for executing them.
7. Overflow / load-balancing mechanism. Each DCP includes means for monitoring the number of primitive tasks in its program-memory queue destined for its arithmetic processor, and for transferring processing control over selected tasks to the supervisory control processor when that number exceeds a predetermined limit.
8. Supervisory redistribution. The supervisory control processor monitors how many processing tasks each node must perform and causes the transferred tasks to be executed by selected nodes, to allocate/redistribute the processing load across the distributed arithmetic processors.

Dependent claims (2–6) add: control by the supervisory processor over coupling needed input data blocks from whichever node holds them (claim 2); the supervisory processor's per-DCP queues storing information about tasks sent by the respective DCPs (claims 3, 5); and those queues storing task-identification and associated input-data-block information (claims 4, 6 — claim 6 depending from claim 5).

Key technical context from the specification (for the record)

• Three distinct communication paths: DCP↔DCP control messages (lines 118); DCP↔its DAP (lines 116, control and bulk data); DAP↔DAP over the data bus (120).
• Tasks are dispatched in data-flow fashion — dispatched once enough input data exists on all inputs; a task may be dispatched multiple times on different input segments for asynchronous execution on multiple arithmetic processors.
• Owner preference + offsetting: the owner's arithmetic processor is preferred, but execution can fall to any DAP; the supervisory processor coordinates off-node dispatch to remove the control bottleneck.
• The spec notes the supervisory function may be physically implemented inside one of the distributed control processors rather than as a separate unit.
• Ready-task-entry overflow to the supervisor happens for two reasons: system peak load, and a few DCPs being overloaded while other nodes idle (in which case a task executes on a non-preferred processor, trading extra data movement for dynamic load balancing).

Relevant prior art cited on the face of the patent

US 4,356,546 (Bendix, fault-tolerant multi-computer); US 4,403,286 (IBM, balancing data-processing workloads); US 4,414,624 (US Navy, multiple-microcomputer processing); US 4,692,860 (Ericsson, load regulation); US 4,736,318 (Wang, tunable OS); US 4,805,107 (Allied-Signal, task scheduler for fault-tolerant multi-node system); US 4,839,798 (Hitachi, job transfer between computer systems); US 5,031,089 (NASA, dynamic resource allocation for distributed heterogeneous systems); US 5,099,418 (Hughes Aircraft, distributed data-driven process); US 5,107,420 (Hitachi, synchronous apparatus for processors). Also cited in the specification: Pian et al., "Signal Processing Through Macro Data Flow Architecture," 1985 NAECON Proceedings.

Confidence and uncertainty

• High confidence on title, inventors, assignee chain, filing/issue/priority dates, claim count, and claim 1's scope — all taken from the authoritative patent text supplied.
• Low confidence / negative finding only on litigation: no 2026 CAFC or other litigation activity for this patent appeared in my searches. I did not perform an authoritative docket query, so this should be verified directly in the CAFC docket and PACER if a definitive litigation status is required. The patent is also expired (2011), which reduces the likelihood of active enforcement litigation.

I'll search for litigation involving US patent 5357632 across the sources you specified.

Let me search more targeted sources for this specific patent.

Litigation Search Report — U.S. Patent No. 5,357,632

Status of my search: I found no litigation involving U.S. Patent No. 5,357,632.

What I searched

I ran multiple targeted web searches, including:

• 5357632 patent litigation
• US patent 5357632 lawsuit case number
• "5,357,632" patent infringement lawsuit
• "5357632" Hughes Aircraft patent litigation district court
• unifiedpatents.com litigation "5357632"
• docketalarm patent 5357632 (and related queries)

I was unable to complete direct docket lookups against the Unified Patents litigation portal, PACER, or the CAFC docket because I exhausted my allotted search steps. Accordingly, this should be treated as a negative result from web-level searching, not as a definitive certification that no case has ever been filed.

Result

No infringement suits, declaratory judgment actions, ITC investigations, or PTAB proceedings involving U.S. Patent No. 5,357,632 were identified.

I did not locate any record of:

• a plaintiff asserting the '632 patent,
• a defendant accused of infringing it,
• an IPR/PGR/CBM petition against it, or
• a CAFC appeal involving it.

Because no case exists in the results, I cannot supply the requested per-case fields (plaintiff(s), defendant(s), jurisdiction, case number, filing date, outcome/status).

False positives I excluded (do not confuse these with the '632 patent)

Per your strict instruction not to auto-correct identifiers, I note the near-matches that appeared in results and confirm they are unrelated:

Patent background (for context, from the authoritative patent text)

• Patent: US 5,357,632 A — "Dynamic task allocation in a multi-processor system employing distributed control processors and distributed arithmetic processors"
• Inventors: Chao-Kuang Pian; Hans L. Habereder
• Application: US 07/742,781, filed 1991-08-08; priority 1990-01-09 (CIP of Ser. No. 07/462,250, filed 1990-01-09, now abandoned)
• Publication date: 1994-10-18
• Original assignee: Hughes Aircraft Company; current/listed assignee: Raytheon Co (via HE Holdings, Inc., d/b/a Hughes Electronics)
• Legal status: Expired – Lifetime; anticipated expiration 2011-10-18

The patent expired in 2011, which is consistent with — though not proof of — the absence of recent enforcement activity. Its value in litigation would have been limited to past damages during its in-force term, and no such case surfaced.

Recommendation for a definitive answer

If you need a certified negative, the following should be checked directly (I could not complete these):

1. Unified Patents litigation caselist — https://portal.unifiedpatents.com/litigation/caselist (free; search by patent number).
2. PACER / Docket Alarm / RPX Insight — full docket search for "5,357,632" across all district courts.
3. USPTO PTAB (https://ptacts.uspto.gov) — for any IPR/PGR against the '632 patent.
4. CAFC docket — for any appeal naming the patent.
5. Lex Machina / Westlaw / Bloomberg Law — the most reliable single-source patent-litigation databases.

If you can tell me which of these databases you have access to, I can draft the exact search strings, or you can run the queries and I will help interpret the outputs. I will not represent that no litigation exists until at least one authoritative full-docket source has been checked.

I'll verify the canonical "no PTAB activity" signal against web sources before writing the report.

Search verification note

Before the report, the two things I checked and one thing I could not check:

• The structured "PTAB proceedings on file" block is the canonical source and it states the USPTO ODP API returns no AIA trial proceedings for US 5,357,632. That is the default finding.
• Two targeted web searches for "5,357,632" IPR petition PTAB and "5357632" patent inter partes review surfaced no petition, institution decision, FWD, or appeal referencing this patent. The only numeric hits on "5357632" were unrelated: JP 5357632 B2, a Kaneka "Photoelectric conversion device" Japanese patent (different jurisdiction, different subject matter entirely), and a 2013 Justia citation-table mention of "5357632 | October 1994 | Pian et al." in the prosecution history of an unrelated IBM patent.
• I could not run an authoritative query against PTAB E2E or CourtListener from here, so this is "nothing surfaced," not a certified negative. Verify at PTAB E2E and CourtListener if a definitive record is required.

Proceedings overview

Total AIA trial proceedings on file: 0. No IPRs, no PGRs, no CBM reviews — zero active, zero claims invalidated, zero sustained, zero settled, zero institution denials. Defensive posture: the patent is "untested, not hardened." A defendant facing assertion has no PTAB record to lean on — no FWD invalidating claim 1, no claim-level estoppel findings, no roadmap. Equally, there is no adverse PTAB history suggesting the claims are robust. The absence of any challenge is best explained by commercial irrelevance, not claim strength: the patent issued 1994-10-18 on 1990-era technology and its term expired 2011-10-18, so by the time IPR became available on 2012-09-16 the patent was already dead. Nothing has prompted anyone to spend six figures challenging a lapsed patent.

No proceedings to enumerate

There are no proceeding numbers to list. Per the constraint not to invent proceeding numbers, I am not populating the per-proceeding template with placeholders.

Strategic summary

Claim status of US 5,357,632. All six claims — claim 1 (sole independent) and dependent claims 2, 3, 4, 5, 6 — stand as issued. Nothing is canceled, nothing is confirmed by any adjudicative body, and nothing is formally "tested" in the way an IPR FWD would establish. The only validity-event history is ex parte: prosecution over the ten references cited on the face of the patent (Bendix US 4,356,546; IBM US 4,403,286; Navy US 4,414,624; Ericsson US 4,692,860; Wang US 4,736,318; Allied-Signal US 4,805,107; Hitachi US 4,839,798; NASA US 5,031,089; Hughes US 5,099,418; Hitachi US 5,107,420) plus the Pian et al. 1985 NAECON paper cited in the specification. None of that is a PTAB record of adjudicated validity.

Estoppel landscape — the more important point. Because no IPR was ever instituted, § 315(e)(2) estoppel is a null set against this patent. No petitioner, privy, or real party in interest is barred from raising any § 102/§ 103 ground it raised or reasonably could have raised. A current defendant therefore has an entirely open art field: it may file an IPR on claims 1–6 on any patents/printed publications, or run the same art in district court, without the serial-petition and estoppel complications that dominate most modern PTAB practice. Note only that IPR is unavailable against pre-AIA claim amendments, and PGR was never available here in any event: the effective filing date (priority 1990-01-09; CIP filed 1991-08-08) predates the AIA's 2013-03-16 PGR threshold by more than two decades. CBM is also off the table — this is a distributed data-flow signal-processing architecture (FFT, FIR primitives) with no financial-services nexus, and CBM sunset for new petitions in 2020.

Pattern signals. None. There is no repeat petitioner, no patent-owner appeal strategy, and no defensive aggregator (Unified Patents or similar) anywhere in the chain. The patent's ownership history is corporate and passive: Hughes Aircraft Co. → HE Holdings, Inc. (change of name) → Raytheon Company (merger, recorded 2004-12-21). No assignment to an NPE or monetization vehicle appears in the structured record. That, combined with expiration on 2011-10-18, means the absence of PTAB activity is a reliable signal of dormancy rather than a hidden validity moat. (Consistent with this, and as noted in the earlier section of this analysis, no 2026 CAFC or district-court activity tied to this patent surfaced — again a search-based negative, not a docket-certified one.)

Recommended next steps

1. If you are a defendant being asserted against: confirm the assertion date against the expiration date of 2011-10-18. A patent expired more than a decade ago cannot support infringement liability for post-expiration conduct, and pre-expiration damages windows are almost certainly time-barred under 35 U.S.C. § 286. Before building any invalidity case, verify whether you are dealing with this patent at all versus a family member, reissue, or continuation.
2. If you do need invalidity: you are unconstrained by PTAB estoppel. The face-of-patent art listed above is the natural starting set, and the specification's own cited Pian et al., "Signal Processing Through Macro Data Flow Architecture," 1985 NAECON Proceedings is a self-identified admission of prior art that a petitioner could weaponize. But weigh cost — the patent is expired, so the priority is a quick § 286 / expiration disposition, not an IPR.
3. Verification, since the default finding is a negative: the ODP ingest could in principle miss a very old or recently filed case. Confirm at PTAB E2E (search by patent number 5,357,632) and cross-check appeals at CourtListener and the CAFC docket. The patent's Google Patents page patents.google.com/patent/US5357632A/en shows no "PTAB Proceedings" or "Litigation" tab entries as fetched 2026-09-24, corroborating the zero count.
4. Do not confuse this patent with JP 5357632. Searches on the bare numeral return a Japanese Kaneka photoelectric-conversion patent. Different number space, different technology, different owner.

Confidence: High that no AIA trial proceeding exists on US 5,357,632 — the structured ODP block says so and independent searches corroborate. High on the legal impossibility of PGR and the practical unavailability of CBM. Medium-high on the completeness of the negative, limited only by my inability to run an authoritative PTAB E2E / CourtListener docket query from this environment.

I'll research the assignment record for US 5,357,632. Let me run targeted searches.

I completed my searches but exhausted my allotted search steps before I could run an interactive Patent Assignment Center query. Below is the reconstructed chain, with sources and confidence flagged precisely.

Assignment / Ownership Analysis — U.S. Patent No. 5,357,632

Important sourcing note: Google Patents' "Reassignment" legal-events table for US 5,357,632 (from the authoritative text in the user message) exposes the events and parties but not the reel/frame numbers. I located Hughes-portfolio reel/frame data through EPO INPADOC legal-status records for a sibling Hughes patent (US 5,410,436), which shares the same two corporate-succession documents. I could not open the USPTO Assignment Center record for the '632 patent itself before my search steps ran out. Where I am using the sibling patent's reel/frame, I say so explicitly and mark it as needing per-patent confirmation. I did not fabricate any reel/frame, correspondent, or date. Correspondents of record could not be retrieved for any link.

Inventors

• The application is a continuation-in-part of Ser. No. 07/462,250, filed 1990-01-09 (now abandoned); the '632 CIP itself was filed 1991-08-08.
• Unusual-pattern check: No evidence of inventors departing the original assignee within 12 months of filing. The portfolio stayed inside Hughes for years (see chain below), so the "pre-fire-sale inventor exodus" pattern is not present. I could not independently verify either inventor's post-filing employment history (steps exhausted) — treat as unclear, not a negative.

Original assignee

• Hughes Aircraft Company (a Delaware corporation per the Google Patents reassignment text: "HUGHES AIRCRAFT COMPANY, A CORPORATION OF THE STATE OF DELAWARE").
• Primary line of business: aerospace and defense electronics — the technical subject matter here (distributed data-flow signal processing, FFT/FIR pipelines, multiprocessor task allocation) is consistent with Hughes' radar/avionics work.
• Product embodying the claims? Not determinable from the record. This is an architecture/control-method patent; no product commercialization evidence surfaced. No assertion or licensing activity surfaced.
• Current status: Hughes Aircraft Company no longer exists as an independent entity. Its defense business was absorbed by Raytheon (1997 acquisition); the name was changed to HE Holdings, Inc. in 1995, and HE Holdings merged into Raytheon Company. Raytheon (now RTX Corporation) is a large, publicly traded, operating defense contractor.

Assignment timeline

Reel/frame below for the two Hughes-wide succession documents is sourced from EPO INPADOC legal status for US 5,410,436 (a sibling Hughes patent carrying the same succession records). Confirm the identical reels against the '632 record in Assignment Center. Event dates vs. recordation dates differ between Google Patents and INPADOC — flagged.

1) 1991-08-08 (filing date; execution date not exposed) / recorded 1991-10-15

• Reel not retrieved (Assignment Center not reached)
• Conveyance: Assignment ("ASSIGNMENT OF ASSIGNORS INTEREST")
• Assignor: Chao-Kuang Pian; Hans L. Habereder
• Assignee: Hughes Aircraft Company (Delaware corporation)
• Correspondent: not retrievable
• Context: initial employee-invention assignment vesting title in the employer; includes rights to the CIP and its 1990 parent.

2) Executed 1995-12-08 / recorded 1999-03-03 — Reel 009798/0610 (per INPADOC on US 5,410,436)

• Conveyance: Change of Name
• Assignor: Hughes Aircraft Company
• Assignee: HE Holdings, Inc. (Delaware corporation; d/b/a Hughes Electronics)
• Correspondent: not retrievable
• Context: internal corporate renaming only — no change in beneficial ownership, no consideration transfer.

3) Effective 1997-12-17 / recorded 1999-03-03 — Reel 009790/0503 (per INPADOC on US 5,410,436)

• Conveyance: Merger
• Assignor: HE Holdings, Inc. (d/b/a Hughes Electronics)
• Assignee: Raytheon Company (Massachusetts)
• Correspondent: not retrievable
• Context: successor-by-merger recording flowing from Raytheon's 1997 acquisition of the Hughes defense business.

Discrepancy to flag: Google Patents' legal-events table dates both of the above reassignment events to 2004-12-21, whereas EPO INPADOC shows the event dates 1995-12-08 / 1997-12-17 and a 1999-03-03 recordation. The most likely explanation is a later re-recordation batch in 2004 (Hughes' portfolio was recorded in waves), but this is unconfirmed and should be verified against the actual reel/frame dates in Assignment Center. Either way, the legal effect is identical (name change, then merger into Raytheon).

Post-issuance: No further assignments found. The patent expired for failure to reach full term on 2011-10-18 ("Expired – Lifetime" per Google Patents — denoting full statutory term, not a fee lapse). No transfer to any third party, LLC, or aggregator appears in any record I could reach.

Timeline diagram

timeline
    title Ownership of US 5357632
    1990 : Priority date 9 January 1990
    1991 : CIP filed 8 August 1991
         : Inventors assign to Hughes Aircraft
    1994 : Patent issued 18 October 1994
    1995 : Hughes Aircraft renamed HE Holdings
    1997 : HE Holdings merged into Raytheon
    1999 : Merger recorded at USPTO
    2004 : Google Patents shows reassignment batch
    2011 : Patent expired 18 October 2011

NPE / troll-pattern signals

1. Shell-entity transfer — NOT PRESENT. The only post-inventor transferees are HE Holdings, Inc. (a genuine name-changed corporate parent, recorded 1999-03-03 at reel 009798/0610) and Raytheon Company (reel 009790/0503). Neither is a licensing-only vehicle; there is no "IP/Licensing/Ventures" suffix, no registered-agent address, and no single-purpose LLC.

2. Known asserter in the chain — NOT PRESENT. Assignees are Hughes Aircraft Co. → HE Holdings, Inc. → Raytheon Company. None matches Acacia, Marathon, Intellectual Ventures, IPNav, Wi-LAN, Converso/Mosaid, Vringo, Pendrell, Innovatio, MPHJ, Round Rock, Erich Spangenberg entities, or any Unified/RPX high-frequency plaintiff. (Consistent with the earlier litigation section, which found no assertion.)

3. Repeat correspondent across the chain — UNCLEAR. Correspondents of record were not retrievable from the sources I could reach, so the recurrence test cannot be run. A single corporate-succession chain (employer → parent → successor-by-merger) rarely shows the recurring-NPE-counsel tell in any event.

4. Cascading transfers — NOT PRESENT. Two succession events over ~2 years (1995 rename; 1997 merger), not a chain of short-interval LLC hops. No shared registered-agent addresses, no common principals among unrelated-sounding LLCs.

5. Pre-litigation transfer — NOT PRESENT. No infringement suit naming this patent was identified (see the earlier Litigation section), so there is no transfer dated within 6 months of a suit. The patent is also expired (2011), further foreclosing recent assertion.

6. Bankruptcy fire-sale — NOT PRESENT. No Chapter 7/11 of Hughes Aircraft, HE Holdings, or Raytheon. The 1997 transfer was a strategic acquisition (Raytheon buying Hughes' defense business), not a distressed sale.

7. Privateering — NOT PRESENT. No NPE is asserting on Raytheon's behalf, and no SEC or press coverage surfaced suggesting a Raytheon-funded assertion vehicle tied to this patent.

8. Defensive aggregator (anti-NPE) — NOT PRESENT. The chain terminates at Raytheon, an operating company, not at RPX, AST, LOT Network, Unified Patents, or OIN. No evidence the patent was acquired for defensive neutralization.

Verdict

Defensive / non-asserting — with an explicit caveat on taxonomy.

No NPE signal is present: the chain is a pure corporate-succession record — inventors → Hughes Aircraft Company (1991-10-15) → HE Holdings, Inc. via change of name (reel 009798/0610) → Raytheon Company via merger (reel 009790/0503) — with no licensing LLC, no known asserter, no cascading transfers, no bankruptcy, and no lawsuit, and the patent expired 2011-10-18. Caveat: the enumerated verdict list has no bucket for "non-asserting operating company"; of the five options, "Defensive / non-asserting" matches on the operative element (non-asserting), even though the terminating entity is an operating defense contractor (Raytheon) rather than a defensive aggregator. If the taxonomy strictly requires an aggregator for that label, the honest classification is "not an NPE — operating-company ownership, never asserted," which is the substantive finding here.

Verification link: USPTO Patent Assignment Search (search patent number 5357632) — https://assignmentcenter.uspto.gov/ ; mirrored at https://assignment.uspto.gov/patent/index.html

Open items I could not close (steps exhausted): (a) the exact reel/frame and execution/recordation dates on the '632 record itself (I relied on INPADOC for the sibling Hughes patent US 5,410,436); (b) corresponsdents of record for all three links; (c) whether the 2004-12-21 Google Patents dates reflect a re-recordation batch. All three are easily resolved with a direct Assignment Center lookup by patent number.

I'll verify the patent and its cited references against live sources before analyzing.

Let me verify the remaining cited references so I describe them accurately.

Prior-Art Analysis — U.S. Patent No. 5,357,632

Patent under analysis: US 5,357,632 A, "Dynamic task allocation in a multi-processor system employing distributed control processors and distributed arithmetic processors"
Inventors: Chao-Kuang Pian; Hans L. Habereder · App. 07/742,781 filed 1991-08-08 · Priority 1990-01-09 (CIP of Ser. No. 07/462,250) · Issued 1994-10-18 · Original assignee Hughes Aircraft Co.; recorded assignee Raytheon Co. · Expired – Lifetime (2011-10-18)
Source verified: https://patents.google.com/patent/[US5357632A](/patent/US5357632A)/en

Date/identifier caveats, stated up front (per your strict rules):

• I did not auto-correct any ID. Where sources disagree on a date, I flag it rather than silently picking one.
• The supplied full patent text lists US 5,357,632 with priority date 1990-01-09; the Unified Patents page returned by search lists 1990-01-08. Discrepancy flagged, not resolved.
• US 5,031,089 appears as filed 1988-12-30 in the patent text and on Google Patents, but with priority date 1988-12-29 on the Unified Patents page. Discrepancy flagged.
• The specification spells the NPL author as "Plan et al." in one passage while the same article is otherwise the "Signal Processing Through Macro Data Flow Architecture" NAECON paper by Pian et al. I treat this as an OCR artifact in the source text but am not silently correcting it.
• Task date inconsistency: the current task states the date as April 26, 2026; my system date is 2026-09-30. I flag this rather than assume which is correct.
• I exhausted my search budget before independently verifying three references (US 4,692,860; US 4,736,318; US 5,107,420). For those, my description is limited to what the patent's own citation table states (title, assignee, dates), and I mark them unverified.

1. Threshold point that governs the whole answer

All six claims are structurally tied to claim 1. Claim 1 is the only independent claim; claims 2, 3, 4 depend directly from claim 1, and claim 5 depends from claim 2, claim 6 from claim 5 (verified from the claim set in the supplied text). Consequently:

A reference can only "anticipate" a dependent claim 2–6 if it first anticipates every limitation of claim 1. Under 35 U.S.C. § 102, a dependent claim includes all limitations of the claim(s) from which it depends. So if no reference anticipates claim 1, no reference anticipates claims 2–6.

This is why the table below resolves almost every row to "no claim anticipated," while still identifying which elements each reference reads on. That distinction is the useful output here.

Claim 1 decomposed into elements (my shorthand, used throughout)

2. Face-of-the-patent patent citations — full citation, dates, description, § 102 mapping

The following ten references appear in the "Patent Citations (10)" table of US 5,357,632 (all marked cited by examiner in the source). Dates are as given in the patent's citation table unless noted.

3. Element-by-element § 102 analysis of the strongest candidates

I ran claim 1 element-by-element against the four references that come closest. Because § 102 requires every limitation in a single reference (no combining, absent a § 103 analysis), each candidate fails.

A. US 4,805,107 (Allied-Signal) — best structural match, wrong trigger

Conclusion: US 4,805,107 does not anticipate claim 1 (and thus not claims 2–6). Its value is as the primary § 103 reference for the node architecture, tri-partitioned functionality, and per-node task allocation.

B. US 5,031,089 (NASA) — best match on the load-balancing mechanism

• Reads on E8/E9 well: "local queue length" as the workload indicator; transfer of queued jobs from nodes over a high threshold to idle/less-busy nodes; and it expressly describes the centralized control computer with task lists alternative that the '632's supervisory processor resembles.
• Fails E4/E5/E6/E7: its nodes are general-purpose heterogeneous computers on a network, not control-processor/arithmetic-processor pairs with a private control+data link and a separate arithmetic-processor data bus; and there is no notion of task-type ownership with executor preference.
• § 102 status: available only under § 102(e) (application filed 1988-12-30 < 1990-01-09 priority; granted 1991-07-09).

Conclusion: no anticipation of any claim; exceptionally strong § 103 reference for E8/E9.

C. US 5,099,418 (Hughes / Pian) — same inventor, different architecture

• Reads on: a node = control processor + local processor with local memory (E1/E4/E5 analogue), and data-driven dispatch on input readiness — the '632's core scheduling philosophy.
• Fails: uses a global memory with produce/consume messages rather than a DAP-to-DAP data bus (E6); no supervisory control processor with N per-DCP queues (E2); no queue-overflow transfer above a predetermined limit (E8).
• Anomaly worth flagging: this reference shares an inventor (Chao-Kuang Pian) and assignee (Hughes Aircraft) with the '632 and was filed ~5 months after the '632's priority date. It therefore functions less like third-party prior art and more like a related, commonly-owned application, and its availability as § 102(e) art turns on whether any given '632 claim limitation is supported in the 1990-01-09 parent. It appears on the face of the '632 as an examiner citation, so I report it as such, but I would not treat it as clean § 102 art.

D. US 4,414,624 (U.S. Navy) — best match on task-assignment philosophy

• Reads on: designated control processor with a dedicated control bus (E1/E3 analogue); program partitioned into tasks assigned to processors so as to minimize interprocessor communication — the same design intent expressed in the '632 spec for assigning connected task clusters to one owner.
• Fails: MIMD microcomputers with global/local shared memory, not DCP/DAP pairs; no supervisor-with-per-DCP-queues; no DAP data bus; no threshold-based overflow transfer of task control.
• § 102(b) art.

4. Non-patent literature cited in the specification

5. Bottom line

1. No single reference — patent or NPL — anticipates claim 1 of US 5,357,632. The combination of (a) a supervisory control processor holding one queue per distributed control processor, (b) a tri-link topology with a dedicated DAP-to-DAP data bus, (c) task-type ownership with executor preference, and (d) overflow transfer of task control to the supervisor when a local queue exceeds a predetermined limit, is not disclosed in any one of the ten cited references.
2. Because claim 1 is the sole independent claim and claims 2–6 all depend from it, no cited reference anticipates claims 2–6 either.
3. The references do provide individual § 102 elements, and several are strong § 103 fodder:
   • US 4,805,107 + US 5,031,089 is the combination I would expect an examiner or challenger to press: the former supplies the control-processor/execution-processor node architecture, inter-node control links, and per-node task scheduling with preference; the latter supplies queue-length-based, threshold-triggered transfer of pending work to relieve a busy node, plus the centralized-dispatcher teaching that maps onto the supervisory processor.
   • Add US 4,403,286 or US 4,839,798 for the generic "move work from a busy processor to an idle one" teaching, and US 4,414,624 for "assign tasks to processors to minimize interprocessor communication."
   • The genuine non-obviousness question in 1991 would have been the supervisor-with-per-DCP-queue overflow mechanism and the tri-link topology (especially the separate arithmetic-processor data bus) — neither of which any cited reference teaches.
4. Scope/limitation of this analysis: this is a § 102 mapping against the ten citations on the face of the patent plus the three NPL items in the specification, using the claim text as supplied. It is not a full validity opinion: I did not run a comprehensive prior-art search beyond the patent's own citation set (e.g., EP 0 234 803, "Method for the dynamic partitioning of parallel processors," surfaced incidentally and is a plausible additional § 102(b)/§ 102(a) reference worth checking).

Verification status / uncertainty ledger

• High confidence: the ten patent citations, their titles, assignees and the dates as printed in the '632 citation table; the claim set and dependencies; the content quoted for US 4,805,107, US 4,414,624, US 5,031,089 and US 5,099,418 (verified against Google Patents / Justia / uspto.report / USPTO-hosted PDFs during this session).
• Low confidence / unverified: the disclosures of US 4,692,860, US 4,736,318 and US 5,107,420 — I could not retrieve their text before my search budget ran out, so my descriptions rest on their titles and the citation table only. Do not rely on my characterizations of those three without pulling the documents.
• Flagged date discrepancies (not auto-corrected): '632 priority 1990-01-09 (patent text) vs 1990-01-08 (Unified Patents); US 5,031,089 filed 1988-12-30 (patent text/Google Patents) vs priority 1988-12-29 (Unified Patents).
• Date inconsistency in the task framing: task states April 26, 2026; system date is 2026-09-30. Noted, not resolved.
• This analysis is consistent with — and builds on — the previously generated sections, which found no litigation and no 2026 CAFC/PACER activity for US 5,357,632. Nothing I found in this prior-art pass contradicts that; the patent's Expired – Lifetime status (2011-10-18) is also consistent with it.

I'll ground this obviousness analysis in the actual prior-art references listed on the page. Let me pull details on the key references.

Now let me pull the other key references cited on the face of the patent.

Obviousness Analysis — U.S. Patent No. 5,357,632 under 35 U.S.C. § 103

Scope note / contradiction flag: This task states the current date is April 26, 2026, while the previously generated sections of this analysis were dated 2026-09-30 (with a patent-text fetch dated 2026-09-24). The contradiction is immaterial to the § 103 analysis (the patent expired 2011-10-18 regardless), but I flag it per the instruction not to silently reconcile.

Prior-art basis. Per instruction, I analyzed only the references in the Prior Art section of the page: the ten U.S. patents cited on the face of US 5,357,632, plus the printed publication the specification itself cites (Pian et al., Signal Processing Through Macro Data Flow Architecture, 1985 NAECON Proceedings). I retrieved and relied on the full text of several of these (US 5,031,089; US 5,099,418; US 4,839,798; US 4,805,107; US 4,414,624) and I flag below where I am working from title + face-of-patent characterization only. I did not rely on the "Cited By" forward-citation lists, which are not prior art against the '632.

1. Governing law and the level of ordinary skill

The '632 has an effective filing date of 1991-08-08 (CIP) with a 1990-01-09 priority claim, so pre-AIA § 103 governs. The framework is Graham v. John Deere, 383 U.S. 1 (1966), as refined by KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398 (2007): scope and content of the prior art, differences between the prior art and the claims, the PHOSITA's level of skill, and any objective indicia.

PHOSITA (as of the 1990 priority date): a person holding a B.S. in electrical engineering or computer science and roughly 3–5 years of experience in real-time multiprocessor and distributed task-scheduling systems, or an M.S. with about 2 years — comfortable with (i) data-flow/graph scheduling of signal-processing primitives, (ii) queue-based load-balancing algorithms with high/low thresholds, and (iii) bus-based multiprocessor interconnect architectures. The '632 specification reinforces that level of skill: it expressly states that "Multi-processor systems having dynamic allocation of resources in general are old in the art" and incorporates the Motorola M68000/MC68020 programmer's manuals by reference — i.e., the baseline artisan was expected to be able to implement queue/flag-based scheduling on off-the-shelf microprocessors.

2. The references, their dates, and their § 102 status

Two important caveats on US 5,099,418 (I flag these rather than burying them):

1. It is assigned to Hughes Aircraft Company and names Chao-Kuang Pian — the same inventor as the '632 — and was filed 1990-06-14, which is after the '632's 1990-01-09 parent-priority date. It therefore qualifies only under § 102(e) (i.e., only if the '632's claims are not entitled to the parent's date for the relevant subject matter), and its common ownership/inventorship raises a § 103(c)-type disqualification question. Whether pre-AIA § 103(c) reaches a patent granted in 1994 is genuinely uncertain (its effective-date provision was tied to filings on/after 1999-11-29), so I present it as a persuasive teaching aid, not a guaranteed § 103 reference. Its value in this analysis is that it is documentary evidence of what the same inventive entity treated as conventional, not that it is clean § 103 art.
2. The Pian et al. 1985 NAECON paper is the strongest self-inflicted wound: it is a § 102(b) printed publication describing "a multi-processor system" that the '632 specification itself cites as "Related art" and characterizes as providing "an overview of a multi-processor system." A challenger should obtain the paper — the applicant's own description of it as background macro-data-flow art is an admission about the state of the art.

3. Claim 1, element by element, across the prior art

Claim 1 (sole independent claim) decomposes as follows. "Primary" denotes the reference whose disclosure I would put in the lead position; "secondary" denotes the reference supplying the missing limitation.

Result of the mapping: every limitation of claim 1 appears in the cited art, and the only element not squarely met by a single reference on its face — element (C), the supervisory control processor with N per-node queues — is supplied by '107's replicated global scheduling database and per-node selection queues, and is additionally supported by the § 102 reference '089's own admission that a "control computer … containing task lists" was conventional.

4. The primary combination and the motivation to combine

4.1 Primary combination

US 5,031,089 (Liu) in view of US 4,805,107 (Kieckhafer) and US 4,356,546 (Whiteside), further in view of US 4,414,624 (Summer) and US 4,839,798 (Eguchi).

• '089 supplies the load-balancing engine: per-node queues, a workload metric that is a function of the number of queued jobs, high/low thresholds, and migration of a queued task from an over-burdened node to an under-burdened node [elements A, B, I, J].
• '107 supplies the preference/ownership structure — task-to-node allocation with per-task preference vectors and per-node selection queues, plus a global replicated scheduling database [elements C, H] — and a reallocation mechanism for moving tasks when the preferred node cannot serve them [J].
• '546 supplies the node granularity: an applications processor paired with an operations controller per node [E, F].
• '624 supplies the three-link topology: a data bus strictly separate from a control bus, distributed control functions, and pre-assigned task modules [D, G, H].
• '798 supplies an explicit, threshold-parameterized job-transfer protocol as an alternative or supplement to '089's threshold gating [I], and corroborates that transferring work out of a node whose queue exceeds a limit, and into a node below a limit, was a known, routinized technique.

4.2 Why the PHOSITA would have combined these — the KSR rationales

(a) Same field, same problem, same solution shape (predictable result). '089 and '798 are directed to exactly the problem claim 1 recites in its preamble: "balanc[ing] the processing load among nodes." Both use queue-length-based thresholds and both migrate queued work from a heavy node to a light node. Substituting '798's request/accept protocol for '089's polling protocol (or running them together) is the textbook case of "a combination of familiar elements according to known methods [that] is likely to be obvious when it does no more than yield predictable results" (KSR, 550 U.S. at 416).

(b) The references themselves point toward the combination. '089's Background Art expressly describes the centralized alternative — a control computer holding task lists 20 and dynamically reassigning tasks — as the known context in which its decentralized improvement operates. A PHOSITA reading '089 is therefore already looking at both the decentralized (per-node polling) and centralized (supervisor-with-lists) options, and the natural engineering step is to hybridize: keep the decentralized ownership/dispatch of the many, and route only the overflow to the supervisor. That is precisely the '632's claimed arrangement, and the '632's own specification concedes the supervisor "may be physically part of one of the distributed control processors" — i.e., the claimed hierarchy is an implementation choice, not an architectural leap.

(c) The motivation is stated in the prior art and in the '632 itself. The '632 recites that it "removes the control bottleneck." '089 states the identical objective (decentralization "eliminates the problem of a potential single point of failure"; its background criticizes the "central dispatcher approach" as imposing "potentially high cost of obtaining the required state information"), and '107's stated object is "an architecture … in which no one Node is required to execute every one of the application tasks." Both references articulate the same design pressure — distribute control to avoid a bottleneck while preserving load balance — which is the motivation to combine.

(d) Known technique of pre-assigned "ownership" + fallback execution. '107's preference vectors and preferred sets mean a task normally executes on its preferred node but "may be executed by some other Node" during reallocation. Combined with '089's overflow migration, "give the owner's arithmetic processor preference, but let the supervisor place the overflow elsewhere" follows directly.

(e) The bus topology was routine. '624's teaching that a data bus and a control bus should be physically separate "so as not to interrupt the data flow" is exactly the '632's three-link scheme, and providing a private node-internal control/data path between a controller and its arithmetic unit ('546, '418) is ordinary modular design.

(f) "Obvious to try." Even absent an express pointer, the finite number of identified, predictable solutions to queue imbalance — (i) central dispatcher, (ii) fully decentralized polling, (iii) hybrid central overflow queue — favors a finding of obviousness under KSR's "obvious to try" rationale, especially given that the '632's specification characterizes task-level dynamic allocation as "old in the art."

4.3 A second, independent combination

US 4,839,798 (Eguchi) + US 5,031,089 (Liu) + US 4,805,107 (Kieckhafer) + US 4,414,624 (Summer). If '089 were knocked out for some reason, '798 alone discloses monitoring a node's accumulated workload against an upper limit and transferring a job out when exceeded, and accepting jobs when below a lower limit. Combined with '107's preference-vector task allocation and '624's control/data bus split, the same claim 1 result obtains.

4.4 A third combination targeting data-flow dispatch specifically

US 5,099,418 (Pian) + US 5,031,089 (Liu) + US 4,805,107 (Kieckhafer). '418 teaches the data-flow half of the claim — dispatch a task "once there is enough data on all its inputs," using input-data-element counts and output-buffer-space counts against "predetermined necessary" values, with produce/consume messaging between control processors — and '089 supplies the load-balancing/overflow half. This is the most doctrinally dangerous combination for the patentee (it uses the applicant's own co-invented work as the data-flow teaching), but it is also the one most exposed to a § 103(c)/§ 102(e) disqualification argument, as noted in § 2 above.

5. Dependent claims 2–6

Because each dependent claim adds limitations squarely disclosed by the same or adjacent references, they rise or fall with claim 1 and add little independent patentable weight.

• Claim 2 — the supervisor "control[s] the coupling of input data blocks required for processing … to the arithmetic processor of the selected … node from selected locations … that hold the required data blocks." Disclosed by '418 (a ready task's input data blocks may reside in other nodes; "a distributed control processor generates and sends a DATA TRANSFER REQUEST"; on completion, "DATA TRANSFER COMPLETE" is returned and the task is marked execution-ready when "all of the input data blocks … reside in the data memory of the associated arithmetic processor"). Also '089's transfer of a job together with its data. Obvious.
• Claims 3 and 5 — the supervisor's respective queues "store information regarding the processing of primitive processing tasks sent by respective ones of the DCPs." Disclosed by '107 (per-node entries in the Scheduler Selection Queue and the replicated global scheduling database) and by '089's Background Art control computer with task lists 20. Obvious.
• Claims 4 and 6 — those queues "store information relating to the identification of the … tasks and the input data blocks associated therewith." Disclosed by '107's Scheduler RAM (Task Identification Code, allocation, periodicity, successor lists) together with its DID List mapping task IDs to data identification codes, and by '418's explicit TID-to-DID mapping lists (input pointer list/DID list) and DID-tagged data-value messages. Obvious.

6. Where the patentee's rebuttal is strongest — and why it likely still loses

Argument 1: '089 teaches away from a supervisory processor. This is the best defense. '089 states that "The central dispatcher approach is quite restrictive for a distributed system," that "there is no need for a central dispatcher," and that eliminating it "eliminates the problem of a potential single point of failure." A patentee would argue that one of ordinary skill would not put a supervisory controller back into a '089-style network.

Response: The teaching-away doctrine requires that a reference "criticize, discredit, or otherwise discourage" the claimed solution (In re Fulton). '089 criticizes a fully centralized dispatcher that handles all jobs and imposes all state-gathering cost; it does not disparage a supervisor that receives only overflow from otherwise-autonomous nodes with local queues. Indeed, '089's own background describes the centralized control computer with task lists as the convention being improved upon — which cuts toward obviousness of the hybrid, not away from it. And '107 supplies a system in which each node does maintain a replicated global scheduling database with per-node queues — i.e., the art did not treat centralization as forbidden per se.

Argument 2: The specific "N+1 queues each associated with a respective DCP" structure is not shown. This is a real gap on the face of '089/'546/'624, but '107's per-node Selection Queue and replicated per-Node scheduling database, combined with '089's admitted task-list-per-node control computer, supply it. Expect this to be the disputed factual issue; it is a structural detail, and the motivation to keep per-node bookkeeping at a supervisor that assumes overflow responsibility is strong and predictable.

Argument 3: No teaching to combine a signal-processing (FFT/FIR) data-flow network with generic load balancing. Weak. Claim 1 does not require FFT or FIR; it requires "signal processing primitive tasks," and '624 addresses partitioned real-time computation of exactly that character, while the specification's own cited Pian 1985 NAECON paper frames the primitive-task data-flow model as background.

Objective indicia (§ 103 secondary considerations): I found no evidence of record of commercial success with a nexus, licensing, industry praise, copying, or long-felt need. The earlier section of this analysis found no litigation, no PTAB proceeding, and no NPE/monetization chain — consistent with the patent's expiration on 2011-10-18 — and, importantly, the patent is commonly-owned/passively-held (Hughes → HE Holdings → Raytheon). There is therefore no presumption of nexus and no objective-indicia record on which a patentee could rely. Absence of evidence is not affirmative evidence either way, but it means the Graham factor 4 cuts neither for nor against.

7. Bottom line

A prima facie case of obviousness under pre-AIA § 103 is available against all six claims of US 5,357,632. The most defensible attack is:

US 5,031,089 (Liu/Silvester, NASA) in view of US 4,805,107 (Kieckhafer/Allied-Signal) and US 4,356,546 (Whiteside/Bendix), further in view of US 4,414,624 (Summer/Navy) and US 4,839,798 (Eguchi/Hitachi).

• '089 supplies the per-node queue, the queue-length-based workload metric, the high/low thresholds, and the transfer of queued work from an over-burdened node to an under-burdened node — elements A, B, I, J.
• '107 supplies per-task preference vectors and per-node selection queues in a replicated global scheduling database, plus task reallocation — elements C and H.
• '546 supplies the applications-processor + per-node operations-controller pairing that claim 1 recites as the "processing node" — elements E and F.
• '624 supplies the separate control bus and data bus topology and pre-assigned task modules — elements D, G, H.
• '798 supplies a threshold-parameterized, bidirectional job-transfer protocol as an alternative to '089's threshold gating — element I.

The motivation is strong and documented: the references share the same field, attack the same load-imbalance problem, articulate the same anti-bottleneck design goal, and — critically — '089 itself describes the "control computer … containing task lists" background that the '632's supervisor-with-N-queues effectively re-introduces for overflow only. The remaining genuine dispute is the specificity of the "N+1 supervisor queues" structure; '107 plus '089's own admission supply it, but this is the factual battleground.

Confidence:

• High that every claim-1 limitation is disclosed somewhere in the cited art and that the '089-based combinations rest on accurate reference content (I read '089's claims, abstract, and description; '107's; '418's; '798's; and '624's).
• Medium-high that the combination would be held obvious. The teaching-away argument from '089's "no need for a central dispatcher" language is the principal risk, but it is addressed to a fully centralized dispatcher and should not defeat the hybrid.
• Low/uncertain on the availability of US 5,099,418 as § 103 art (same inventor, common assignee, § 102(e)-only, filing date after the '632's parent priority). Use it as context/proof of what the applicants treated as conventional, and do not build the primary case on it. Verify § 103(c)'s effective-date scope before relying on it.
• Unverified: I did not read the full text of US 4,356,546, US 4,403,286, US 4,692,860, US 4,736,318, or US 5,107,420, nor the Pian 1985 NAECON paper. My treatment of '546 rests on how the Allied-Signal family describes it, and my treatment of '286/'860/'318/'420 is at title + face-of-patent level. Those four are secondary/contextual to the analysis above; the Pian 1985 paper, however, is worth obtaining because the specification's citation of it is an applicant admission of prior art.