Invalidity dossier
US 5337254
Added 9/21/2026, 10:33:19 AM
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Patent summary
Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.
Patent Overview: US 5,337,254 — Programmable Integrated Circuit Output Pad
Title: Programmable integrated circuit output pad
Patent number: US 5,337,254 (application US 07/807,971)
Original assignee: Hewlett-Packard Co.; current assignee listed as HP Inc
Inventors: Derek L. Knee, Wang K. Li, Thomas O. Wheless, Jr.
Filing/priority date: 1991-12-16
Publication (grant) date: 1994-08-09
Legal status as listed: Expired – Lifetime (anticipated expiration 2011-12-16)
Purpose. The invention relates to solid-state integrated circuit chips and, more particularly, to a circuit for programmably modifying an output drive to an interconnection pad in accordance with process, voltage, temperature (PVT) and output load parameters. A stated challenge in off-chip driver design is reducing electromagnetic interference by preventing an output pad from being overdriven; excessive drive also creates ground and power supply “bounce.” Another variable requiring adjustment is the load capacitance at a pad, which can change when field-configurable systems are replaced, augmented, or modified.
Plain-language scope. A chip (10) has a main circuit area (12) and a margin area (14) containing I/O pads (15), each connected to a programmable I/O circuit (16) and to a PVT monitor circuit (18). A microprocessor (20), with ROM (22) and RAM (24), determines the circuit-carrier configuration connected to each pad and, using a ROM-stored table, converts survey findings into load capacitance values. Combining that information with the PVT monitor output, the microprocessor supplies control outputs indicating a required output drive level; the programmable I/O circuit responds by providing the required output current drive. The PVT monitor is described as a 13-stage CMOS ring oscillator (50) whose frequency depends on process, supply voltage, and chip temperature, counted against an invariant crystal-controlled system clock to produce a 4-bit PVT indication (4-bit size given merely as an example). Elements 62/64 and the SRT input are stated to be for test purposes and “not directly relevant to this invention.”
Not established by this excerpt. The excerpt is partial (text is cut off mid-sentence regarding microprocessor 20), so the full description, all claims, and the abstract are not available here. The supplied material does not establish claim scope, prosecution history, validity, or the content of cited prior art beyond the brief references to Kalter et al. and Dorler et al. (U.S. Pat. No. 4,383,216).
Generated 10/1/2026, 10:01:28 PM
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Assignment history
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Prior art
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