Invalidity dossier

US 8904098

Redundant backup using non-volatile memory

Current assignee: Netlist Inc

Added 9/26/2026, 5:22:30 AM

At a glanceNo PTAB challengesNo litigation on fileSemiconductor (T)

Active provider: DeepSeek · deepseek-v4-flash

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Patent summary

Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.

✓ Generated

I'll research this patent number specifically, including any litigation activity.

Let me check specifically for any litigation or PTAB proceedings involving the '098 patent itself.

Verification and scope note

I searched for the literal identifier 8904098 (and its formatted forms US 8,904,098 / US8904098B2). Everything below traces to the Google Patents record for US8904098B2, the USPTO/Justia records, and the patent's own front-page (PDF) data. I found no USPTO post-grant proceeding, no district-court assertion, and no CAFC 2026 docket entry that names US 8,904,098 specifically. The 2026 Netlist CAFC activity I did find concerns other Netlist patents (e.g., '339, '506, '314, '523, '608, '087, '731, '366) — not the '098. I flag that explicitly rather than implying otherwise.


Bibliographic summary — US 8,904,098 B2

Field Value
Title Redundant backup using non-volatile memory
Patent no. US 8,904,098 B2
Application no. 13/625,563
Pre-grant publication US 2013/0019076 A1 (Jan. 17, 2013)
Filing date Sep. 24, 2012
Issue date Dec. 2, 2014
Earliest priority Jun. 1, 2007 (via prov. 60/941,586 → 12/131,873 → 12/240,916)
Assignee Netlist, Inc. (Irvine, CA)
Inventors Mike Hossein Amidi; Chi-She Chen; Jeffrey C. Solomon; Scott H. Milton; Jayesh Bhakta
Primary examiner Midys Rojas
Claims 22 (4 independent: 1, 8, 12, 19)
Status per Google Patents Active; adjusted expiration 2028-07-17

Continuity / family. A continuation-in-part of US 12/240,916 (issued as US 8,301,833, "Non-volatile memory module"), which is a continuation of 12/131,873 (abandoned), which claims benefit of provisional 60/941,586. Claimed benefit of provisional 61/538,775 (filed Sep. 23, 2011, "A method of using standard flash controllers to implement flash RAID storage functionality"). A child continuation, US 14/489,281, issued as US 9,921,762 B2 (Mar. 20, 2018), same title and inventors. The '098 is also related to 13/559,476 ("Flash-DRAM hybrid memory module").


Abstract (verbatim)

"Data stored in a volatile memory subsystem is backed up redundantly into first and second channels of a non-volatile memory subsystem. The data is retrieved from the volatile memory subsystem upon detection of a trigger condition indicative of real or imminent power loss or reduction and multiple copies are stored in dedicated non-volatile memory channels. The stored copies may be error checked and corrected, and re-written if necessary. The redundantly backed up data can be subsequently retrieved from the non-volatile memory subsystem, error-corrected, and an error-free copy communicated to the volatile memory subsystem."


Plain-language overview of the independent claims

Claim 1 — Method of redundant backup. In a host computer memory system that has (a) a volatile memory subsystem, (b) a non-volatile memory subsystem, and (c) a controller managing the non-volatile subsystem, the method is: detect a trigger condition; decouple the volatile memory subsystem from the host in response; then, while still decoupled, use the controller to move one or more blocks of data out of the volatile memory subsystem and into the non-volatile memory subsystem; and store that data redundantly — a first copy written into a first channel of the non-volatile subsystem and a second copy into a second channel of the non-volatile subsystem.

Claim 8 — Method of restore. To restore redundantly-backed-up data into a volatile memory subsystem, the method is: fetch a first copy from the first non-volatile channel; fetch a second copy from the second channel; error-check both; then deliver an error-free copy to the volatile memory subsystem — where that copy may be (i) the retrieved first copy, (ii) the retrieved second copy, or (iii) a recovered error-free copy produced by correcting errors using data from either copy — and finally replace at least one of the stored first/second copies with that error-free copy.

Claim 12 — Backup-configured memory system (apparatus). A system with a non-volatile memory subsystem, a volatile memory subsystem couplable to a host, and a switching circuit that (on a trigger condition) decouples the volatile subsystem from the host and couples it to the non-volatile subsystem. The non-volatile subsystem contains a first set of memory elements, a second set, and a controller configured to run the first set as a first channel receiving a first copy of data from the volatile subsystem, and the second set as a second channel receiving a second copy — both in response to the trigger condition.

Claim 19 — Memory system with redundant store/retrieve (apparatus). A volatile memory subsystem couplable to a host plus a non-volatile memory subsystem having a first element set, a second element set, and a controller configured to run them as first and second channels in which first and second copies of the volatile-memory data are backed up; the controller also retrieves and error-checks both copies and communicates an error-free copy to the volatile memory subsystem.

Dependents, in brief. Claims 2–7 add write-verification against the original buffered data, re-writing into the same or a different location when a copy does not match, error-checking of data moved out of the volatile subsystem; claim 7 defines the trigger condition (actual/imminent power loss, power reduction, or a host indication). Claims 9–11 add an error indication when both copies fail, and specify replacement of a bad copy either in a different location (10) or the same location (11). Claims 13–18 mirror 2–7 for the apparatus of claim 12. Claims 20–21 add that, if one copy has an uncorrectable error, the other copy is stored into the channel that held the bad copy, optionally in a different location. Claim 22 recites "said storing … in the same location."


Litigation / PTAB / CAFC status (as of Apr. 26, 2026)

  • No proceeding naming US 8,904,098 was located. My searches of the 2026 Netlist litigation news and PTAB petition documents returned only other Netlist patents — the '339 (IPR2022-00639 / 7'', Fed. Cir. 2024-1707), '506 ('711 / 7'), '314 (IPR2022-00744/745, Fed. Cir. 24-1312), '523, '608, '087, '731, and '366. Independent Netlist portfolio lists of asserted patents (e.g., EDTX 2:25-cv-00748/749; the ITC action) do not include the '098.
  • The '098's family relatives (US 8,301,833 and US 9,921,762) do appear in the Netlist record: the '833 was the subject of Micron's Idaho bad-faith-assertion action, and the '762 is a granted continuation of the '098.
  • Uncertainty: absence of hits is not proof that the '098 was never asserted somewhere; it means I could not verify an assertion, petition, or appeal naming it. Treat "not asserted / not challenged" as an unverified negative.

Discrepancies you should be aware of (no auto-correction applied)

  1. Claim 1 channel language differs between sources. The authoritative granted text I worked from recites "writing to a first channel of the non-volatile memory subsystem … a second channel of the non-volatile memory subsystem." A Justia transcription of the same claim shows "volatile memory subsystem," which appears to be a transcription artifact. Note that the patent's own OVERVIEW section contains the same "volatile" slip, so the error is replicated in more than one place.
  2. Claim 22 antecedent basis. Claim 22 depends from claim 19 but recites "said storing," a term first introduced in claim 20; on its face the claim has a missing antecedent basis. This is an observation about the printed claim set, not a legal conclusion.
  3. Claim-set asymmetry. Claim 21 depends from claim 20, while claim 22 depends from 19 — consistent with the antecedent-basis gap above.

Sources

Generated 9/28/2026, 2:52:21 PM

Cases on file (0)

Specific litigation cases in our database that name US patent 8904098. The free-form analysis below may also discuss cases beyond this list.

No cases on file mention this patent. Upload a CSV or add a case manually in Admin → Manage litigation cases.

Litigation summary

Past and pending lawsuits — plaintiffs, defendants, jurisdictions, outcomes, and notable rulings.

✓ Generated

I'll search for litigation involving US patent 8904098 across patent litigation sources.

Let me search more specifically for litigation involving the '098 patent.

Let me check patent-specific litigation databases.

Litigation Report: U.S. Patent No. 8,904,098

Patent identified literally as US 8,904,098 B2 — "Redundant backup using non-volatile memory," Netlist, Inc. (assignee), application 13/625,563 filed 2012-09-24, granted 2014-12-02, priority 2007-06-01 (CIP of US 12/240,916 → US 8,301,833), adjusted expiration 2028-07-17. Child/continuation: US 9,921,762 B2 (application 14/489,281).

Bottom line

No litigation was found in which U.S. Patent No. 8,904,098 is asserted as a patent-in-suit, nor any declaratory-judgment, IPR/PGR, ITC, or state-court action naming it.

I searched patent-litigation-focused sources (Unified Patents litigation portal, Docket Alarm, CourtListener/RECAP, Justia federal dockets, PACERMonitor summaries, USPTO PTAB dockets, the Federal Register/ITC, and Netlist's own SEC disclosures). Every "Netlist patent litigation" hit returned assertions of other patents in Netlist's portfolio; none named the '098 patent. I could not find any case citation pairing "8,904,098" / "8904098" / "'098 patent" with a plaintiff, defendant, court, or case number.

Important caution against conflation

The '098 is part of a family that is adjacent to heavily litigated Netlist patents, so searches can surface noise. I confirmed the '098 is not the same as, and not reported as asserted alongside, the following Netlist patents that dominate the public record (with the caveat that abbreviating "the '098 patent" is a common source of confusion with the '608 patent):

  • US 10,268,608 ("'608") — asserted in Netlist v. Samsung, E.D. Tex. 2:22-cv-00293 (consolidated with 2:22-cv-00294); jury verdict for Netlist (Nov. 22, 2024, ~$12M; judgment Dec. 2, 2024); IPR2023-00847 (claims 1–5 upheld, Fed. Cir. No. 25-1378).
  • US 8,301,833 ("'833") — the '098's parent; asserted in Netlist v. Micron, W.D. Tex. 6:21-cv-00430/00431 (transferred to 1:22-cv-00134/00136; stayed).
  • The '506, '339, '918, '054, '060, '160, '523, '218, '595, '024, '319, '087, '731, '366, '407, '937, '537, '912, '417, '215 — the balance of Netlist's asserted portfolio against Samsung, Micron, Google, SK hynix, and Avnet, and in ITC Investigations (e.g., 337-TA-1472, -1511, -1523).

None of these identifiers is 8,904,098.

Searches performed (negative)

Target Result
"US patent 8904098 litigation" No litigation; only unrelated FOIA document and a Pennsylvania criminal docket number "8904098"
"Netlist 8904098 lawsuit defendant" Only other Netlist patents
"8,904,098" infringement complaint No hits for the '098
"8904098 Samsung/Micron/Google/SK hynix" Only unrelated Russian patent citing WO 8904098
Unified Patents / Docket Alarm portals Tool limit reached before retrieval; nothing surfaced in broader queries indicating a '098 case

Caveats and residual uncertainty

  • This is a negative finding from public sources, not a legal conclusion. Netlist is a serial litigant, and a recent or sealed action could exist that is not yet indexed. I recommend verifying directly on the Unified Patents litigation caselist (https://portal.unifiedpatents.com/litigation/caselist), Docket Alarm, CourtListener/RECAP, and PACER, and cross-checking the USPTO Patent Trial and Appeal Board docket for any IPR/PGR petition against 8,904,098 (I could not confirm one).
  • Note also that the '098 carries a recorded security interest (SVIC No. 28 New Technology Business Investment L.L.P., 2015) released in 2023 — a financing matter, not litigation.
  • I did not find any CAFC appeal involving the '098 in the results reviewed.

Conclusion: On the available record, U.S. Patent No. 8,904,098 has no known litigation — no plaintiff/defendant pairs, jurisdictions, case numbers, filing dates, or outcomes to report.

Generated 9/28/2026, 2:52:19 PM

Proceedings on file (0)

All PTAB activity →

AIA trial proceedings (IPR / PGR / CBM) filed at the USPTO Patent Trial and Appeal Board against this patent. Sourced from the USPTO Open Data Portal and refreshed every six hours; each proceeding number deep-links to the PTAB E2E docket.

No PTAB proceedings on file. This patent has not been challenged via IPR, PGR, or CBM. The absence is itself a signal — well-asserted patents eventually attract IPRs. The LLM analysis below may surface filings the ODP feed hasn’t indexed yet.

PTAB challenges

AIA trial proceedings at the USPTO Patent Trial and Appeal Board — IPR, PGR, and CBM. Petitioners, judge panels, claim-level invalidation outcomes from Final Written Decisions, and Federal Circuit appeals. The single most important defensive datapoint after litigation history.

✓ Generated

I'll start by verifying the ODP's "no proceedings" finding against public PTAB sources.

The initial searches surfaced Netlist PTAB activity on many patents, but not clearly on the '098. Let me dig deeper.

Let me search for a proceeding tied specifically to the '098 by number and by its litigation parties.

PTAB Proceedings — U.S. Patent No. 8,904,098 ("Redundant backup using non-volatile memory")

Patent owner: Netlist, Inc. | Granted: 2014-12-02 | Earliest priority: 2007-06-01 | Adjusted expiration: 2028-07-17


Proceedings overview

Total AIA trial proceedings on file: 0 — the USPTO Open Data Portal (the canonical "PTAB proceedings on file" block supplied for this analysis) returns no AIA trial proceedings for US 8,904,098, so the breakdown is 0 active / 0 claims invalidated / 0 claims sustained / 0 settled / 0 institution denied. I independently searched PTAB dockets, CourtListener, and firm/legal-press coverage and could not surface a single IPR, PGR, or CBM naming the '098 as the challenged patent; the bottom line for a defendant is that this patent has never been tested at the PTAB — there is no canceled claim to point to, but also no hardened, IPR-surviving claim set to worry about. The defensive posture is therefore unusual: you cannot kill a demand letter by citing a Final Written Decision against the '098, but you also inherit no § 315(e) estoppel from anyone, and you get to pick your own grounds.

⚠️ Caveat on the "zero" number. The ODP ingest is a snapshot. Recent petitions (roughly the last few months) are frequently not yet indexed in the API. I flag this because 8,904,098 sits inside a portfolio Netlist has asserted very aggressively in 2022–2026 (see "Adjacent landscape" below), and well-asserted Netlist patents have attracted serial IPRs. Treat "0" as "0 as of the most recent ODP ingest," not as an absolute. Verify manually at PTAB E2E (https://ptacts.uspto.gov/ptabweb/) before filing anything.


Proceedings on US 8,904,098

None. There are no proceeding numbers to report, and I will not manufacture any. Per the constraints above, I am not populating the ### {PROCEEDING_NUMBER} template with related-patent cases, because attributing e.g. an IPR2014-01374 outcome to the '098 would be flatly wrong — that case was filed against U.S. 8,359,501.

Adjacent PTAB landscape (NOT proceedings on the '098 — context only)

These are proceedings on other, related Netlist memory-module patents. They matter to you only for prior-art mining and for understanding how the Board has treated Netlist's memory claims; they create no estoppel whatsoever against the '098.

Proceeding Parties Patent What happened
IPR2014-00882 / -00883 / -01011 Diablo Techs. v. Netlist 7,881,150; 8,081,536 Instituted 2014-12-16; FWD 2015-12-14; on appeal, Netlist, Inc. v. Diablo Techs., Inc., No. 2016-1742 (Fed. Cir. 2017-07-25)
IPR2014-00971 SanDisk v. Netlist 8,359,501 FWD 2015-12-14 — claims 1–3, 5–8, 11–20 unpatentable (§ 102(b) over Averbuj; § 103(a) over Huang)
IPR2014-00994 SanDisk v. Netlist 8,301,833 Petition filed 2014-06-20
IPR2014-01369 / -01373 / -01375 Smart Modular v. Netlist 8,516,185; 8,001,434; 8,359,501 Institution denied (e.g., IPR2014-01369 Paper 12, 2015-03-09)
IPR2014-01372 / -01374 Smart Modular v. Netlist 8,001,434; 8,359,501 Instituted 2015-03-10; '501 FWD 2016-03-09 — claims 1, 2, 4–6, 9–11, 14–17, 20 not proven unpatentable (patent owner win)
IPR2017-00649 SK hynix v. Netlist 8,301,833 Filed 2017
IPR2022-00996 / -00999 Samsung / Micron v. Netlist (Netlist memory patents) FWD 2024-01-05; Netlist sought Director Review 2024-01/02
IPR2022-00236 Micron v. Netlist 9,824,035 FWD 2023-06-20 — claims 2 and 6 confirmed; after rehearing, claims 1, 10–13, 21, 22 invalid
IPR2023-00847 Samsung v. Netlist 10,268,608 FWD 2024-12-10 — no challenged claims unpatentable; on appeal, CAFC No. 25-1378

Also relevant: Netlist's EDTX1 patents 11,016,918 and 11,232,054 were subject to Samsung IPRs that produced Final Written Decisions (2023-05-08 / 2023-05-09) invalidating all 60 claims. Netlist's position is that those patents nevertheless supported the April 2023 EDTX jury verdict (~$303M) and that "all of the EDTX1 Patents are either subject to IPR final written decisions, or an IPR trial." I did not confirm which IPR numbers map to the '918 and '054 FWDs, and I did not verify whether the '098 shares a priority chain with them — do not assume it does. What I can confirm from the patent itself is that the '098 is a CIP of U.S. 12/240,916 (which issued as U.S. 8,301,833) and that Netlist filed a continuation of the '098, U.S. 9,921,762, on 2014-09-17.


Strategic summary

Claim status on the '098: 100% UNTESTED. No claim of 8,904,098 — not independent claims 1, 8, 12, or 19, nor any of dependent claims 2–7, 9–11, 13–18, or 20–22 — has been canceled, confirmed, or even challenged in an AIA trial. There is no Certificate of Correction, no reexamination certificate, and no IPR certificate to check against. If you are drafting an invalidity position or a clearance opinion, your claim chart starts from the granted claims as printed.

Estoppel: none, in either direction. Because no one has petitioned on the '098, § 315(e)(2) estoppel is a non-issue — there is no petitioner or privy to inherit it from, and no ground that was "raised or reasonably could have been raised." Practically that means: (a) every prior-art ground is available to you, in the PTAB and in district court; and (b) if you want to file an IPR, you should assume the Board will treat it as a first petition (no General Plastic follow-on problem, no Fintiv-style crowding argument from a competing '098 trial). The only real constraint is § 315(b): if you were served with a complaint alleging infringement of the '098 more than one year ago, you are time-barred from petitioning.

Pattern signals. Netlist is a serial PTAB patent owner, not a serial petitioner, and it has litigated its memory portfolio through multiple forums (N.D. Cal. against Smart Modular and Diablo; the EDTX/Netlist v. Samsung campaign; ITC Inv. No. 337-TA-1023; Netlist v. Micron in W.D. Tex.). The PETAB record shows it fights denials aggressively — including a 2024 Request for Rehearing by the Director when its filings weren't docketed. There is no defensive aggregator (e.g., Unified Patents) in the '098 chain; the challengers in this portfolio are all operating companies (SanDisk, SK hynix, Samsung, Micron, Smart Modular, Diablo). One CourtListener record (Fed. Cir. No. 2024-1707 / Netlist, Inc. v. Micron Techs., Inc., decided 2026-09-02 (Reyna, Linn, Stark, JJ.)) and the 2026-09 argument recap in the 'ranks'-construction appeal show the current frontier of this fight is claim construction and APA/priority issues, not the '098.


Recommended next steps

  1. Verify the null result manually. Query PTAB E2E / P-TACTS (https://ptacts.uspto.gov/ptabweb/) by patent number, not just by party name. My search was able to confirm the absence from the ODP snapshot but could not independently sweep every 2026 filing.
  2. If you hold a demand letter citing 8,904,098: you have no FWD to quote, so build your defense on (a) district-court invalidity, where you face no § 315(e) estoppel; and (b) the claim-construction record the Board and the Federal Circuit have already built for Netlist's memory-module family — the construction fight over "rank" is live on appeal (Netlist v. Micron, argued September 2026), and the Federal Circuit's 2026-09-02 decision in No. 2024-1707 affirmed obviousness findings on related Netlist claims while tolerating the Board's reliance on a reference outside the petition. Netlist has repeatedly lost on prior art in this portfolio.
  3. Mine the prior art already litigated. The Averbuj and Huang references that killed claims of the '501, the Ellsberry/Halbert combinations, and the JEDEC/DRAM datasheet exhibits used in the IPR2018-00362 line are all fair game against the '098 — and none of them is estopped, since no '098 petition exists.
  4. Watch the § 315(b) clock. If you are a new target receiving a first complaint on the '098, you have one year from service to petition. Given the total absence of prior '098 PTAB activity, a well-pled first IPR is likely to get a clean discretionary-denial analysis.
  5. Do not over-read the silence. Zero PTAB activity on a 2014 patent that has been in a heavily-litigated portfolio for a decade usually means one of: the '098 was asserted mainly in forums where IPR was impractical (ITC), it was asserted before the AIA-trial era matured, or it is being held in reserve. That is a tactical signal, not a validity one — it is emphatically not "the patent is strong because it survived IPRs."

Primary sources for anything you cite: USPTO PTAB Decisions — https://www.uspto.gov/patents/ptab/decisions ; PTAB E2E — https://ptacts.uspto.gov/ptabweb/ ; CourtListener Federal Circuit dockets — https://www.courtlistener.com/?type=r&court=cafc .

Generated 9/28/2026, 2:52:44 PM

Ownership chain (2)

Asserters network →

Structured records extracted from the assignment-history narrative below. Each entity links to its full ownership-network profile.

  1. 2015-11-18 · recorded 2015-11-20 · reel 037150/0897 · Security Agreement

    Netlist, Inc., a Delaware corporationSVIC No. 28 New Technology Business Investment L.L.P., a Korean limited liability partnership

    Correspondent: · DLA Piper

    securitization

  2. ? · reel 065629 · Release

    SVIC No. 28 New Technology Business Investment L.L.P.Netlist, Inc.

    release of lien

Assignment history

Inventors, original assignee, and the chain of ownership recorded with the USPTO — including the correspondent attorney who recorded each assignment, since shell-LLC chains often share one repeat-player attorney even when the entity names look unrelated. Surfaces NPE / patent-troll patterns: shell-entity transfers, known asserters in the chain, repeat correspondent fingerprints, pre-litigation assignments, and bankruptcy fire-sales.

✓ Generated

I'll reconstruct the ownership chain using the patent text plus live research on USPTO assignment records, litigation, and the assignees. Let me run several searches.

Strong leads. Let me nail down the release record, the original inventor→Netlist assignment, and the correspondents.

US 8,904,098 B2 — "Redundant backup using non-volatile memory"

Verification starting point: USPTO Assignment Center / Assignment Search — search patent number 8904098. Google Patents legal-events view: https://patents.google.com/patent/US8904098/en

Bottom line up front: this chain contains no transfer of title away from Netlist. The only two recorded post-issuance events are (1) a security interest granted by Netlist to a Samsung-affiliated venture fund, and (2) its later release. Current owner of record: Netlist, Inc.


Inventors

Per the issued front page (71)/(72) and the file:

Inventor Residence at filing Employer at filing (determinable)
Mike Hossein Amidi Lake Forest, CA Netlist, Inc.
Chi-She Chen Walnut, CA Netlist, Inc.
Jeffrey C. Solomon Irvine, CA Netlist, Inc.
Scott H. Milton Irvine, CA Netlist, Inc.
Jayesh Bhakta Cerritos, CA Netlist, Inc.

The application was filed 2012-09-24 naming Netlist, Inc., Irvine, CA as applicant; all five invented in the course of that employment (residences cluster around the Irvine facility). No pattern of coordinated departure is evident:

  • Chen, Solomon, and Bhakta reappear as inventors on the child continuation US 9,921,762 (app. 14/489,281, filed 2014-09-17) and on other later Netlist filings (e.g., app. 14/536,588), which is affirmative evidence they remained at Netlist well past the 12-month window.
  • I found no evidence of any inventor leaving Netlist within 12 months of filing, and no fire-sale-precursor pattern. (Caveat: I could not retrieve individual employment-end dates for Amidi or Milton; treat "all stayed" as supported for the three named above and unverified for the other two.)

Original assignee

Netlist, Inc. (Delaware corporation; HQ Irvine, CA; founded 2000; NASDAQ-ticker NLST, now OTCQB:NLST). Listed as original assignee on the issued patent.

  • Products embodying the claims? Partly yes at the portfolio level. Netlist designs and sells DRAM modules (RDIMM/LRDIMM), NVDIMMs, and hybrid flash‑DRAM products under the HyperVault / HybriDIMM banner — the same flash‑backup-of-DRAM architecture this '098 claims recite. The '098 is a continuation-in-part of US 8,301,833 ("Non-volatile memory module"), so it sits squarely in Netlist's hybrid-memory product line rather than in a standalone licensing shell. I did not find the '098 asserted in any filed suit, so "embodying" is established by product family, not by a court finding on this specific patent.
  • Primary line of business: historically memory module/hybrid-memory design and sales; increasingly IP licensing and enforcement (Netlist's own 10‑K states it is "currently operating based on a products-based business model" while pursuing an IP-based licensing business).
  • Current status: operating, public, not in bankruptcy. Netlist is a prolific plaintiff — $303.15M Samsung verdict (2023), $118M Samsung verdict (2024), $445M Micron verdict (2024), plus ongoing ITC actions against Samsung/Google/Super Micro and a Micron WDTX case; SK hynix licensed the portfolio in 2021. Multiple Netlist patents have survived IPR at the PTAB and on CAFC appeal.

Assignment timeline

Two recorded post-issuance assignments exist. I could not retrieve a separate recorded reel/frame for the initial inventor→Netlist assignment; the patent issued directly naming Netlist as applicant/assignee, which is consistent with an unrecorded or issue-time assignment rather than a recorded conveyance.

  • 2015-11-18 (executed) / recorded 2015-11-20 — Reel 037150/0897

    • Conveyance: Security Interest (Intellectual Property Security Agreement — collateral grant, not a conveyance of title)
    • Assignor (Grantor): Netlist, Inc., a Delaware corporation
    • Assignee (Secured Party): SVIC No. 28 New Technology Business Investment L.L.P., a Korean limited liability partnership
    • Correspondent: DLA Piper LLP (US), 4365 Executive Drive, Suite 1100, San Diego, CA 92121; email susan.reynholds@dlapiper.com; submitter Troy Zander; attorney docket 350916‑9. (Single appearance in this chain — DLA Piper is Netlist's mainstream secured-financing/IP counsel, not a recurring NPE-recording filer. No recurrence → no signal.)
    • Context: Securitization — collateral pledge covering ~60 Netlist patents/applications (Exhibit C lists US 8,904,098 among them) securing the November 18, 2015 Senior Secured Convertible Promissory Note tied to the Netlist–Samsung Joint Development and License Agreement; Samsung/SVIC took a ~3.25% equity stake in Netlist and the "Project Neptune" security filing.
  • 2023 (recorded; executed on release) — Reel 065629/[frame not retrieved]

    • Conveyance: Release of Security Interest
    • Assignor: SVIC No. 28 New Technology Business Investment L.L.P.
    • Assignee: Netlist, Inc.
    • Correspondent: not captured in the sources I retrieved.
    • Context: Release of lien / reversion to grantor — after the JDLA deteriorated (Netlist terminated Samsung's license for breach; juries later found Samsung willfully infringed). Netlist's own PTAB brief states Samsung "did not record its release of the security interest to Netlist's patent assets until October 27, 2023," while Google Patents' legal-events feed dates the release to 2023-11-20 — flagging this date discrepancy rather than reconciling it. Either way, title returned cleanly to Netlist.
    • Net effect: title never left Netlist; the security interest is fully discharged.

Timeline diagram

timeline
    title Ownership of US 8904098
    2007 : Priority date from earlier Netlist case
    2012 : Filed by Netlist as a continuation in part
    2014 : Patent US 8904098 issues to Netlist
    2015 : Security interest recorded to SVIC No 28
    2023 : Security interest released back to Netlist

NPE / troll-pattern signals

  1. Shell-entity transfer — not present. No assignment of title to any "IP / Holdings / Licensing / Ventures" entity. The only non-Netlist party on the chain (SVIC No. 28) is a secured lender, not an owner, and the lien was released (Reel 065629). Title has been Netlist's throughout.
  2. Known asserter in the chain — not present (as defined). Neither Netlist nor SVIC matches the enumerated NPE lists (Acacia, Marathon, IV, Wi‑LAN/Conversant, Pendrell, Round Rock, etc.). Note for completeness: some market commentary characterizes Netlist itself as having "transitioned to an NPE-style licensing-and-litigation model," but it is an operating module vendor with NASDAQ/OTC filings and product revenue, so it does not satisfy the list-match test. Weak signal at most.
  3. Repeat correspondent across the chain — not present / unclear. Only one correspondent was captured (DLA Piper, Reel 037150/0897). A single appearance by a large full-service firm doing secured-financing work is expressly not a finding under the stated rule (recurrence is required). The release correspondent is unretrieved, so recurrence cannot be evaluated.
  4. Cascading transfers — not present. One collateral grant plus one release; no chained LLCs, no shared registered-agent addresses, no common-principal shell string.
  5. Pre-litigation transfer — not present. The 2015 security interest predates Netlist's assertion campaign by years and conveyed no standing/title. There is no assignment within 6 months of any suit.
  6. Bankruptcy fire-sale — not present. Netlist has not filed Chapter 7/11; it is an active filer of infringement actions (and the 2015 lien was a consensual note, not a bankruptcy sale).
  7. Privateering — not present on this chain, though worth noting the inverse strategic relationship: Samsung's venture arm (SVIC) took a security interest and equity stake, and Samsung took a license under the Netlist portfolio. That is a strategic co-development/investment tie-up, not an operating company parking patents at an NPE to sue rivals. Netlist later terminated the license and sued Samsung itself.
  8. Defensive aggregator (anti-NPE) — not present. The chain terminates at Netlist, an asserting operating company, not at RPX/AST/LOT/Unified/OIN.

Verdict

Operating-company assertion.

The ownership chain contains no title transfer at all — only a 2015 security interest to SVIC No. 28 (Reel 037150/0897, executed 2015-11-18, recorded 2015-11-20) and its release (Reel 065629, 2023), leaving Netlist, Inc. as sole owner of record. Netlist is a public, non-bankrupt operating company that ships DRAM/hybrid memory products in the same technology space and is actively suing genuine competitors (Samsung, Micron, Google, Super Micro) to six- and nine-figure verdicts. Every shell-entity, cascading-transfer, and defensive-aggregation signal is absent, so the "operating-company assertion" bucket fits best — with the caveat that this specific patent ('098) did not appear on any asserted-patent list I retrieved, so the assertion characterization is portfolio-level, and Netlist is increasingly described in the trade press as NPE-like notwithstanding its product sales.

Sources: USPTO Assignment Center / Google Patents legal events for US 8,904,098; IP Security Agreement text and filing data reproduced in PTAB exhibits EX2006 (IPR2026‑00017, PGR2025‑00071) and Netlist's IPR2025‑01402 POPR (Reel 037150/0897; Release Reel 065629); Netlist 10‑K/10‑Q SEC filings (Samsung JDLA and litigation history). Frame number and correspondent for the 2023 release were not retrieved and are flagged as unverified.

Generated 9/28/2026, 2:52:43 PM

Prior art

Earlier patents, publications, and products that may anticipate or render the claims unpatentable.

✓ Generated

I'll research US patent 8904098 and its cited prior art. Let me start with targeted searches.

Let me retrieve the full list of references cited in US8904098.

1. Patent identification (USPTO record)

US 8,904,098 B2 — "Redundant backup using non-volatile memory"

  • Application: 13/625,563; Filed: Sep. 24, 2012; Granted: Dec. 2, 2014
  • Applicant/Assignee: Netlist, Inc. (Irvine, CA)
  • Inventors: Mike Hossein Amidi; Chi-She Chen; Jeffrey C. Solomon; Scott H. Milton; Jayesh Bhakta
  • Prior publication: US 2013/0019076 A1 (Jan. 17, 2013)
  • Priority chain: provisional 60/941,586 (Jun. 1, 2007) → 12/131,873 (Jun. 2, 2008) → 12/240,916 (Sep. 29, 2008, now US 8,301,833) → CIP 13/625,563; also claims benefit of provisional 61/538,775 (Sep. 23, 2011)
  • Child: continuation 14/489,281 (now US 9,921,762)
  • Status: Active, adjusted expiration 2028-07-17
  • Classifications: G06F 3/06, 11/14, 11/16, 11/1612, 3/065, 3/0688, etc.

This confirms the target record is US 8,904,098 and not the many similar-looking Netlist numbers (8,301,833; 8,677,060; 8,880,791; 8,904,099; 8,874,831; 9,921,762; 9,436,600), which are related family/portfolio members and were not substituted.


2. What the 22 claims actually cover (basis for the § 102 analysis)

Claim group Substance
1–7 (method) Detect trigger → decouple volatile subsystem from host → controller moves blocks of data to NV subsystem while decoupled → redundantly store by writing a first copy to NV channel 1 and a second copy to NV channel 2; + verification/re-write (2–5), error-check (6), trigger types (7)
8–11 (method) Restore: retrieve copy 1 and copy 2 from the two NV channels, error-check both, communicate an error-free copy generated from either copy or from a recovered/corrected copy, and replace a defective copy with the error-free copy (9 error indication; 10/11 different/same location)
12–18 (system) NV subsystem + volatile subsystem couplable to host + switching circuit that decouples volatile from host and couples it to NV on trigger; controller writes copy 1 to channel 1 and copy 2 to channel 2
19–22 (system) Controller backs up copy 1/copy 2 to two NV channels, retrieves and error-checks both, communicates an error-free copy; correct using the other copy and, on uncorrectable error, re-store the good copy (20–22)

Two features distinguish the claims from generic "DRAM-to-flash backup on power loss" art: (a) the redundant two-channel (RAID-1-like) write/read of identical copies inside the non-volatile subsystem, and (b) the error-check-and-repair / copy-replacement choreography of claims 8 and 19–22.


3. Prior art cited in US 8,904,098

The Google Patents/USPTO record lists 88 cited references. I was able to retrieve the front-page citation list in part (the "U.S. Patent Documents" block) plus several full records. The table below reports what I actually retrieved and can characterize. I could not enumerate the full 88 items (the foreign-patent and "other publications" sub-lists were truncated), so this is not a complete citation census — I flag that explicitly rather than fill it in.

3a. U.S. patent documents (as listed on the US 8,904,098 front page)

Ref. Date Brief description Potentially relevant claims
US 3,916,390 A (Chang et al., IBM) 1975-10-28 "Dynamic memory with non-volatile back-up mode" — DRAM whose contents are dumped to non-volatile storage on power loss 1, 12 (preamble concepts only)
US 4,234,920 A (Van Ness et al., Engineered Systems) 1980-11-18 "Power failure detection and restart system" — detecting power loss and acting on it 7, 18 (trigger condition)
US 4,420,821 A (Hoffman, IBM) 1983-12-13 Static RAM with non-volatile back-up storage 1, 12
US 4,449,205 A (Hoffman, IBM) 1984-05-15 Dynamic RAM with non-volatile back-up storage — volatile→non-volatile transfer and restoration 1, 8, 12, 19
US 4,965,828 A (Ergott Jr., Quadri) 1990-10-23 Non-volatile memory with SCRAM hold cycle prior to backup transfer 1, 12
US 5,430,742 A (Jeddeh et al., AST Research) 1995-07-04 Memory controller with ECC and data handling 6, 8, 17, 19
US 5,619,644 A (Crockett et al.) 1997-04-15 Fault-tolerant/redundant memory organization 1, 8, 12, 19
US 5,890,192 A (Lee et al.) 1999-03-30 Non-volatile/backup memory arrangement 1, 12
US 6,269,382 B1 (Cabrera et al.) 2001-07-31 Backup/consistency mechanism for stored data 8, 19
US 6,336,176 B1 (Leyda et al.) 2002-01-01 Data storage / memory control 1, 12
US 6,721,860 B2 (Klein) 2004-04-13 Marked as examiner-cited; memory backup/controller art 1, 12
US 6,816,982 B2 (Ravid) 2004-11-09 Fault-tolerant memory system 8, 19
US 6,944,042 B2 2005-09-13 Memory/FLASH management 1, 12

Other listed U.S. documents I retrieved but could not verify in substance with high confidence include: US 5,519,663 (Harper Jr.), US 5,519,831 (Holzhammer), US 5,563,839 (Hertl et al.), US 5,577,213 (Avey et al.), US 5,675,725 (Malcolm), US 5,870,350 (Bertin et al.), US 5,874,995 (Naumally et al.), US 5,953,215 (Karabatsos), US 6,023,421 (Clinton et al.), US 6,114,310 (Jun et al.), US 6,145,968 (Lewis), US 6,158,015 (Klein), US 6,159,142 (Saulsony et al.), US 6,216,247 (Creta et al.), US 6,459,647 (Kengeri), US 6,487,102 (Halbert et al.), US 6,487,623 (Emerson et al.), US 6,658,507 (Chan), US 6,691,209 (O'Connell), US 6,769,081 (Parullar), US 6,796,942 (Tanaka et al.), and a long tail after US 6,944,042. I am not asserting a claim mapping for those; doing so without reading them would be fabrication.

3b. Directly on-point art developed outside prosecution (for completeness of "most relevant prior art")

Litigation/IPR records for this Netlist family identify two references that are more probative than most of the cited art and are directly aimed at the claim 1 / claim 12 architecture (DRAM→flash backup on power failure with isolation):

  • "Long '552" — discloses a controller powered by a primary source in a first mode, a volatile-memory storage cache, and a flash-based memory vault, with data moved from cache to vault upon loss of primary power.
  • "Leete '210Pub" (US 2007/0021210 A1 family, B. Leete et al.) — discloses a recovery unit between DRAM and flash activated on detection of power failure using isolation circuitry, a power source, and a capacitor-based backup unit feeding the memory devices on power failure.

These map strongly onto claims 1, 7, 12, 18 and the claim 1/12 "trigger → decouple → transfer to NV" sequence. I did not independently re-verify the exact publication numbers behind the abbreviations "Long '552" and "Leete '210Pub," and I flag that.


4. § 102 anticipation assessment (35 U.S.C. § 102)

Anticipation requires a single reference disclosing every limitation as arranged in the claim. On the record available:

  • No single retrieved citation anticipates claims 1–7 or 12–18. The DRAM-to-non-volatile-backup references (US 3,916,390; US 4,420,821; US 4,449,205; US 4,965,828) disclose the backup-upon-power-loss idea but not the two-channel redundant write (channel 1 / channel 2 identical copies), which is the core of independent claims 1 and 12. This is why the patent issued.
  • No single retrieved citation anticipates claims 8–11 or 19–22. The ECC/fault-tolerant references (US 5,430,742; US 5,619,644; US 6,816,982) disclose error checking and redundancy, but not the specific retrieve-both-copies → error-check-both → generate/communicate an error-free copy from either copy or a recovered copy → replace the defective copy sequence, nor the different-location-write (claim 10) / same-location-write (claim 11) alternatives.
  • Closest single-reference anticipation candidates (partial, not complete):
  • US 5,619,644 (Crockett et al.) — most relevant to the redundancy aspect of claims 1, 12, 19; would need to be shown to disclose non-volatile two-channel mirroring with trigger-based decoupling to be anticipatory.
  • US 5,430,742 (Jeddeh et al.) — most relevant to the ECC/error-check limitations of claims 6, 8, 17.
  • US 4,449,205 (Hoffman) — most relevant to the volatile→non-volatile backup-and-restore limitations of claims 1, 8, 12, 19.
  • US 4,234,920 (Van Ness et al.) — most relevant to the trigger-condition limitations of claims 7, 18.
  • The strongest real-world § 102/§ 103 threats are the non-cited "Long '552" and "Leete '210Pub" references identified in the PTAB record, which disclose the trigger + isolation + DRAM-to-flash-vault architecture. Alone, each would still appear to lack the redundant two-channel storage and the copy-replacement on uncorrectable error; combined they are more naturally a § 103 challenge than a clean § 102 anticipation.

Bottom line: For US 8,904,098, the cited art is best characterized as § 103-adjacent background, not anticipatory. The references most relevant to individual claim limitations are US 5,619,644 and US 5,430,742 (redundancy/ECC), US 4,449,205 and US 3,916,390 (volatile→non-volatile backup), and US 4,234,920 (power-failure trigger); no retrieved reference, taken alone, discloses all elements of any independent claim.


5. Confidence and limitations

  • High confidence: patent identity, dates, assignee, the 22-claim structure, and the general substance of the claim groups (from the authoritative full text).
  • Medium confidence: the per-reference "potentially relevant claims" mappings when the reference is a well-known family member (Hoffman, Chang, Van Ness, Jeddeh, Crockett).
  • Low confidence / stated as unknown: the substance of roughly half of the 88 cited references (the tail after US 6,944,042, the foreign patent documents, and the non-patent-literature sub-list). I did not obtain or read those documents, so I have deliberately not assigned anticipatory claim numbers to them. If a complete claim-by-claim § 102 chart is required, the remaining cited references (especially the JP/EP/WO items and the "other publications" list) must be pulled from the patent's PDF front page and read individually.

If you want, I can produce a full formatted § 102 claim chart once the complete citation list (foreign + NPL included) is retrieved from the USPTO PDF.

Generated 9/28/2026, 2:52:53 PM

Obviousness

Combinations of prior art that suggest the claimed invention would have been obvious under 35 U.S.C. § 103.

✓ Generated

I'll supplement the truncated "Prior art" citations list (the page's citation list cuts off at US5430742A) with targeted searches before doing the § 103 analysis.

I have the full "References Cited" list now. Let me verify the disclosures of the most probative references before mapping them to the claims.

Obviousness Analysis — U.S. Patent No. 8,904,098 under 35 U.S.C. § 103

1. Scope, sources, and verification limits

This analysis is built from the prior-art section of the '098 record — i.e., the "References Cited" list on the face of the patent (88 citations), the "Prior art keywords" listed by Google Patents (volatile memory, memory subsystem, copy, channel, data), and the applicant-cited non-patent literature (the SanDisk/Smart Modular IPR petitions against US 8,301,833 and US 8,516,187). Because the citation list on the fetched page is truncated after US 5,430,742, I retrieved the complete U.S. list (uspto.report / Google Patents "References Cited") and supplemented it with prior art identified in the same family's record.

Verification status (important). I fully verified the disclosure (abstract/claims/text) of only four references: Li ’174, Jeddeloh ’742, Leete ’210 and Sartore ’099. Every other reference below is characterized from its title, inventor, assignee and date only. Characterizations of un-verified references should be re-checked against the specification before any real challenge relies on them. I flag this rather than implying I read documents I did not read.

Governing law. The '098 was filed 24 Sep 2012 — before the 16 Mar 2013 AIA cut-over — so pre-AIA §§ 102/103 apply (with the AIA § 3(n)(1) transition provisions). That matters for § 102(e)/102(a) analysis of published applications.

PHOSITA. A person with a bachelor's degree in electrical engineering or computer engineering and ~2–3 years' experience in computer memory systems, or equivalent, familiar with DRAM/DIMM design, flash controllers, ECC, and power-fail data protection. This is the level at which NVDIMM/hybrid-module work was routinely done by 2007.


2. The critical-date problem (this is the crux of any § 103 case)

The '098 is a continuation-in-part (CIP) of 12/240,916 (US 8,301,833), claiming 1 Jun 2007 priority. A CIP claim gets the earlier date only for subject matter supported by the parent. So:

  • If the channel-redundant-backup limitations are new matter first supported by provisional 61/538,775 (23 Sep 2011) or the 24 Sep 2012 filing, then art published between 2007-06-01 and 2011-09-23 is fully available.
  • If the claims are entitled to 2007-06-01, then the qualifying window closes at 2006-06-01, and the Agiga/Cypress Sartore ’099 reference (filed 2007-07-25, published 2009-01-29) — the single most on-point reference — would not qualify.

I therefore present Grounds 1–3 with "Tier A" art that qualifies under either scenario, and Ground 4 as a fallback that depends on the later effective date.

Tier References relied on Qualifies if priority =
A Li ’174 (2002); Leete ’210 (2004); Jeddeloh ’742 (1995); Hoffman ’821/’205 (1983/84); Chang ’390 (1975); Van Ness ’920 (1980); Ergott ’828 (1990); MacLaren ’027 (Aug 2004); Poechmueller ’488 (Mar 2005); Pauley ’302 (Feb 2005); Hansen ’250 (Jun 2005); Khouri ’197 (Feb 2006); Sanders ’896 (Mar 2006) 2007-06-01 or 2011-09-23
B Sartore ’099 (2009); Fukuzo ’295 (Dec 2006); Spiers ’515 (Apr 2006 — pre-2006-06-01, so also Tier A); Bonella ’523 (Jun 2007); Oshikiri ’627 (Aug 2007); Gower ’099 (Jun 2007) 2011-09-23 only

3. Claim-element mapping for the four independent claims

Claim element § 103 evidence
1(a) host system w/ volatile subsystem, non-volatile subsystem, controller Li ’174 (HAMM: volatile + nonvolatile + controller on a DIMM/board); Leete ’210 (DRAM 704 + flash 706 + recovery unit 708)
1(b) detect a trigger condition Li ’174 — "power failure, operating system hang-up, or unexpected system reset"; Chang ’390; Van Ness ’920; Leete ’210
1(c) decouple volatile subsystem from host Li ’174 — "electronically isolates itself from the host computer system before copying"; "isolation devices … in response to the trigger event" (claims 5, 6, 17); Leete ’210 — "isolation circuitry"
1(d) controller moves blocks volatile→non-volatile while decoupled Li ’174 — controller copies digital information from volatile to nonvolatile after isolation; auxiliary energy source (capacitor/battery) powers the transfer
1(e) first copy → first channel of non-volatile; second copy → second channel The narrow point. Not taught by the Tier-A backup references. Supplied by RAID-1/mirroring art + multi-channel flash controller art (see Ground 1, element (e) rationale)
6 / 17 error-check the transferred blocks Jeddeloh ’742 — ECC generator/checker in a memory controller (verified)
7 / 18 trigger = actual/imminent loss, reduction, or host indication Li ’174; Leete ’210; Van Ness ’920
8 / 19 retrieve both copies, error-check, output error-free copy, replace bad copy Li ’174 (restore direction) + Jeddeloh ’742 (ECC check/correct) + mirroring art (second copy)
9 error indication if both copies bad Ordinary ECC/uncorrectable-error reporting; Jeddeloh ’742
10 / 11 / 20 / 21 / 22 replace copy in different / same location Lofgren ’325 (flash wear-leveling/bad-block remap); standard flash program-retry

4. Grounds of rejection

Ground 1 — Li ’174 in view of Jeddeloh ’742 and mirroring art

Li ’174 (US 6,336,174, Maxtor) is the primary reference. Verified disclosure: a "hardware assisted memory module (HAMM)" on a conventional DIMM/SIMM that detects a trigger event (power failure, OS hang-up, unexpected reset), "electronically isolates itself from the host computer system", uses a controller plus an auxiliary power source (battery and/or capacitor) to copy volatile→nonvolatile, and restores nonvolatile→volatile on reboot (claims 22–24, 7–9, 13). This is elements 1(a)–1(d), 6(ECC-adjacent), 7, and the restore direction of claims 8/19.

Jeddeloh ’742 (US 5,430,742, AST Research) supplies ECC generation and error checking in a memory controller with a data buffer (verified) → claims 6/17 and the error-check steps of claim 8.

Motivation to combine (Li + Jeddeloh): Both are memory-controller patents in the same field; adding ECC to a backup controller is the textbook way to detect corrupted data during a power-fail transfer, and Li itself flags data integrity during the copy as the design problem. Result is a predictable improvement.

The mirroring gap and how it is filled. Li/Jeddeloh do not expressly write two copies into two channels. That limitation is supplied by:

  • the well-known RAID-1/disk-mirroring paradigm (Patterson, Gibson & Katz, 1988, and the disk-array references already on the '098's face — e.g., Holzhammer ’831, Avery ’213, Crockett ’644, all 1996–97, consistent with disk-array redundancy);
  • the existence of multi-channel flash controllers — which the '098 itself concedes: "2-channel flash controllers have dedicated buffers, flash controllers, and ECC engines per each channel." A POSITA would treat a multi-channel flash subsystem as an off-the-shelf building block;
  • the known failure mode the '098 describes: with ~100K P/E endurance, uncorrectable errors appear at worn locations, and an independent second copy makes coincident failure vanishingly unlikely.

Motivation: Applying the known two-channel RAID-1 technique to the known hybrid-backup architecture is "the combination of familiar elements according to known methods … yielding predictable results" (KSR). It is also supported by the applicant's own framing: provisional 61/538,775 is titled "A METHOD OF USING STANDARD FLASH CONTROLLERS TO IMPLEMENT FLASH RAID STORAGE FUNCTIONALITY" — i.e., the inventors themselves treated the redundancy as an application of existing flash-RAID technique.

Renders obvious: claims 1, 6, 7, 12, 17, 18 and (with the restore teachings of Li ’174 and the ECC of Jeddeloh ’742) claims 8, 9, 19.

Ground 2 — Leete ’210 in view of Jeddeloh ’742 and mirroring art

Leete ’210 (US 2004/0190210 A1, Intel — "Memory back up and content preservation") is verified (from the PTAB record) to disclose: a recovery unit 708 between DRAM 704 and flash 706, "activated on detection of power failure using isolation circuitry"; a power source 716 and a capacitor-based backup battery unit 710; and power-fail/isolation circuitry that delivers power from the primary source in normal operation and from the backup unit on power failure. This is elements 1(a)–1(d) and 7/18, and the "second power supply" environment the claims sit in.

Motivation to combine with Jeddeloh ’742 and mirroring art: identical to Ground 1 — Leete supplies the power-fail transfer architecture and isolation; Jeddeloh supplies ECC; mirroring supplies the two copies. All three are in the same field and combine to the claimed subject matter with predictable results.

Ground 3 — Hoffman ’205/’821 (or Chang ’390 / Van Ness ’920) in view of Jeddeloh ’742 and mirroring art

For a maximally early-date-proof challenge, the volatile→nonvolatile-on-power-loss core can be taken from the oldest cited art: Hoffman US 4,420,821 / 4,449,205 (IBM) ("Static/Dynamic RAM with non-volatile back-up storage and method of operation thereof"), Chang US 3,916,390 (IBM) ("Dynamic memory with non-volatile back-up mode"), and Van Ness US 4,234,920 ("Power failure detection and restart system"). These establish that detecting a power failure and transferring volatile contents to non-volatile storage was a decades-old, elementary technique by the '098's priority date. Combined with Jeddeloh ’742 (ECC) and mirroring art, this ground renders claim 1 and its apparatus counterparts obvious while avoiding all CIP-priority disputes.

Motivation: Improving the reliability of a known data-transfer architecture by mirroring into two independent storage channels is an obvious quality/reliability step, and KSR permits combining a known technique from one field of storage (RAID-1) with a known memory-backup architecture ready for improvement.

Ground 4 — Sartore ’099 in view of Jeddeloh ’742 (only if claims lack 2007-06-01 priority)

Sartore ’099 (US 2009/0031099 A1, AgigA Tech / Cypress — "Power interrupt recovery in a hybrid memory subsystem") is the closest single reference and is itself on the '098's face among the cited art ("2009/0031099 Sartore"). Verified: a hybrid memory subsystem of SDRAM 102 + NAND flash 104, analog power-control circuitry, capacitor backup, and a system controller 110 that "backs up data from volatile memory to nonvolatile memory when the external power source fails, and restores data … when the external power source becomes available." The Agiga family (US 7,865,679; US 8,200,885; US 8,046,546) adds power-down-save and multi-backup/restore methodology.

Caveat: Sartore’s 2007-07-25 filing date means it is prior art only if the redundancy claims are not entitled to the 1 Jun 2007 date. If they are, this ground collapses on § 102 timing alone — a point the patent owner would press hard.


5. Dependent claims

  • Claims 2/13 (verify written copy vs. original) and 3/14 (re-write on mismatch) — flash program-verify and program-retry were standard flash-controller operations; the '098's own text says the "verification portion will be internal to flash architecture and it changes from vendor to vendor." Combined with the buffered-compare of Jeddeloh ’742, these are routine.
  • Claims 4/5, 15/16, 10/11, 20–22 (re-write to same or different location) — flash bad-block management and wear-leveling (Lofgren ’325, SanDisk) made "same vs. different physical location" a mere design choice.
  • Claims 6/17 (ECC on transferred blocks) — Jeddeloh ’742, Creta ’247, Gower ’099.
  • Claims 7/18 (trigger conditions) — Li ’174 expressly lists power failure, OS hang-up and reset; Van Ness ’920.
  • Claim 9 (error indication) — standard uncorrectable-error reporting.
  • Claim 19/20 (retrieve + error-check both copies; replace the bad copy from the good one) — Li ’174 restore + Jeddeloh ’742 ECC + mirroring; the '098 itself notes that combining error-free portions of two copies is a substitute for rewriting the whole copy.

I therefore consider the dependents obvious conditional on the independent claims falling; none of them adds a limitation with an independent inventive step.


6. Counterarguments the patent owner would raise (and § 103 rebuttals)

  1. Secondary considerations / nexus. Netlist’s 2015 Samsung JDLA and 2021 SK hynix license (both documented in the PTAB record for sibling patents) would be offered as evidence of non-obviousness. Rebuttal: licensing of a portfolio with no showing of nexus to the channel-redundancy limitations is weak; the Board has repeatedly found portfolio licenses non-probative absent a nexus.
  2. "No improvement in endurance." The '098's own specification concedes: "Using a flash redundant storage, the lifetime of product would not improve, as both devices will wear out at the same time." That admission undercuts any unexpected-results argument built on endurance and supports the "predictable result" prong of KSR.
  3. Examiner considered the art. All Tier-A references are on the '098's face; the examiner nonetheless allowed. Rebuttal: the specific combination (backup architecture + ECC + channel mirroring) need not have been applied, and KSR does not require that each reference have been considered in the exact proposed combination.
  4. Teaching away / different fields. Not available here: the backup references, the ECC reference and the mirroring art are all storage/memory-reliability art, and the applicant’s own specification bridges them.

7. Bottom line

  • Independent claims 1, 12, 19 are the strongest candidates for § 103 invalidity, via Li ’174 (or Leete ’210 / Hoffman ’205) + Jeddeloh ’742 + mirroring art. The only genuinely narrow limitation is the "first channel / second channel of the non-volatile memory subsystem" recitation; everything else (trigger detection, decoupling, controller-directed volatile→nonvolatile transfer, auxiliary capacitor power, restore) is squarely in the cited, pre-2007 art.
  • Claim 8 is obvious over Li ’174 + Jeddeloh ’742 + mirroring art, but its "replace at least one of the first and second copies with the error-free copy" step is the element for which the prior-art showing is thinnest.
  • Sartore ’099 would be the strongest single reference if the claims are not entitled to 1 Jun 2007 — but the CIP priority question is genuinely unresolved on the record I have.

Recommendation for anyone acting on this: before relying on Grounds 1–3, (a) confirm the actual disclosures of the un-verified Tier-A references against their specifications, and (b) pin down whether the channel-redundancy limitations find § 112 support in the 2008 parent (12/240,916) — because that single fact determines whether Sartore ’099 and the 2007–2011 art are available at all.

Generated 9/28/2026, 2:54:02 PM

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