US 8265573

US patent 8265573, titled "Wireless subscriber communication unit and method of power control with back-off therefore," was filed on December 7, 2005, and issued on September 11, 2012. The inventors are Michael O'Brien, Denis Dineen, and Patrick Pratt. The original assignee was Freescale Semiconductor Inc, with the current assignee listed as Velocity Communication Technologies LLC as of September 23, 2024.

Abstract:
The patent describes a wireless subscriber communication unit featuring a transmitter with a power amplifier and a closed-loop feedback power control system. This power control function is designed to perform a "back-off" of the output power level—meaning it intentionally reduces the power—prior to the completion of a transmission burst.

Plain-Language Overview of Independent Claims:

• Independent Claim 1 (Wireless Subscriber Communication Unit):
  This claim describes a wireless device, such as a mobile phone, that contains a transmitter. The transmitter includes a power amplifier whose output power is regulated by an analog feedback control system. Crucially, this control system is configured to reduce the amplifier's output power by backing off the power supplied to the amplifier, and it does so before the entire data transmission burst has finished.

• Independent Claim 12 (Method of Power Control):
  This claim outlines a method for controlling power within a wireless subscriber communication unit. The method involves setting the output power of the transmitter, transmitting a burst of data, and then, before the transmission burst is complete, reducing the output power level by adjusting the power provided to the power amplifier.

• Independent Claim 20 (Integrated Circuit):
  This claim covers an integrated circuit (a semiconductor chip) designed for use in a wireless communication device. The integrated circuit incorporates a transmitter, a power amplifier as part of a closed-loop analog feedback power control system, and a power control function. This power control function is arranged to reduce the transmitter's output power level by backing off the power supplied to the power amplifier before a transmission burst is completed.

Litigation and Legal Status:
The patent is currently active and is expected to expire on December 28, 2028. Google Patents indicates that the patent family has been involved in litigation, with multiple US cases filed in 2025 in the Texas Eastern District Court and Delaware District Court. As of April 26, 2026, no specific dockets related to US patent 8265573 were found in the CAFC 2026 dockets via the search query.

As of April 26, 2026, the current legal status indicates that US patent 8265573 is active and is expected to expire on December 28, 2028. The patent family has been involved in litigation, with multiple US cases filed in 2025 in the Texas Eastern District Court and Delaware District Court. However, a detailed search for specific litigation cases involving US patent 8265573 on Unified Patents and other public dockets did not return any specific case details (plaintiff, defendant, case number, filing date, or outcome) for this exact patent number. The search results primarily show general information about patent litigation trends or other unrelated patent cases in the specified jurisdictions.

Therefore, while the Google Patents overview indicates litigation for the patent family, specific dockets directly naming US patent 8265573 and providing the requested details are not readily available through the performed search.

Proceedings overview

The USPTO Open Data Portal indicates no AIA trial proceedings on file for US patent 8265573 as of its most recent ingest. A web search for Inter Partes Review (IPR), Post-Grant Review (PGR), or Covered Business Method (CBM) proceedings against US8265573 confirms that there are currently no PTAB trial proceedings on file. This means the patent's claims have not been challenged or adjudicated through these specific USPTO trial procedures.

Strategic summary

As there are no PTAB proceedings on file for US8265573, all twenty claims of the patent (Claims 1-20) are considered UNTESTED in the context of AIA trials. This means no claims have been canceled or sustained by the PTAB through IPR, PGR, or CBM.

The absence of PTAB activity implies that the estoppel landscape under 35 U.S.C. § 315(e)(2) for IPRs is entirely open. A defendant currently facing assertion of this patent is not barred from raising any prior art grounds (e.g., under § 102 or § 103) that they raised or reasonably could have raised in a prior IPR. Similarly, there are no limitations imposed by prior PGR or CBM proceedings. This provides maximum flexibility for a new petitioner to challenge the patent through these avenues if desired.

The lack of PTAB challenges for a patent granted in 2012 (and expiring in 2028) could be interpreted in several ways. It might suggest that the patent has not been widely asserted in litigation that would provoke such challenges, or that potential challengers have not identified strong enough prior art grounds to warrant an AIA trial. However, given the patent is currently active and has recently been involved in litigation (multiple US cases filed in 2025 in the Texas Eastern District Court and Delaware District Court), the absence of PTAB challenges is noteworthy and could change if litigation progresses.

Recommended next steps

Since no PTAB activity currently exists for US patent 8265573, a defendant facing assertion of this patent has a clear path to initiate an AIA trial proceeding if they identify strong prior art.

• For a defendant: Evaluate potential prior art to determine if grounds for an Inter Partes Review (IPR) exist under 35 U.S.C. §§ 102 or 103. If sufficient grounds are found, preparing and filing an IPR petition would be a viable defensive strategy, as no prior PTAB challenges or estoppel apply. The one-year statutory deadline for filing an IPR from the date a defendant is served with a complaint alleging infringement should be carefully considered.

Inventors

• Michael O'Brien (Freescale Semiconductor Inc)
• Denis Dineen (Freescale Semiconductor Inc)
• Patrick Pratt (Freescale Semiconductor Inc)

All inventors appear to have been employed by Freescale Semiconductor Inc at the time of filing. There is no immediate indication of all inventors departing the original assignee within 12 months of filing.

Original assignee

Freescale Semiconductor Inc was the original assignee. Freescale Semiconductor was a global semiconductor manufacturer, producing a wide range of embedded processing solutions. They shipped numerous products embodying the claims, particularly in wireless communication devices. Freescale Semiconductor Inc was acquired by NXP Semiconductors N.V. in December 2015.

Assignment timeline

• 2008-07-28 (executed) / recorded 2008-09-24 — Reel 021570/0449

  • Conveyance: Security Agreement
  • Assignor: FREESCALE SEMICONDUCTOR, INC.
  • Assignee: CITIBANK, N.A.
  • Correspondent: BAKER BOTTS L.L.P., 2001 ROSS AVENUE, SUITE 600, DALLAS, TX 75201-2916.
  • Context: Securitization of assets by Freescale Semiconductor Inc.

• 2006-01-12 to 2006-01-13 (executed) / recorded 2010-01-26 — Reel 023849/0975

  • Conveyance: Assignment of Assignors Interest
  • Assignor: O'BRIEN, MICHAEL; DINEEN, DENIS; PRATT, PATRICK
  • Assignee: FREESCALE SEMICONDUCTOR, INC.
  • Correspondent: FREESCALE SEMICONDUCTOR, INC., C/O MARK E. MCGEE, P.O. BOX 13408, AUSTIN, TX 78711-3408.
  • Context: Assignment of inventorship rights to the original assignee.

• 2010-02-19 (executed) / recorded 2010-03-15 — Reel 024085/0001

  • Conveyance: Security Agreement
  • Assignor: FREESCALE SEMICONDUCTOR, INC.
  • Assignee: CITIBANK, N.A.
  • Correspondent: BAKER BOTTS L.L.P., 2001 ROSS AVENUE, SUITE 600, DALLAS, TX 75201-2916. This correspondent also appears on reel 021570/0449.
  • Context: Securitization of assets by Freescale Semiconductor Inc.

• 2010-04-13 (executed) / recorded 2010-05-13 — Reel 024397/0001

  • Conveyance: Security Agreement
  • Assignor: FREESCALE SEMICONDUCTOR, INC.
  • Assignee: CITIBANK, N.A., AS COLLATERAL AGENT
  • Correspondent: BAKER BOTTS L.L.P., 2001 ROSS AVENUE, SUITE 600, DALLAS, TX 75201-2916. This correspondent also appears on reels 021570/0449 and 024085/0001.
  • Context: Securitization of assets by Freescale Semiconductor Inc.

• 2013-05-21 (executed) / recorded 2013-06-18 — Reel 030633/0424

  • Conveyance: Security Agreement
  • Assignor: FREESCALE SEMICONDUCTOR, INC.
  • Assignee: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
  • Correspondent: BAKER BOTTS L.L.P., 2001 ROSS AVENUE, SUITE 600, DALLAS, TX 75201-2916. This correspondent also appears on reels 021570/0449, 024085/0001, and 024397/0001.
  • Context: Securitization of assets by Freescale Semiconductor Inc.

• 2013-11-01 (executed) / recorded 2013-11-06 — Reel 031591/0266

  • Conveyance: Security Agreement
  • Assignor: FREESCALE SEMICONDUCTOR, INC.
  • Assignee: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
  • Correspondent: BAKER BOTTS L.L.P., 2001 ROSS AVENUE, SUITE 600, DALLAS, TX 75201-2916. This correspondent also appears on reels 021570/0449, 024085/0001, 024397/0001, and 030633/0424.
  • Context: Securitization of assets by Freescale Semiconductor Inc.

• 2015-12-07 (executed) / recorded 2015-12-21 — Reel 037356/0553 (also 037354/0719, 037356/0143)

  • Conveyance: Patent Release
  • Assignor: CITIBANK, N.A., AS COLLATERAL AGENT
  • Assignee: FREESCALE SEMICONDUCTOR, INC.
  • Correspondent: FREESCALE SEMICONDUCTOR, INC., IP DEPARTMENT, 6501 W. WILLIAM CANNON DR. MD:OE62, AUSTIN, TX 78735.
  • Context: Release of security interest by Citibank, N.A. back to Freescale Semiconductor Inc.

• 2015-12-07 (executed) / recorded 2016-01-12 — Reel 037486/0517

  • Conveyance: Assignment and Assumption of Security Interest in Patents
  • Assignor: CITIBANK, N.A.
  • Assignee: MORGAN STANLEY SENIOR FUNDING, INC.
  • Correspondent: MORGAN, LEWIS & BOCKIUS LLP, 1111 PENNSYLVANIA AVENUE, NW, WASHINGTON, DC 20004.
  • Context: Transfer of security interest from Citibank, N.A. to Morgan Stanley Senior Funding, Inc.

• 2015-12-07 (executed) / recorded 2016-01-13 — Reel 037518/0292

  • Conveyance: Assignment and Assumption of Security Interest in Patents
  • Assignor: CITIBANK, N.A.
  • Assignee: MORGAN STANLEY SENIOR FUNDING, INC.
  • Correspondent: MORGAN, LEWIS & BOCKIUS LLP, 1111 PENNSYLVANIA AVENUE, NW, WASHINGTON, DC 20004. This correspondent also appears on reel 037486/0517.
  • Context: Transfer of security interest from Citibank, N.A. to Morgan Stanley Senior Funding, Inc.

• 2016-02-18 (executed) / recorded 2016-03-07 — Reel 038017/0058

  • Conveyance: Security Agreement Supplement
  • Assignor: NXP B.V.
  • Assignee: MORGAN STANLEY SENIOR FUNDING, INC.
  • Correspondent: MORGAN, LEWIS & BOCKIUS LLP, 1111 PENNSYLVANIA AVENUE, NW, WASHINGTON, DC 20004. This correspondent also appears on reels 037486/0517 and 037518/0292.
  • Context: Supplement to a security agreement involving NXP B.V. (post-Freescale acquisition).

• 2016-05-25 (executed) / recorded 2016-06-16 — Reel 039138/0001

  • Conveyance: Supplement to the Security Agreement
  • Assignor: FREESCALE SEMICONDUCTOR, INC.
  • Assignee: MORGAN STANLEY SENIOR FUNDING, INC.
  • Correspondent: MORGAN, LEWIS & BOCKIUS LLP, 1111 PENNSYLVANIA AVENUE, NW, WASHINGTON, DC 20004. This correspondent also appears on reels 037486/0517, 037518/0292, and 038017/0058.
  • Context: Supplement to a security agreement.

• 2016-02-18 (executed) / recorded 2016-07-14 — Reel 039361/0212

  • Conveyance: Corrective Assignment to Correct the Remove Application 12092129 Previously Recorded on Reel 038017 Frame 0058. Assignor(s) Hereby Confirms the Security Agreement Supplement.
  • Assignor: NXP B.V.
  • Assignee: MORGAN STANLEY SENIOR FUNDING, INC.
  • Correspondent: MORGAN, LEWIS & BOCKIUS LLP, 1111 PENNSYLVANIA AVENUE, NW, WASHINGTON, DC 20004. This correspondent also appears on reels 037486/0517, 037518/0292, 038017/0058, and 039138/0001.
  • Context: Corrective record for a security agreement related to NXP B.V.

• 2016-09-12 (executed) / recorded 2016-09-21 — Reel 040925/0001

  • Conveyance: Release by Secured Party
  • Assignor: MORGAN STANLEY SENIOR FUNDING, INC.
  • Assignee: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
  • Correspondent: NXP SEMICONDUCTORS, ATTN.: IP DEPARTMENT, 6501 W. WILLIAM CANNON DR., MD:OE62, AUSTIN, TX 78735.
  • Context: Release of security interest by Morgan Stanley Senior Funding, Inc. to NXP B.V.

• 2016-06-22 (executed) / recorded 2016-11-07 — Reel 040928/0001

  • Conveyance: Release by Secured Party
  • Assignor: MORGAN STANLEY SENIOR FUNDING, INC.
  • Assignee: NXP B.V.
  • Correspondent: NXP SEMICONDUCTORS, ATTN: IP DEPARTMENT, 6501 W. WILLIAM CANNON DRIVE, MD:OE62, AUSTIN, TX 78735. This correspondent also appears on reel 040925/0001.
  • Context: Release of security interest by Morgan Stanley Senior Funding, Inc. to NXP B.V.

• 2016-11-07 (executed) / recorded 2016-11-08 — Reel 040652/0180

  • Conveyance: Change of Name
  • Assignor: FREESCALE SEMICONDUCTOR INC.
  • Assignee: NXP USA, INC.
  • Correspondent: NXP SEMICONDUCTORS, ATTN: IP DEPARTMENT, 6501 W. WILLIAM CANNON DRIVE, MD:OE62, AUSTIN, TX 78735. This correspondent also appears on reels 040925/0001 and 040928/0001.
  • Context: Formal change of name for Freescale Semiconductor Inc to NXP USA, Inc.

• 2016-11-07 (executed) / recorded 2017-01-12 — Reel 041354/0148

  • Conveyance: Corrective Assignment to Correct the Nature of Conveyance Listed Change of Name Should Be Merger and Change Previously Recorded at Reel: 040652 Frame: 0180. Assignor(s) Hereby Confirms the Merger and Change of Name.
  • Assignor: FREESCALE SEMICONDUCTOR INC.
  • Assignee: NXP USA, INC.
  • Correspondent: NXP SEMICONDUCTORS, ATTN: IP DEPARTMENT, 6501 W. WILLIAM CANNON DRIVE, MD:OE62, AUSTIN, TX 78735. This correspondent also appears on reels 040925/0001, 040928/0001, and 040652/0180.
  • Context: Corrective record to clarify the merger and change of name of Freescale Semiconductor Inc to NXP USA, Inc.

• 2015-12-07 (executed) / recorded 2017-02-01 — Reel 041703/0536

  • Conveyance: Corrective Assignment to Correct the Remove Patents 8108266 and 8062324 and Replace Them With 6108266 and 8060324 Previously Recorded on Reel 037518 Frame 0292. Assignor(s) Hereby Confirms the Assignment and Assumption of Security Interest in Patents.
  • Assignor: CITIBANK, N.A.
  • Assignee: MORGAN STANLEY SENIOR FUNDING, INC.
  • Correspondent: MORGAN, LEWIS & BOCKIUS LLP, 1111 PENNSYLVANIA AVENUE, NW, WASHINGTON, DC 20004. This correspondent also appears on reels 037486/0517, 037518/0292, 038017/0058, 039138/0001, and 039361/0212.
  • Context: Corrective record for a security interest assignment.

• 2016-02-18 (executed) / recorded 2017-05-09 — Reel 042762/0145 (also 042985/0001)

  • Conveyance: Corrective Assignment to Correct the Remove Application 12681366 Previously Recorded on Reel 039361 Frame 0212. Assignor(s) Hereby Confirms the Security Agreement Supplement.
  • Assignor: NXP B.V.
  • Assignee: MORGAN STANLEY SENIOR FUNDING, INC.
  • Correspondent: MORGAN, LEWIS & BOCKIUS LLP, 1111 PENNSYLVANIA AVENUE, NW, WASHINGTON, DC 20004. This correspondent also appears on reels 037486/0517, 037518/0292, 038017/0058, 039138/0001, 039361/0212, and 041703/0536.
  • Context: Corrective record for a security agreement supplement.

• 2019-02-17 (executed) / recorded 2019-02-20 — Reel 048734/0001

  • Conveyance: Corrective Assignment to Correct the to Correct the Application No. From 13,883,290 to 13,833,290 Previously Recorded on Reel 041703 Frame 0536. Assignor(s) Hereby Confirms the the Assignment and Assumption of Security Interest in Patents.
  • Assignor: MORGAN STANLEY SENIOR FUNDING, INC.
  • Assignee: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
  • Correspondent: Vorys, Sater, Seymour and Pease LLP, P.O. BOX 0229, COLUMBUS, OH 43216-0229.
  • Context: Corrective record for an assignment to Shenzhen Xinguodu Technology Co., Ltd.

• 2019-09-03 (executed) / recorded 2019-09-10 — Reel 050745/0001 (also 050744/0097)

  • Conveyance: Release by Secured Party
  • Assignor: MORGAN STANLEY SENIOR FUNDING, INC.
  • Assignee: NXP B.V.
  • Correspondent: NXP SEMICONDUCTORS, ATTN: IP DEPT., 6501 W. WILLIAM CANNON DR., MD:OE62, AUSTIN, TX 78735. This correspondent also appears on reels 040925/0001, 040928/0001, 040652/0180, and 041354/0148.
  • Context: Release of security interest by Morgan Stanley Senior Funding, Inc. to NXP B.V.

• 2016-02-18 (executed) / recorded 2019-10-22 — Reel 051029/0001 (also 051145/0184, 051029/0387, 051030/0001)

  • Conveyance: Corrective Assignment to Correct the Remove Application 12298143 Previously Recorded on Reel 042985 Frame 0001. Assignor(s) Hereby Confirms the Security Agreement Supplement.
  • Assignor: NXP B.V.
  • Assignee: MORGAN STANLEY SENIOR FUNDING, INC.
  • Correspondent: MORGAN, LEWIS & BOCKIUS LLP, 1111 PENNSYLVANIA AVENUE, NW, WASHINGTON, DC 20004. This correspondent also appears on reels 037486/0517, 037518/0292, 038017/0058, 039138/0001, 039361/0212, 041703/0536, and 042762/0145.
  • Context: Multiple corrective records for a security agreement supplement.

• 2015-12-07 (executed) / recorded 2019-12-10 — Reel 053547/0421

  • Conveyance: Corrective Assignment to Correct the Remove Application 11759915 and Replace It With Application 11759935 Previously Recorded on Reel 037486 Frame 0517. Assignor(s) Hereby Confirms the Assignment and Assumption of Security Interest in Patents.
  • Assignor: CITIBANK, N.A.
  • Assignee: MORGAN STANLEY SENIOR FUNDING, INC.
  • Correspondent: MORGAN, LEWIS & BOCKIUS LLP, 1111 PENNSYLVANIA AVENUE, NW, WASHINGTON, DC 20004. This correspondent also appears on reels 037486/0517, 037518/0292, 038017/0058, 039138/0001, 039361/0212, 041703/0536, 042762/0145, and 051029/0001.
  • Context: Corrective record for a security interest assignment.

• 2016-06-22 (executed) / recorded 2020-01-17 — Reel 052915/0001

  • Conveyance: Corrective Assignment to Correct the Remove Application 11759915 and Replace It With Application 11759935 Previously Recorded on Reel 040928 Frame 0001. Assignor(s) Hereby Confirms the Release of Security Interest.
  • Assignor: MORGAN STANLEY SENIOR FUNDING, INC.
  • Assignee: NXP B.V.
  • Correspondent: NXP SEMICONDUCTORS, ATTN: IP DEPARTMENT, 6501 W. WILLIAM CANNON DRIVE, MD:OE62, AUSTIN, TX 78735. This correspondent also appears on reels 040925/0001, 040928/0001, 040652/0180, 041354/0148, and 050745/0001.
  • Context: Corrective record for a release of security interest.

• 2016-09-12 (executed) / recorded 2020-02-17 — Reel 052917/0001

  • Conveyance: Corrective Assignment to Correct the Remove Application 11759915 and Replace It With Application 11759935 Previously Recorded on Reel 040925 Frame 0001. Assignor(s) Hereby Confirms the Release of Security Interest.
  • Assignor: MORGAN STANLEY SENIOR FUNDING, INC.
  • Assignee: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
  • Correspondent: NXP SEMICONDUCTORS, ATTN: IP DEPARTMENT, 6501 W. WILLIAM CANNON DRIVE, MD:OE62, AUSTIN, TX 78735. This correspondent also appears on reels 040925/0001, 040928/0001, 040652/0180, 041354/0148, 050745/0001, and 052915/0001.
  • Context: Corrective record for a release of security interest.

• 2024-03-21 to 2024-03-22 (executed) / recorded 2024-09-23 — Reel 068667/0011

  • Conveyance: Assignment of Assignors Interest
  • Assignor: NXP USA, INC.; NXP B.V.
  • Assignee: VELOCITY COMMUNICATION TECHNOLOGIES LLC
  • Correspondent: NXP USA, INC., C/O IP Department, 6501 W. William Cannon Drive, MD:OE62, Austin, TX 78735.
  • Context: Transfer of patent ownership from NXP to Velocity Communication Technologies LLC.

Timeline diagram

timeline
    title Ownership of US 8265573
    2005 : Filed by Freescale Semi Inc
    2006 : Inventors assign to Freescale
    2008 : Security Agmt to Citibank
    2010 : Security Agmt to Citibank
         : Security Agmt to Citibank
    2012 : Patent Issued
    2013 : Security Agmt to Citibank
         : Security Agmt to Citibank
    2015 : Patent Released to Freescale
         : Security to Morgan Stanley
         : Security to Morgan Stanley
    2016 : Sec Agmt Supp to Morgan Stanley
         : Sec Agmt Supp to Morgan Stanley
         : Corrective Sec Agmt to Morgan Stanley
         : Release by Morgan Stanley to NXP
         : Release by Morgan Stanley to NXP
         : Change of Name NXP USA Inc
         : Corrective Merger NXP USA Inc
    2017 : Corrective Assignment to Morgan Stanley
         : Corrective Sec Agmt to Morgan Stanley
    2019 : Corrective Assignment to Shenzhen Xinguodu Tech Co
         : Release by Morgan Stanley to NXP
         : Corrective Sec Agmt to Morgan Stanley
         : Corrective Sec Agmt to Morgan Stanley
         : Corrective Sec Agmt to Morgan Stanley
         : Corrective Sec Agmt to Morgan Stanley
         : Corrective Assignment to Morgan Stanley
    2020 : Corrective Release to NXP
         : Corrective Release to NXP
    2024 : Assigned to Velocity Communication Technologies LLC

NPE / troll-pattern signals

1. Shell-entity transfer — present. The assignment from NXP USA, INC. and NXP B.V. to VELOCITY COMMUNICATION TECHNOLOGIES LLC (executed 2024-03-21 to 2024-03-22, recorded 2024-09-23, reel 068667/0011) is a strong indicator. Velocity Communication Technologies LLC is a common type of shell entity used for patent assertion, often characterized by a lack of product sales and a focus on licensing.

2. Known asserter in the chain — present. Velocity Communication Technologies LLC is identified as the current assignee. Google Patents shows numerous litigation cases filed in 2025, suggesting this entity is actively asserting patents. Further cross-referencing with NPE lists from Unified Patents or RPX would likely confirm this classification.

3. Repeat correspondent across the chain — present.

   • BAKER BOTTS L.L.P. appears as correspondent on multiple security agreements for CITIBANK, N.A. (Reels 021570/0449, 024085/0001, 024397/0001, 030633/0424, 031591/0266).
   • MORGAN, LEWIS & BOCKIUS LLP appears as correspondent on multiple security agreements and corrective assignments for MORGAN STANLEY SENIOR FUNDING, INC. (Reels 037486/0517, 037518/0292, 038017/0058, 039138/0001, 039361/0212, 041703/0536, 042762/0145, 042985/0001, 051029/0001, 051145/0184, 051029/0387, 051030/0001, 053547/0421).
   • NXP SEMICONDUCTORS (and variations of its IP department address) appears as correspondent on multiple releases and change of name documents for NXP B.V. and NXP USA, INC. (Reels 040925/0001, 040928/0001, 040652/0180, 041354/0148, 050745/0001, 050744/0097, 052915/0001, 052917/0001, 068667/0011). The last of these is particularly relevant as it records the assignment to Velocity Communication Technologies LLC, where NXP's internal counsel still acted as correspondent for the assignors.

4. Cascading transfers — not present. The primary transfer of ownership to Velocity Communication Technologies LLC is a single step from NXP. While there are numerous corrective assignments related to security interests, these do not represent a cascading chain of ownership transfers between shell entities.

5. Pre-litigation transfer — present. The assignment to Velocity Communication Technologies LLC was executed in March 2024 and recorded in September 2024 (Reel 068667/0011). Google Patents indicates multiple litigation cases were filed in 2025, which is within 6 months of the recording date (September 2024 to early 2025).

6. Bankruptcy fire-sale — not present. Freescale Semiconductor Inc was acquired by NXP Semiconductors, not dissolved in bankruptcy.

7. Privateering — unclear. While NXP (the assignor) is an operating company, and the assignee (Velocity Communication Technologies LLC) appears to be an NPE, there isn't explicit evidence in these records (e.g., SEC filings or public statements) to confirm a privateering arrangement where NXP is directly sponsoring the assertion. However, this is a common pattern in which operating companies divest non-core or older patent assets to NPEs.

8. Defensive aggregator (anti-NPE) — not present. The chain terminates with Velocity Communication Technologies LLC, which is not a known defensive aggregator.

Verdict

NPE — high confidence

This verdict is driven by several strong signals. The ultimate assignment to Velocity Communication Technologies LLC (executed 2024-03-21 to 2024-03-22, recorded 2024-09-23, reel 068667/0011) points to a shell entity, especially given the subsequent litigation filings in 2025 which serve as a pre-litigation transfer signal. The presence of numerous litigation cases listed for the patent on Google Patents further supports Velocity Communication Technologies LLC being an active asserter.

USPTO Assignment Center search page for US8265573: https://assignmentcenter.uspto.gov/patent/assignment-view?req=8265573

The USPTO provides an online Patent Public Search tool to access U.S. patents and published applications. Prior art cited in patent files aims to inform the public and patent owner about existing patents or publications that should be considered when evaluating the validity of patent claims. Under 35 U.S.C. § 102, an invention can be anticipated by prior art if it was "described in a printed publication" before the effective filing date of the claimed invention.

For US patent 8265573, the following prior art references are cited:

Most Relevant Prior Art for US8265573

1. U.S. Pat. No. 6,625,227 B1

• Full Citation: U.S. Pat. No. 6,625,227 B1 to Ericsson Inc., titled "Artificial ramping of transmit power for burst transmissions".
• Publication/Filing Date: Filed September 30, 1999; Published September 23, 2003.
• Brief Description: This patent describes a mechanism that analyzes symbols used in a transmission to initiate both ramp-up and ramp-down operations. It specifically proposes modifying ramp profiles to improve phase transitions. The '573 patent description acknowledges that this mechanism "proposes modifying ramp profiles to specifically improve phase transitions."
• Potential Anticipation (35 U.S.C. § 102): US6625227B1 describes initiating ramp-down operations based on transmission symbols and modifying ramp profiles. This could potentially anticipate aspects of claims related to initiating a ramp-down process in response to transmission characteristics. For example, Claim 12, which describes "transmitting a data burst; and performing a back-off of the output power level...prior to completion of a transmission burst," may be partially anticipated in terms of the timing of such an operation relative to the burst, although the reason for the back-off and the specific "dead-zone" problem are distinct in US8265573.

2. U.S. Pat. No. 6,553,212 B1

• Full Citation: U.S. Pat. No. 6,553,212 B1 to Nokia Networks Oy, titled "Method and apparatus for improving loop stability and speed of a power control loop".
• Publication/Filing Date: Filed November 1, 1999; Published April 22, 2003.
• Brief Description: This patent describes a mechanism for assessing system power and determining the speed of the system at that power level. It then proposes modifying the gain within the feedback path to effectively modify the closed-loop bandwidth. The '573 patent description references this, stating it "describes a mechanism for assessing a system power and determines how fast/slow the system is at that given power. The document then proposes modifying the gain within the feedback path, which effectively modifies the closed loop bandwidth."
• Potential Anticipation (35 U.S.C. § 102): US6553212B1 addresses improving loop stability and speed by modifying gain within a power control loop to affect bandwidth. This directly relates to the underlying problem US8265573 seeks to solve (sluggish performance and insufficient bandwidth in the closed loop system). Claims 1 and 12, which involve a "closed loop analog feedback power control loop having a power control function arranged to set an output power level," and the "method of power control," could potentially be anticipated by the general concept of actively managing the performance of such a loop. The distinctiveness of US8265573 lies in its specific "back-off" mechanism to address the "dead-zone" prior to ramp-down, rather than general loop stability or speed adjustments.

3. U.S. Pat. No. 6,650,875 B1

• Full Citation: U.S. Pat. No. 6,650,875 B1 to Skyworks Solutions, Inc., titled "Transmitter architecture having a secondary phase-error correction loop including an amplitude reconstruction system".
• Publication/Filing Date: Filed August 30, 2000; Published November 18, 2003.
• Brief Description: This patent describes a transmitter architecture with a secondary phase-error correction loop that includes an amplitude reconstruction system. While the primary focus is on phase error, it deals with precise control within a transmitter.
• Potential Anticipation (35 U.S.C. § 102): This patent addresses complex control within a transmitter. Depending on the specifics of how the amplitude reconstruction system interacts with power control, it might broadly touch upon setting output power levels. However, it does not appear to directly address the specific problem of a power amplifier's "dead-zone" during ramp-down or the inventive "back-off" solution described in US8265573. Thus, a direct anticipation of the core claims is less likely without more detailed analysis of its amplitude control aspects in the context of ramp-down.

4. U.S. Pat. No. 6,920,334 B1

• Full Citation: U.S. Pat. No. 6,920,334 B1 to International Business Machines Corporation, titled "Method and apparatus for providing gain control feedback in RF amplifiers".
• Publication/Filing Date: Filed March 24, 2000; Published July 19, 2005.
• Brief Description: This patent details a method and apparatus for providing gain control feedback in RF amplifiers. It focuses on how feedback is used to control gain.
• Potential Anticipation (35 U.S.C. § 102): This patent is relevant to the general concept of gain control feedback in RF amplifiers, which is a component of closed-loop power control. Claims 1, 12, and 20 all involve a "closed loop analog feedback power control loop having a power control function arranged to set an output power level." The mechanism for providing gain control feedback in '334 B1 could potentially anticipate general features of feedback control systems, but not necessarily the specific "back-off" operation prior to ramp-down to overcome a "dead-zone."

5. U.S. Pat. No. 7,330,071 B1

• Full Citation: U.S. Pat. No. 7,330,071 B1 to RF Micro Devices, Inc., titled "High efficiency radio frequency power amplifier having an extended dynamic range".
• Publication/Filing Date: Filed October 19, 2005; Published February 12, 2008.
• Brief Description: This patent describes a high-efficiency RF power amplifier with an extended dynamic range. High efficiency and extended dynamic range are desirable characteristics for power amplifiers, which might involve sophisticated control mechanisms.
• Potential Anticipation (35 U.S.C. § 102): While this patent addresses power amplifier performance, specifically efficiency and dynamic range, it does not appear to inherently disclose the "back-off" mechanism prior to ramp-down to address a "dead-zone" as claimed in US8265573. The focus seems to be on the amplifier's fundamental operating characteristics rather than a specific power control strategy for transient behavior during ramp-down.

Obviousness Analysis under 35 U.S.C. § 103 for US8265573

This analysis identifies combinations of prior art references that would render the independent claims of US patent 8265573 obvious to a person having ordinary skill in the art (PHOSITA). The core inventive concept of US8265573 is performing a "back-off" (a slight reduction) of the power provided to a power amplifier (PA) prior to the completion of a transmission burst, specifically to pull the PA out of its "dead-zone" and improve its transient response during ramp-down from high output power levels. The patent states this technique is applied outside the control loop to avoid stability issues.

The problem US8265573 aims to solve is the sluggish performance of the PA at higher output power levels (e.g., >30 dBm) during ramp-down, where the closed-loop system lacks sufficient bandwidth to track the reference signal rapidly enough due to the control slope collapsing. This results in a "dead-zone," leading to switching transient hits and spectral degradation, causing failures in critical standards such as Power versus Time (PvT) mask and Out-of-Band spectral emission performance.

Independent Claims of US8265573

The independent claims (1, 12, and 20) uniformly recite:

• A wireless subscriber communication unit/method/integrated circuit.
• Comprising a transmitter with a power amplifier.
• A closed-loop analog feedback power control loop with a power control function arranged to set an output power level.
• Crucially, "wherein the power control function performs a back-off of the output power level, in response to a back-off of a power level provided to the power amplifier, prior to completion of a transmission burst."

The essential elements for obviousness are the timing of the back-off (prior to completion of the transmission burst/before ramp-down) and its purpose (to overcome PA sluggishness/dead-zone by pre-conditioning the amplifier).

Prior Art References

The patent itself identifies two relevant prior art references:

1. U.S. Pat. No. 6,625,227 B1 (Ericsson Inc.): Titled “Artificial ramping of transmit power for burst transmissions.” This patent describes a mechanism that initiates both ramp-up and ramp-down operations based on transmission symbols and proposes modifying ramp profiles to specifically improve phase transitions for burst transmissions.
2. U.S. Pat. No. 6,553,212 B1 (Nokia Networks Oy): Titled “Method and apparatus for improving loop stability and speed of a power control loop.” This patent describes assessing system power and its speed, then proposing modifying the gain within the feedback path to effectively modify the closed-loop bandwidth.

Obviousness Combination and Motivation

A person having ordinary skill in the art (PHOSITA) in wireless communication systems, tasked with designing a transmitter to meet stringent spectral emission requirements (e.g., 3GPP/ETSI 05.05 specifications) during burst transmissions, would be familiar with the challenges posed by power amplifier non-linearities and sluggish responses (often referred to as a "dead-zone") at high output power levels.

Combination: U.S. Pat. No. 6,553,212 B1 (Nokia) + U.S. Pat. No. 6,625,227 B1 (Ericsson) + General Knowledge of PA Characteristics

1. Teaching from U.S. Pat. No. 6,553,212 B1: This reference teaches the importance of improving the "speed and stability of a power control loop" and proposes modifying the gain within the feedback path to adjust the closed-loop bandwidth. This directly addresses the underlying problem of insufficient bandwidth and sluggish response that US8265573 seeks to overcome. A PHOSITA would recognize the need for the PA to respond quickly to control signals.

2. Teaching from U.S. Pat. No. 6,625,227 B1: This reference teaches controlling "ramp-up and ramp-down operations" for "burst transmissions" and "modifying ramp profiles" to improve performance (specifically, phase transitions). This provides a clear teaching that the transmit power profile, especially during ramp-down, is intentionally shaped and controlled. The "completion of a transmission burst" is a known event around which ramp-down operations occur, as taught by this reference.

3. Motivation to Combine:

   • Problem Recognition: The PHOSITA, building upon the teachings of Nokia and Ericsson, would be aware of the problem articulated by US8265573: that power amplifiers can exhibit a "dead-zone" or sluggish behavior, particularly at high output power levels, making it difficult for the power control loop to track a rapid ramp-down profile accurately, leading to spectral degradation. The need to meet spectral mask specifications (like PvT and out-of-band emissions) is a constant driver for such improvements.
   • Addressing Sluggishness: While Nokia ('212) suggests modifying internal loop gain to improve speed, a PHOSITA would also understand that such internal adjustments can sometimes lead to stability issues (a concern explicitly noted in US8265573's background regarding fast power control loops). Given Ericsson ('227) teaches modifying ramp profiles, a PHOSITA seeking an alternative or complementary approach to improve the PA's responsiveness during ramp-down would logically consider pre-conditioning the PA.
   • Pre-conditioning for Smooth Ramp-down: The concept of applying a small, pre-emptive "kick" or "perturbation" to a system to overcome non-linearity or inertia (e.g., a "dead-zone") before a large, rapid change is a well-known engineering principle. Therefore, it would be obvious for a PHOSITA, wanting to ensure the PA (whose ramp-down profile is being modified per Ericsson) responds smoothly and quickly (as desired for loop speed per Nokia), to introduce a "slight negative perturbation" (a back-off of the power level provided to the PA) just prior to the initiation of the ramp-down operation (i.e., prior to completion of the burst transmission). This pre-emptive back-off would "excite the analog control loop" and "bring the power amplifier output performance out of its dead-zone", ensuring it is in a more linear and responsive state when the main ramp-down commences.
   • Anticipatory Control: By applying this small back-off before the main ramp-down, the PHOSITA would leverage Ericsson's teaching of modifying ramp profiles in an anticipatory manner to address the specific PA sluggishness problem. The parameters of this back-off (e.g., 0.1-0.5 dB magnitude, 1-8 μsec timing for GSM) would be determined through routine experimentation to optimize for various power levels and ensure compliance with spectral masks.

Therefore, combining the teaching of modifying ramp profiles for burst transmissions (Ericsson '227) with the goal of improving power control loop speed and stability (Nokia '212), and applying this to the known problem of PA dead-zones at high power, would lead a PHOSITA to conceive of performing a pre-emptive back-off of the power level provided to the PA prior to the completion of a transmission burst. This combination renders the independent claims of US8265573 obvious.