US 7710385

US Patent 7,710,385 — Analyst Summary

Important caveat up front: I ran searches for the specific number 7710385 against USPTO/patent databases and the Federal Circuit (CAFC) 2026 docket material available to me. I found no CAFC 2026 appeal, IPR, or district-court docket that I can confirm lists US 7,710,385 as a patent-in-suit or patent-on-appeal. The search results returned only the patent itself (and its family members), plus unrelated hits containing similar-looking numbers (e.g., FR7710385A, NL7710385, US 7,710,385 B2 vs. US 11,087,385 B2, US 7,725,385). I am not able to state that this patent is in any 2026 CAFC litigation; treat any such association as unverified. The following comes from the authoritative full patent text supplied in the prompt.

Bibliographic Data

Abstract (as issued)

An apparatus/method in which a data driver includes a modulator that generates modulated data from input data, and a control circuit that selects between converting the modulated data to a first analog data of a driving output and converting the input data to a second analog data of the driving output, and supplies that driving output to the plurality of data lines. The driving output is said to give a gray-to-gray response time substantially the same as a black-to-white or white-to-black response time by reducing the actual liquid-crystal response time.

Technical gist

This is an over-driving patent for an active-matrix LCD. Unlike the related-art over-driving approach (U.S. Pat. No. 5,495,265 and PCT WO 99/09967) that needs a frame memory plus a look-up table to compare previous-frame MSBs with current-frame MSBs, this invention derives the over-drive boost from the current input data alone, avoiding the added memory/die area and cost. The boost is applied only during an initial portion (T1) of the data-output (source output enable, SOE) period, after which the cell is driven with the unmodified data during the remaining portion (T2). The "doubling" of SOE by the data output signal generator, the NOR-gate logic producing DOS1/DOS2, an MSB-based gray-scale analyzer, and a small adder that adds a 2–3 bit value to the MSBs are the core mechanism.

Plain-Language Overview of Each Independent Claim

Claim 1 — Data driver (broadest apparatus claim).
A data driver for an LCD with multiple data lines, comprising: (a) a modulator that makes modulated data from input data; and (b) a control circuit that chooses between (i) converting the modulated data to first analog data and (ii) converting the input data to second analog data, and then outputs whichever it selected to the data lines. The result limitation: the output gives a gray-to-gray response time essentially equal to a black-to-white or white-to-black response time, by shortening the actual liquid-crystal response time.

Claim 13 — Shift-register/latch data driver with MSB adder (structural claim).
A display data driver comprising: a latch that stores input data as latched data in response to a sampling signal; an analyzing unit that produces gray-scale data from at least two MSBs of the latched data; a data generating unit that produces modifying data of at least two bits from that gray-scale data; an adder that generates modulated data by adding the modifying data to the latched data; a first output unit that sends the modulated data to a digital-to-analog converter in response to a first logic state of a first data output signal; and a second output unit that sends the latched (unmodified) data to the DAC in response to a first logic state of a second data output signal.

Claim 19 — Data driver with data-output-signal generator + modulator (structural claim).
A display data driver comprising: a data output signal generator that generates first and second data output signals with different values in response to a control signal from a timing controller; a latch that holds input data as latched data in response to a sampling signal; a modulator that generates modulated data by combining input data with modifying data corresponding to at least two MSBs of the latched data; and a control circuit that selects between outputting the modulated data and outputting the latched data in response to a first logic state of the first and second data output signals, to produce the driving output data.

Claim 22 — Method claim (independent method).
A method of driving an LCD having liquid-crystal cells defined by gate and data lines, comprising: (1) generating modifying data from at least one MSB of input data; (2) generating modulated data by combining the input data with the modifying data; (3) selecting between converting the input data to an analog video signal and converting the modulated data to an analog video signal; and (4) supplying that analog video signal to the data lines — wherein the gray-to-gray response time is made substantially the same as a black-to-white or white-to-black response time by reducing actual liquid-crystal response time.

Claim 35 — System/apparatus claim (whole display).
An apparatus for driving an LCD comprising: an image display unit with liquid-crystal cells in areas defined by gate and data lines; a gate driver that sequentially supplies a scan pulse to the gate lines; a data driver that modulates the input data in accordance with the input data, selectively converts the input data and the modulated input data into an analog video signal, and supplies it to the data lines; and a timing controller that arranges externally supplied source data, supplies it to the data driver, and controls both the data driver and gate driver.

Implementation details from the specification (context for the claims)

• Time-split driving: DOS1 is high during the initial time period T1 (over-driven value applied); DOS2 is high during the remainder T2 (original value applied). T1 and T2 are described as substantially equal in duration (FIG. 8, FIG. 10).
• Signal generation: The SOE multiply unit doubles SOE (producing DSOE, two pulses per SOE); a delay unit delays SOE on the DSOE rising edge; NOR gates produce DOS2 (from DSOE and the delayed signal) and DOS1 (from SOE and DOS2).
• Modulation example given: latched data 011000 → 2-MSB 01 → GAS = 1 → addition bit 010 added to the 3 MSBs → modulated data 101000. Table 3 maps GAS 0/3 → 001 and GAS 1/2 → 010 (expressly stated to be an example that may be varied for resolution/mode).
• Notable drafting quirks (literal reading): Claim 1 uses the phrase "a control circuit to selects…"; claim 3 refers to "a first logic state of the first and second data output signals" where the intended meaning appears to be one or the other's first logic state; claim 19 recites "modulating data corresponding to at least two most significant bits"; claim 31 switches between "input data" and "latched data." These are reproduced verbatim from the issued text.

What I could not verify

• Any 2026 CAFC docket or appeal involving 7,710,385 — no authoritative result located. If you need a definitive litigation check, the reliable sources would be the CAFC docket (fedcir.gov / PACER), USPTO Patent Public Search and Patent Trial and Appeal Board (PTAB) APIs, and CourtListener RECAP, which I could not exhaustively query here.
• The apparent conflict in expiration records (fee lapse in 2022 vs. a listed adjusted expiration of 2029-03-03).
• The 2025–2026 LG Display v. Tianma Microelectronics disputes (E.D. Tex. and D. Del., settled May 2026) surfaced in search, but I found no confirmation that 7,710,385 is among the asserted patents, so I do not assert any connection.

I'll search for litigation involving US patent 7710385.

Let me try more targeted searches of litigation databases.

I'll verify the structured data against live sources before reporting.

Let me run additional targeted checks before concluding.

One more verification pass, then I'll report.

PTAB Proceedings on US 7,710,385 — Analyst Report

Verification performed: USPTO ODP "PTAB proceedings on file" block (canonical source) + four independent web-search passes targeting the patent number, the assignee (LG Display / LG.Philips LCD), and generic IPR/PGR/CBM phrasings. Searches returned several false positives that I am explicitly disclaiming (see note at the end). No genuine AIA trial proceeding on US 7,710,385 was located.

Proceedings overview

There are zero AIA trial proceedings on file for US 7,710,385 — 0 active, 0 claims invalidated, 0 claims sustained, 0 settled, 0 institution denials. The defensive posture this gives a defendant is therefore not "the patent has survived IPRs and is hardened" and not "claims 1–5 have been canceled." It is a third posture the framework above doesn't anticipate: the patent was never PTAB-tested, and it no longer needs to be — US 7,710,385 lapsed for failure to pay maintenance fees with an effective date of 2022-05-04 (lapse recorded 2022-06-06), meaning the enforcement exposure is a closed historical damages window, not a live injunction/threat problem.

Proceedings

None. There is no proceeding to report under this heading.

Because the structured ODP block is the canonical list and it returns no AIA trial proceedings, and because independent web searches surfaced no petition, institution decision, Final Written Decision, or termination for this patent, I am not creating any ### {PROCEEDING_NUMBER} — {Petitioner} v. {Patent Owner} entries. Fabricating a proceeding number, a panel, or an FWD disposition here would be the single most damaging error possible in this deliverable, and the user's constraints expressly forbid it.

Confidence: High that no reported AIA trial exists. Moderate-to-high that no such trial was ever instituted and terminated quietly — no IPR/PGR/CBM docket leaves zero trace in the PTAB E2E public docket, in Google Patents' "Cited By / PTAB" surfaces, or in the family-member record (EP1870876B1, JP4634364B2, KR101232161B1, CN100543829C, TWI350505B) — all of which show no adversarial post-grant activity. I did not have direct docket-level access to PTAB E2E in this session; a defendant's counsel should confirm with a direct PTAB E2E / Patent Trial and Appeal Board End-to-End docket query before relying on the absence as a litigation fact.

Negative findings, itemized (so they aren't mistaken for results)

Strategic summary

Claim status of US 7,710,385 — CANCELED vs. SUSTAINED vs. UNTESTED. No claim of this patent has ever been canceled, and none has ever been sustained in a PTAB trial, because no claim has ever been tested in one. All 44 claims remain as issued (claims 1–21 and 35–44 recite apparatus/data-driver structure; claims 22–34 recite the method; independent claims are 1, 13, 19, 22, and 35, with the balance depending from them in the claim sets as filed). This "all claims intact" status is a paper status only. Under 35 U.S.C. § 311(c) and § 315, AIA trial review of an expired patent remains theoretically available historically but is now moot for prospective conduct: the patent's term ended in practical effect on 2022-05-04, and the ODP record shows statutory disclaimer-by-nonpayment under 37 C.F.R. § 1.362 rather than the nominal 2029-03-03 adjusted expiration carried in the bibliographic field. Any defendant should reconcile those two dates immediately, because the "expires 2029-03-03" line in the Google Patents bibliographic block is not the operative terminal event.

Estoppel landscape. Because no IPR/PGR/CBM was ever instituted, § 315(e)(2) estoppel never attached against anyone. There is no petitioner, no privy, and no real party in interest who is barred from raising any § 102/§ 103 ground. For a defendant currently being asserted against, the practical consequence is inverted from the usual IPR analysis: nothing in the IPR track is closed off — but that is a hollow benefit, since invalidity is not the useful lever here. The useful levers are (a) the lapse/expiration date, which caps recoverable damages to the pre-2022 window subject to § 286's six-year lookback, and (b) whether the patent was ever asserted during its life at all (my searches found no 7710385-based complaint, no ITC Section 337 action, and no district court docket referencing it). The patent appears never to have been litigated.

Pattern signals. No repeat petitioner exists because there is no petitioner. No PTAB-to-Federal-Circuit appellate history exists (no IPR FWD → CAFC appeal chain, and no CourtListener hit). No defensive aggregator (Unified Patents, RPX, AST, LOT Network) appears anywhere in the chain — those entities file IPRs against asserted patents, and this patent's absence from their portfolios is consistent with it never having been asserted. The prosecution-adjacent history is ordinary and non-adversarial: the only "Citations" and "Cited By" traffic is examiner-cited art and later LG Display/Samsung Display family filings, plus a single third-party cite (US 9,847,066 B2, Samsung Display).

Recommended next steps

• If you are a defendant facing a demand letter citing US 7,710,385: lead with the maintenance-fee lapse, not with invalidity. The ODP legal-events record states "PATENT EXPIRED FOR FAILURE TO PAY MAINTENANCE FEES (ORIG. EVENT CODE: EXP.)" with the 2022-06-06 lapse entry and 2022-05-04 effective lapse date. Verify both against USPTO Patent Center's fee history (https://patentcenter.uspto.gov) and, if they hold, demand the plaintiff identify (i) the last date of alleged infringing conduct and (ii) its § 286 damages theory. A demand letter asserting a patent that lapsed in 2022 is, at best, a stale-damages play; at worst it is a Rule 11 problem.
• Do not build a defense on an IPR that doesn't exist. There is no FWD to link to and no canceled claim to quote. If you nonetheless want a PTAB record as leverage, note that an expired patent is a poor IPR target and that the fee lapse has already done the work for you.
• Confirm the docket-level negative directly. Query PTAB E2E (https://ptacts.uspto.gov) by patent number 7,710,385 and by application number 11/642,859, and run a PACER/CourtListener search for the patent number. Two independent confirmations of the null result convert it from "no PTAB activity surfaced" into a citable litigation fact.
• Watch the family, not this member. LG Display's related-family practice and the cited-by US 9,847,066 B2 (Samsung Display, "Method of operating display panel") are where any future over-driving assertions would live. US 7,710,385 itself is a dead end for enforcement purposes.

Explicit non-fabrication note: I did not locate — and therefore have not reported — a petitioner name, a proceeding number, an APJ panel, an institution date, a hearing date, an FWD, a settlement, a termination, or a Federal Circuit docket number for US 7,710,385. None of those exist in the canonical ODP block, and none emerged from search. Everything above that looks like a specific identifier (case numbers, dates, patent numbers) is either quoted from the provided record or explicitly labeled as belonging to a different patent.

Primary sources for the null result:

• Google Patents record for US7710385B2 (bibliographic, legal events, family, citations): https://patents.google.com/patent/US7710385/en
• PTAB E2E public docket (for direct confirmation): https://ptacts.uspto.gov
• USPTO Patent Center (fee/maintenance history): https://patentcenter.uspto.gov

I'll verify the assignment record against USPTO sources and check for any correspondent/attorney data before writing up.

Let me try to pull the correspondent of record for the two reels directly.

Assignment Record Reconstruction — US 7,710,385 B2

"Apparatus and method for driving liquid crystal display device" — Appl. No. 11/642,859, filed 2006-12-21, granted 2010-05-04.

Sourcing note: The assignment reels/frames and execution dates below are taken from the Google Patents legal-events table reproduced in the supplied patent file, which mirrors the USPTO Assignment Search record. The correspondent (recording attorney/agent) field is not exposed in the text-indexed record for either reel. I could not retrieve it from open web sources; confirming it requires opening the per-record detail or the recorded PDF image in Assignment Center. I have flagged this rather than guessed.

Inventors

Both inventors assigned their entire interest to the corporate employer one day after the 2006-12-19 execution date and two days before the 2006-12-21 filing, i.e. a standard employee-inventor assignment taken at filing. This is the ordinary "hired-to-invent" pattern, not a departure signal.

Pattern note: I found no evidence of either inventor departing the original assignee within 12 months of filing. Pre-fire-sale inventor attrition is therefore not determinable / not indicated here. Both are common Korean-family names, and I could not reliably de-duplicate them against later filings — treat any post-2008 attribution as unverified. No other unusual inventor patterns.

Original assignee

• Entity named on the issued patent: LG Display Co., Ltd. (current assignee of record), successor by change of name to LG.Philips LCD Co., Ltd., the entity named at filing.
• Note on literal record: the 2006 assignment is recorded to "LG.PHILPS LCD CO., LTD." — a misspelling of "Philips" that appears verbatim in the USPTO record. I have preserved it as recorded. It is a clerical error in a single link, not a distinct entity.
• Primary line of business: design and manufacture of TFT-LCD and OLED display panels (thin-film transistor array, low-temperature polysilicon, and OLED process technology), per the corporate-purpose recital in the LG corporate-register filings surfaced in USPTO assignment records.
• Did they ship a product embodying the claims? Yes, in substance. The claims are directed to a data driver IC (modulator + control circuit selecting between modulated and unmodulated data within a split source-output-enable window) for an LCD panel. LG.Philips LCD / LG Display built LCD panels and modules that incorporate such source-driver ICs. Caveat: the asserted subject matter sits in the drive-IC and driving-method layer, which LG Display sourced from third-party driver-IC vendors as well as developing in-house — so "ships an embodying product" is true at the panel/module level.
• Current status: Operating. LG Display Co., Ltd. is a publicly listed, currently operating display manufacturer. The patent is a separate matter — see below.
• Corporate lineage (from USPTO correspondence): Gold Star Software Co., Ltd. → LG Software Co., Ltd. (1995) → LG Soft Co., Ltd. (1997) → LG LCD Co., Ltd. (1998-11-16) → LG Philips LCD Co., Ltd. (1999-08-27) → LG Display Co., Ltd. (changed 2008-02-29, registered 2008-03-04). This lineage is corroborated by a notarial certificate in a different USPTO assignment reel (025497/0417) for unrelated LG patents; it is consistent with, but not itself part of, this patent's chain.

Assignment timeline

Two recorded documents. There is no post-issuance transfer of ownership — the chain is a single employee assignment plus one pure name change.

2006-12-19 (executed) / recorded 2006-12-21 — Reel 018735/0935

• Conveyance: Assignment (Assignment of Assignors' Interest)
• Assignor: Lee, Seok Woo; So, Hyun Jin (individually)
• Assignee: LG.PHILPS LCD CO., LTD. (sic), Republic of Korea
• Correspondent: Not exposed in the indexed record — unverified. Would need to be pulled from the Assignment Center per-record detail or the recorded PDF. (For calibration: another, unrelated LG name-change recording on reel 025497/0417 lists correspondent Eric J. Nuss, McKenna Long & Aldridge LLP, 1900 K Street NW, Washington DC, submitted via MLAIP@mckenna
  long.com. That entry is not in this patent's chain and must not be attributed to it — I mention it only to show what the field looks like when it is populated, and to pre-empt a false match on request.)
• Context: Acquisition — standard employee-inventor assignment taken at filing of a corporate R&D patent.

2008-03-04 (executed) / recorded 2008-10-17 — Reel 021754/0230

• Conveyance: Change of Name
• Assignor: LG.PHILIPS LCD CO., LTD.
• Assignee: LG DISPLAY CO., LTD., Republic of Korea
• Correspondent: Not exposed in the indexed record — unverified (same limitation as above).
• Context: Change of name only. No new consideration, no third party, no change in beneficial ownership — LG.Philips LCD renamed itself LG Display after Royal Philips exited the JV. This is a corporate-registry event, not a transfer.

No further recorded assignments. The remaining legal events are purely administrative:

• 2009-12-08 FEPP; 2010-04-14 patent grant recorded
• 2013-10-25 maintenance fee, 4th year
• 2017-09-22 maintenance fee, 8th year ($0 further payments)
• 2021-12-20 maintenance-fee reminder mailed
• 2022-06-06 patent expired for failure to pay maintenance fees (37 CFR 1.362); lapse effective 2022-05-04
• Nominal "adjusted expiration" listed as 2029-03-03

Timeline diagram

timeline
    title Ownership of US 7710385
    2006 : Inventors assign to LG Philips LCD
         : Recorded reel 018735/0935
    2008 : Corporate name change to LG Display
         : Recorded reel 021754/0230
    2010 : Patent issued
    2022 : Patent expired for unpaid maintenance fee

NPE / troll-pattern signals

Verdict

Insufficient data — the record consists only of the original inventor assignment (reel 018735/0935, executed 2006-12-19, recorded 2006-12-21) plus a pure change of name (reel 021754/0230, executed 2008-03-04, recorded 2008-10-17). No shell transfer, no asserter, no litigation, and no defensive aggregation appears anywhere in the chain.

This is a dead-end chain at the original operating company, not an NPE chain. The strongest affirmative evidence is negative: the patent was never asserted (family litigation count 0), and LG Display allowed it to lapse on 2022-06-06 for non-payment of maintenance fees — conduct inconsistent with a patent being curated for licensing or assertion. The single genuine gap in the record is the correspondent field, which I could not retrieve; it is low-value here because both recordings are same-assignee house filings, so a recurring attorney would signify nothing probative.

Verify at: USPTO Assignment Center — https://assignmentcenter.uspto.gov/ (search "7710385" or App. No. 11/642,859). Confirm reel 018735/0935 and reel 021754/0230 and open the per-record detail to fill the correspondent field, which is the one unverified data point in this report.

I'll research US patent 7710385 and its cited prior art references.

I have the authoritative patent text. Let me verify details on the key prior-art references before analysis.

Prior-Art Analysis — U.S. Patent No. 7710385

1. Identification of the Patent (interpreted literally)

Independents to be tested for § 102: claim 1 (data driver), claim 13 (data driver), claim 19 (data driver), claim 22 (method), claim 35 (LCD apparatus). Dependent claims 2–12, 14–18, 20–21, 23–34, 36–44 add time-splitting, data-output-signal generation, and MSB-adder structure.

Important framing note: the 7710385 specification itself expressly discusses only two pieces of related art — U.S. Pat. No. 5,495,265 and PCT Publication WO 99/09967 ("over-driving method") — neither of which appears in the Google Patents front-page citation list below. The references that follow are the examiner/IDS citations actually listed on 7710385 (10 "Citations," an 11th granted counterpart, and 8 "Family Cites Families"). Being cited on the face of a patent is not by itself evidence of anticipation; § 102 requires a single reference disclosing every limitation. My claim mappings below are therefore ranked by strength and flagged accordingly.

2. Cited References — Full Citations, Dates, Descriptions, and § 102 Candidates

A. "Patent Citations" listed on 7710385

B. "Family Cites Families" (8) — related-family references

3. § 102 Anticipation Mapping (by claim)

Because true § 102 anticipation requires one reference to disclose every element, I separate "strong § 102 candidate" from "§ 103/background."

Strongest candidate — EP 1 669 975 A2 (Samsung) › claims 1, 2, 19, 22, 24, 35, 36

EP1669975 discloses a signal controller producing plural output image data (higher-"upper" and lower-"lower" data) and a multiplexer that selects one of them for the data driver depending on a field-selecting signal; the data driver converts the selected data to analog data voltages applied to the pixels. That maps closely onto the 7710385 selection architecture of claim 1 ("control circuit to select between converting the modulated data to first analog data … and converting the input data to second analog data"), the two-phase supply of claim 2 (first portion vs. second portion of a period), and apparatus claim 35. Caveat: EP1669975 obtains its two data values from a frame memory + look-up table, whereas 7710385 expressly claims to eliminate the memory by deriving modifying data from the MSBs at add-time; EP1669975's "lower" data is also frequently black (impulsive driving) rather than an MSB-incremented value. So EP1669975 is a strong § 103 reference and a plausible but not clean § 102 reference against the broadest independent claims.

Claims 22, 23, 31, 32 (method: modifying data from MSB(s); modulated data by combining)

• US 2003/0048246 A1 / KR 100769168 B1 (LG.Philips LCD, 2001/2003) — discloses generating modulated data (MRGB) from most-significant-bit comparison and combining it with LSB data before supply. This is the closest single-reference disclosure of the "generating modifying data from at least one/two MSB" and "generating modulated data by combining" steps → candidate against claims 22, 23, 31. Note, however, that it compares current vs. previous frame MSBs (memory-based), which is precisely the prior art 7710385 distinguishes.
• US 5,495,265 and WO 99/09967 — expressly named in 7710385's own Background as the over-driving method → § 102/§ 103 candidates for the general "modulate data to accelerate response" concept (claims 1, 22, 35) but they do not disclose the two-phase input/modulated selection.

Claims 1, 13, 19, 22, 35 (driver/method/apparatus broadly)

• US 8,259,052 B2 (LG Display, 2005/2012) — modulated data voltage for accelerated LCD response → strong § 103 (and possible § 102) against independent claims 1, 22, 35.
• US 2005/0156851 A1 = US 7,432,902 B2 (LG.Philips, 2003/2008) — frame-frequency multiplication + N-bit→(N−1)-bit modulation + data driver applying modulated data → relevant to claims 1, 13, 22.
• US 2006/0017713 A1 (LG.Philips, 2004/2006) — shift-register/latch/DAC driving circuit → relevant to structural claims 3, 7, 9, 37, 39, 41 (latched data, sampling, DAC, output units).

Background / § 103-supporting only (no clean single-reference § 102 hit)

• US 5,659,331 A (Samsung, 1995/1997) — multi-level gray-scale STN driving with a column signal calculator operating on display data. It forms row/column voltage levels per data bit but does not disclose a modulator that adds MSB-derived modifying data nor a selectable two-phase output; best treated as background/§ 103.
• JP H1082985 A (Casio) — Japanese display-element disclosure; classified on the face as non-asterisked (i.e., not examiner-flagged as a § 102 reference). No reliable English detail obtained; I cannot confirm a § 102 hit — treat as background pending the family's JP prosecution record.
• US 2006/0125718 A1 (Weitbruch) and US 2007/0040847 A1 (Thebault) — signal/video-data processing; background for image-data handling, § 103 at best.
• US 2009/0219279 A1 (Ishii) — memory-access driving; background, § 103 at best.

References that are not available as § 102/§ 103 prior art against 7710385

• US 2008/0001910 A1 (LG.Philips) — filed 2006-06-30, which is after 7710385's 2006-06-23 priority date. As a published application it cannot qualify as § 102(a)/(e) or § 103 prior art against 7710385's claims (it appears on the face as a same-family/co-pending citation). I flag this explicitly rather than accepting the face listing at face value.

Foreign family members — not independent prior art

JP 2506582 B2, JP 3568615 B2, JP 2000-242234 A, JP 2001-272955 A, JP 4631163 B2, JP 2003-131637 A, KR 100769168 B1 correspond to the same-generation art and/or foreign family members; KR 100769168 B1 is the counterpart of US 2003/0048246 A1 and its disclosure should be read together with that US publication, not counted twice.

4. Bottom Line

• The most relevant prior art to US 7710385 is, in order: (1) EP 1 669 975 A2 (Samsung) — two output image data words selected by a multiplexer and converted to analog voltages; (2) US 2003/0048246 A1 / KR 100769168 B1 (LG.Philips) — MSB-based data modulation/over-driving; (3) US 7,432,902 B2 / US 2005/0156851 A1 (LG.Philips) — frame-frequency multiplication with N→N−1 bit data modulation; and (4) US 8,259,052 B2 (LG Display) — modulated data voltage for accelerated LCD response. The patent's own specification also relies on US 5,495,265 and WO 99/09967 as the over-driving background.
• Clean § 102 anticipation of any independent claim could not be confirmed from the face-of-patent citations alone: the closest references (EP1669975 and the LG over-driving publications) each lack at least one element — the absence of a frame memory and the within-period switching between an MSB-incremented "modulated" word and the unmodified input word that define the independent claims. The cited art is best characterized as § 103 material (and as the IDS/background that motivated the "no-memory" advantage recited in the 7710385 preamble).
• Caveats: (i) My § 102/§ 103 assignments are provisional — a definitive determination requires element-by-element comparison against the actual reference texts (several of which I retrieved only in abstract/summary form, notably JP H1082985 A). (ii) US 2008/0001910 A1 is post-priority and should be excluded as prior art. (iii) The reference IDs above are reproduced literally as listed on 7710385 (e.g., the assignee string "LG.PHILPS LCD CO., LTD." in the assignment record, and the pairing of US 2005/0156851 A1 with granted US 7,432,902 B2), without correction.

Sources: US7710385B2 full text and citation lists (patents.google.com/patent/US7710385/en); Justia, patents.justia.com/patent/7710385; Google Patents EP1669975A2; Espacenet/Google Patents US5659331; Google Patents/KR20050070205A and patents-review.com for US2005/0156851; szpa.org family records for EP1870876/US7710385 simple family.

I'll ground this analysis in the prior art actually cited on the US 7,710,385 page, verifying what several of those references disclose.

Let me verify the remaining key references.

Obviousness Analysis — U.S. Patent No. 7,710,385 B2

"Apparatus and method for driving liquid crystal display device"
Assignee: LG Display Co., Ltd. (originally LG.Philips LCD) · Inventors: Seok Woo Lee, Hyun Jin So
KR priority P2006-56859 (2006‑06‑23) · US filed 2006‑12‑21 · Granted 2010‑05‑04 · Status: Expired – Fee Related (maintenance fee lapsed 2022)

Scope note. This is a retrospective, hypothetical § 103 analysis of a now‑expired patent. The patent has not been asserted and I found no litigation. Because the application was filed before 2013‑03‑16, pre‑AIA 35 U.S.C. § 103(a) governs, with the critical date being the KR priority date of 2006‑06‑23 (and, at the latest, the US filing date of 2006‑12‑21). All references below are drawn from the "Citations," "Patent Citations," "Family Cites Families," and "Similar Documents" sections of the patent page itself.

1. Legal framework applied

• Graham v. John Deere Co., 383 U.S. 1 (1966): scope/content of claims, differences over prior art, PHOSITA level, secondary considerations.
• KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398 (2007): a combination of known elements, each performing its known function, is obvious where the result is predictable; where there is "a finite number of identified, predictable solutions," the combination is obvious to try.
• MPEP § 2143 (exemplary rationales: known technique to improve similar devices; simple substitution; obvious to try).
• In re Best / In re Swinehart: where a claim recites a result or property and the prior art discloses the same structure or process, the result is presumed inherent absent proof of a different property.

The last point matters here because each independent claim closes with a result limitation ("the driving output provides a gray‑to‑gray response time … substantially the same as one of a black‑to‑white and a white‑to‑black response time …"). That is a function of the known over‑drive mechanism (increasing |V_a² − V_F²| in the patent's own Equation 1), not a structural distinction.

2. What is actually claimed

Critically, the specification's own Background is largely admitted prior art. It concedes (a) that over‑driving via a look‑up table is known (U.S. Pat. No. 5,495,265; WO 99/09967), (b) that MSB‑only comparison against a previous frame is known (FIG. 3), and (c) that the frame‑memory + LUT apparatus of FIG. 4 is known and is the thing the invention is trying to eliminate ("The use of the digital memory … increases chip size as well as manufacturing costs"). That concession severely narrows the gap between the claims and the art.

3. The prior art on the face of the patent page

A. US 8,259,052 B2 / US 2006/0197733 A1 — LG Display, Lee & Kim (2005 priority; granted 2012)

"Apparatus and method for driving liquid crystal display with a modulated data voltage for an accelerated response speed of the liquid crystal" (listed under Family Cites Families, so it is LG's own earlier, co‑pending work).

This is the most damaging reference, and it is not merely analogous — its disclosure is a near‑verbatim twin of the '385's Background section (same field, same τ_r/τ_F equations, same discussion of U.S. 5,495,265 / WO 99/09967, same "even without using a memory" objective). Selected verified disclosure:

• A shift register, a latch, a modulator, and a digital/analog converter in the data driver.
• The modulator "generat[es] a modulated data voltage for acceleration of a response speed of a liquid crystal according to an M‑bit (where M is a positive integer smaller than or equal to N) data value of the sampled digital data signal" — i.e., modulation derived from the input data's own most‑significant bits, with no frame memory.
• A mixer that "mix[es] the modulated data voltage with the analog data voltage to form a mixed data voltage."
• Claim 4: "the data driver supplies the mixed data voltage to the data lines in a first period of the gate pulse and supplies the analog data voltage to the data lines in a second period of the gate pulse."
• Claim 5: the first period is shorter than the second.
• Claim 6: the modulated data voltage has a level and/or pulse width modulated according to the M‑bit data.

That maps essentially element‑for‑element onto claim 1 (modulator + selection between modulated and un‑modulated conversion), claim 2 (non‑overlapping first/second portions), claim 5 (≥2 MSBs), and claim 24/36 (method/apparatus counterparts). Because it is a published US application by a different inventive entity with an earlier effective filing date in 2005, it is available at minimum as pre‑AIA § 102(e) art, and its subject matter renders the broadest claims obvious even if one disputes the § 102(e) date.

(Date caveat: the patent page's family table lists a 2005‑03‑07 priority date, while a third‑party database lists a 2005‑08‑15 filing date. Either date precedes 2006‑06‑23, so the conclusion is unaffected.)

B. US 2006/0017713 A1 — LG.Philips LCD (pub. 2006‑01‑26); family CN 1725286 A (pub. 2006‑01‑25)

"Driving circuit of liquid crystal display device and method for driving the same." Its stated purpose is "to improve a response speed of liquid crystal molecule without an additional memory" — the exact problem the '385 patent identifies.

Verified disclosure (from the US publication and the CN family member):

• A modulator that modulates the amplitude and pulse width of a first (normal) data signal to produce a second (boosted) data signal.
• The second data signal has a larger amplitude and a narrower pulse width than the first.
• A mixer (合成器) that combines the first and second data signals, with the combined signal supplied to the data lines.
• Claim 5 / claim 7: "the second data signal is combined with the initial portion of the first data signal," and "the second data signal is added to the initial part of the first data signal."
• Claim 15: "the modulator modulates the first data signal according to the gray level of the first data signal."

This discloses the architectural heart of the '385: a boosted drive pulse applied to the leading/initial portion of the horizontal period, followed by the normal (target) data value, derived from the gray level of the incoming data rather than from a stored previous frame.

C. US 2003/0048246 A1 — LG.Philips LCD (pub. 2003‑03‑13; granted US 7,161,575; KR 100769168 B1)

"Method and apparatus for driving liquid crystal display." Discloses modulating source data using previously registered data and supplying the modulated source data to the panel during the initial period of one frame interval, then applying the source data positioned between the modulated data and black data during the remainder of the frame — i.e., temporal sequencing of over‑driven data followed by the true data value. Also describes the frame memory 43 + LUT 44 arrangement and MSB/LSB recombination that the '385's Background reproduces (FIG. 3/FIG. 4).

D. EP 1,669,975 A2 — Samsung Electronics (filed 2005‑12‑09; published 2006‑06‑14)

"Liquid crystal display device and data signal driving apparatus." Published nine days before the '385's KR priority date, so it is squarely available under pre‑AIA § 102(a)/(b) even against the earliest possible critical date.

Verified disclosure:

• A signal controller converts input image data at a first frequency into a plurality of output image data at a second (higher) frequency; "the first frequency may be 60 Hz" and "the second frequency may be double."
• Data from a frame memory is modified into "upper output image data" and "lower output image data," which are output by a multiplexer "depending on a control signal for output," the control signal value being determined by field parity.
• "The respective data voltages corresponding to the first output image data and the second output image data may be transmitted for one field, and a period corresponding to the one field may be 1/2 H."

This is a two‑valued digital selection driven by a control signal, converted sequentially to analog within a ½ H interval — the exact structural predicate of the '385's "first/second data output signals" and its T1/T2 sub‑period split, albeit implemented in the Samsung reference prior to the DAC rather than after it. A POSITA optimizing for placement of the selection logic (in the timing controller vs. in the data driver) would recognize that as a mere relocation of function.

E. US 5,659,331 — Samsung Display Devices (1997)

"Apparatus and method for driving multi‑level gray scale display." Discloses a column signal operating means that receives display data and outputs column data, a standard voltage selection signal generator receiving a clock, an analog multiplexer selecting one of a plurality of standard voltages in response to that selection signal, and voltage dividers generating multiple gray levels. Useful as secondary art for the "analyzing unit → multi‑level data → analog selection" architecture of claims 9, 13, and 41, and for the proposition that generating multiple drive levels from a small set of control bits was long conventional.

F. Additional listed references (secondary)

• US 2005/0156851 A1 → US 7,432,902 B2 (LG.Philips) — LCD device and driving method; same assignee, same field of endeavor. I could not independently verify its specific disclosure in this session; I therefore do not rely on it as a primary reference.
• US 2006/0125718 A1 (Weitbruch) — adaptive noise reduction for digital display panels; US 2007/0040847 A1 (Thebault) — processing video data for a display device. Both show that frame‑based digital modification of display data (quantization, filtering, bit manipulation) was routine.
• US 2008/0001910 A1 (LG.Philips, filed 2006‑06‑30) and US 2009/0219279 A1 (Ishii) — these post‑date the 2006‑06‑23 priority date and are not reliable § 102 art against the '385; I exclude them from the combinations.
• JPH 1082985 A (Casio, 1998) — display element/device. Not independently verified.

4. Combinations that render the claims obvious

Combination 1 (primary): US 8,259,052 / US 2006/0197733 A1, alone or + US 2006/0017713 A1

Claims 1, 2, 5, 11, 12, 14, 18, 21, 24, 36 — rendered obvious, and arguably anticipated.
US 8,259,052 discloses the modulator, the latch/shift register/DAC chain, the "M‑bit data value of the sampled digital data signal" (≥1 or ≥2 MSBs, N‑bit latched data, positive‑only boosting), and the first‑period/second‑period drive split. Adding US 2006/0017713 supplies the express teaching that the boosted value is applied to the initial portion of the period and that modulation is by gray level of the input data. The only remaining difference — placing the selection downstream of the latch and using SOE‑derived gating — is the kind of design choice KSR holds unpatentable.

Combination 2: US 2006/0017713 A1 + EP 1,669,975 A2

Claims 1, 3, 13, 19, 22, 25, 35 — rendered obvious.
US 2006/0017713 provides the modulator/mixer and the "initial portion" drive; EP 1,669,975 provides the control‑signal‑driven multiplexer selecting one of two modified data values and the sequential analog conversion of both values within a short (½ H) interval, plus the express statement that the two output data are derived by modifying a single input value. Combining a "modulator + mixer" teaching with a "two modified digital values + multiplexer + control signal" teaching is the combination of two known elements each performing its known function, with the predictable result of over‑driving the pixel at the start of the write period and settling to the target value.

Combination 3: US 2003/0048246 A1 + US 2006/0017713 A1 (+ US 8,259,052)

Claims 1, 2, 22, 24, 36 — rendered obvious.
US 2003/0048246 teaches driving the panel with the modulated value first and the true source data thereafter within the same frame; US 2006/0017713 teaches doing the same at the sub‑horizontal‑period level using amplitude/pulse‑width modulation. Compressing the "initial period of one frame" to "initial period of one horizontal period" is an obvious scaling of a known technique given the known semiconductor budget, and US 8,259,052 confirms the art already applied the technique within a gate‑pulse period.

Combination 4: Combination 1 + US 5,659,331 (and/or US 2003/0048246 A1)

Claims 9, 10, 15, 41, 42 — rendered obvious.
US 5,659,331 discloses the "operating means that receives display data and outputs (multi‑level) column data," an analog multiplexer responding to a selection signal, and divider‑generated multi‑level voltages. The '385's "analyzing unit → gray‑scale data → ≥2‑bit modifying data → adder" is nothing more than the well‑known practice of deriving a code from the leading bits of a data word and arithmetically adding it to that word before D/A conversion — precisely what US 2003/0048246 A1 does when it recombines modulated MSB data with the un‑modulated LSB data on bus line 41.

Combination 5: Combination 1 + routine digital design (claims 7, 8, 28–30)

The "multiply SOE by two → delay → NOR → DOS2 → NOR → DOS1" logic is not a patentable implementation. To emit two data values per horizontal period, one must derive two non‑overlapping output‑enable pulses from the existing SOE. A clock doubler plus a delay element plus NOR gating is among a finite number of identified, predictable solutions (KSR), and the specification itself concedes the alternatives ("the invention may be practic[ed] using correspondences other than that illustrated in table 3"; Table 3's mapping is expressly exemplary).

5. Motivation to combine — articulated per KSR/MPEP § 2143

1. Same field of endeavor, same problem, same assignee. US 8,259,052 and US 2006/0017713 are LG/LG.Philips references, and US 8,259,052 shares inventor Seok Woo Lee with the '385. Their specifications and the '385's specification discuss the identical equations, identical prior art (U.S. 5,495,265; WO 99/09967), and the identical objective. This is the strongest possible "reason the skilled artisan would have combined" — they were literally the same engineering effort.
2. The '385's stated problem is in the references' stated solutions. The '385 faults the frame memory/LUT for "increas[ing] chip size as well as manufacturing costs." US 2006/0017713 announces it improves response speed "without an additional memory," and US 8,259,052 announces the response speed "can be increased even without using a memory." A POSITA seeking the '385's own goal would have been led directly to these references.
3. Known technique, known improvement. Over‑driving is admitted prior art. Removing the frame‑memory comparison and modulating on the current frame's own MSBs is a simplification of a known technique with a predictable trade‑off (less precise, but far cheaper) — obvious under the "known technique to improve similar devices" rationale.
4. Sub‑period time multiplexing is known. US 8,259,052 (claim 4), US 2006/0017713 (claims 5, 7), US 2003/0048246 (initial period of the frame), and EP 1,669,975 (two output data within ½ H) all teach applying two different drive values to the same pixel within a single write event. The '385's T1/T2 split is the predictable convergence of these teachings.
5. No teaching away. None of the listed references disparages memory‑less MSB‑based modulation, sub‑horizontal over‑drive, or gray‑level‑based modulation. There is no criticality disclosed for T1 = T2 beyond the single sentence "the initial time period (T1) is substantially equal in duration to the remaining time period (T2)" — an unclaimed design parameter.

6. Rebuttal / secondary-consideration assessment

• Alleged unexpected result ("gray‑to‑gray ≈ black‑to‑white"). The specification offers no comparative data — no measured curves, no table, no test results — showing that the two‑step drive actually achieves parity with a full black‑to‑white transition, or that it outperforms the admitted over‑drive art. Under In re Best/In re Swinehart and MPEP 2114, a claimed result that follows from the disclosed structure carries no independent patentable weight.
• Elimination of the frame memory (cost/size). This is real, but it is not attributable to the '385: US 2006/0017713 and US 8,259,052, both pre‑dating the priority date, achieve the same memory elimination and state the same advantage. Where the advantage is already realized by the prior art, it cannot rebut obviousness.
• Commercial success / long‑felt need. I found no evidence of either, and the patent lapsed for non‑payment in 2022 without any recorded litigation on the page.
• What may survive. If one credits the "first period shorter than the second period" or a specific non‑overlapping/enable‑derivation limitation, those features are conventional; nothing in the page's art record shows a genuine departure. Claim 35 (system claim) is additionally vulnerable because its four recited blocks (image display unit with gate/data lines, gate driver, data driver, timing controller) are described in the '385's own FIG. 5 and are described verbatim in US 8,259,052.

7. Conclusion

The '385's claims are, in substance, directed to (i) modulating data using its own most‑significant bits instead of a stored previous frame, and (ii) applying the modulated value at the start of the write period and the true value for the remainder — both of which were taught, in the same field, by the same assignee's own earlier applications, one of which shares an inventor and a Background section with the '385. A person of ordinary skill in the art at the 2006‑06‑23 critical date, faced with the admitted problem of over‑drive memory cost, would have had ample reason to arrive at the claimed subject matter.

Verification caveats (per your strict-interpretation instruction)

• I did not auto-correct any identifier. The assignee name as originally recorded ("LG.PHILPS LCD CO., LTD.") is reproduced as it appears on the page; the odd spelling on the initial assignment record and the "LG.PHILPS" typography in the "Other versions"/reassignment data are treated literally as data, not errors to fix.
• The page renders one classification line as "G09G3/3611 — Control of matrices with row and column drivers" and separately "G09G3/3685 — Details of drivers for data electrodes." I reproduce these as given; note that the current CPC for G09G3/3611 is "Control of matrices with row and column drivers," which is consistent.
• Not independently verified in this session: the specific disclosures of US 2005/0156851 A1 / US 7,432,902 B2, JPH 1082985 A, US 2006/0125718 A1, US 2007/0040847 A1, US 2008/0001910 A1, and US 2009/0219279 A1. I have therefore built the combinations only on references whose contents I could confirm (US 8,259,052 / US 2006/0197733 A1, US 2006/0017713 A1 and its CN 1725286 A family member, US 2003/0048246 A1, EP 1,669,975 A2, and US 5,659,331).
• Date conflict flagged, not resolved: the patent page's family table lists US 8,259,052 B2 with a 2005‑03‑07 priority date, whereas a third‑party database lists its application date as 2005‑08‑15. Both precede the 2006‑06‑23 critical date, so the obviousness conclusion is unchanged, but the precise § 102(e) date should be confirmed against USPTO PatentCenter before any formal validity opinion is issued.

Primary source: https://patents.google.com/patent/US7710385/en (claims 1–44; "Citations" and "Family Cites Families" tables).
Corroborating sources retrieved: https://patents.google.com/patent/US8259052 (claim 4/5 text) · https://patents.google.com/patent/US20060017713 · https://patents.google.com/patent/US20030048246 · https://patents.google.com/patent/EP1669975A2/en · https://patents.google.com/patent/US5659331