US 7372960

US patent 7372960, titled "Method and apparatus for performing finite field calculations," was invented by Robert J. Lambert. The application was filed on January 29, 2002, and the patent was issued on May 13, 2008. The original assignee was Certicom Corp, and the current assignee is Malikie Innovations Ltd.

Abstract:
The invention provides a finite field engine and methods for operating on elements within a finite field. This engine utilizes sub-engines suitable for any finite field size that requires a fixed number of machine words. It reuses these sub-engines, along with a general-purpose or specific component for modular reduction tailored to the exact reduction (polynomial or prime) of a particular finite field. The engine includes word-sized code capable of adding, subtracting, multiplying, squaring, or inverting finite field elements, as long as these elements can be represented within the given number of words. This word-sized code generates unreduced values, which are then subjected to a specific reduction appropriate for the finite field. This approach allows for the creation of fast engines for many specific finite fields without needing to duplicate the main part of the engine's programming.

Plain-Language Overview of Independent Claims:

• Claim 1: Method of adding finite field elements
  This claim describes a method for adding two elements in a finite field. It involves storing the two elements in registers, each made up of a set number of machine words. An accumulator, also made of a set number of machine words, is used to compute an initial, "unreduced" sum by performing an exclusive-OR (XOR) operation on the corresponding machine words of the two elements. Once this unreduced sum is computed, a specific modular reduction is performed to convert it into a proper field element of the finite field, resulting in a "reduced result." This reduced result is then used in a cryptographic operation.

• Claim 2: Finite field multiplier
  This claim describes a system (a finite field multiplier) for multiplying two elements from a chosen finite field, where different finite fields are grouped into subsets based on their properties. The multiplier includes various word-sized multiplication units, each designed for a specific subset of finite fields, and a dedicated reduction unit for each individual finite field. A processor in the system is configured to select the appropriate word-sized multiplier for the chosen finite field to calculate an "unreduced intermediate product." After this unreduced product is found, the processor then identifies the correct modular reduction for the specific finite field and uses the reduction unit to reduce the intermediate product to a valid field element, producing the final product of the two elements.

• Claim 3: Method of performing a finite field operation
  This claim outlines a general method for performing any finite field operation on elements. It begins by representing each element using a specific number of machine words. A word-sized, non-reducing version of the desired finite field operation (e.g., addition, multiplication) is then performed on these representations, continuing for each word, to get an "unreduced result." Once this unreduced result is computed, a specific modular reduction is applied to bring it down to the size of a true field element, yielding a "reduced result." This final reduced result is then used in a cryptographic operation.

• Claim 4: Finite field engine
  This claim describes a finite field engine designed to perform operations on elements from a chosen finite field, where all possible finite fields are categorized into subsets by their word size. The engine contains a finite field operator for each of these subsets and a distinct finite field reducer for each specific finite field. A processor within the engine is set up to pick the correct finite field operator for the subset containing the chosen finite field, and the specific finite field reducer for that field. It then applies the chosen operator multiple times to the elements to produce an "unreduced intermediate result." After this, the processor applies the chosen reducer to the unreduced result to bring it to a valid field element size for the selected finite field, which is the final result of the operation.

• Claim 5: Cryptographic system
  This claim describes a cryptographic system that uses elliptic curves. The system includes multiple elliptic curves, each with its own parameters and associated finite field. There are specific settings for each finite field, and a collection of word-sized finite fields, each having routines, with every actual finite field assigned to one of these word-sized versions. Additionally, there's a unique reduction routine for each finite field. A processor in the system performs cryptographic operations by first choosing an elliptic curve. It then executes a "non-reducing cryptographic function" using the routines from the word-sized finite field assigned to the chosen elliptic curve's finite field, which results in an "unreduced result." This function includes at least one finite field operation. Following this, a modular reduction, specific to the chosen finite field, is performed on the unreduced result to shrink it to a field element of that finite field, providing a "reduced result" in a predetermined number of words.

CAFC 2026 Dockets:
As of April 26, 2026, a search for US patent 7372960 in the CAFC 2026 dockets did not yield any direct results indicating active litigation at the Federal Circuit for this patent during 2026. However, it is noted that the Google Patents page for US7372960 indicates "Family has litigation" with US cases filed in the Texas Western District Court (case 7:25-cv-00222) and Texas Eastern District Court (case 2:25-cv-00519) in 2025. These are district court cases, and while they could potentially lead to appeals at the CAFC in 2026 or later, no such appeals are explicitly listed in the provided search results for 2026. The patent's "Adjusted expiration" date was May 31, 2024, indicating it has already expired.## US Patent 7372960: Method and Apparatus for Performing Finite Field Calculations

Title: Method and apparatus for performing finite field calculations

Assignee:

• Current: Malikie Innovations Ltd
• Original: Certicom Corp

Inventor(s): Robert J. Lambert

Filing Date: January 29, 2002

Issue Date: May 13, 2008

Abstract:
The invention provides a finite field engine and methods for operating on elements in a finite field. The finite field engine includes sub-engines designed for any finite field size that can be represented by a fixed number of machine words. This engine reuses these sub-engines along with a general-purpose or specific component for modular reduction, which is tailored to the exact reduction (polynomial or prime) of a particular finite field. The engine features word-sized code capable of performing addition, subtraction, multiplication, squaring, or inversion of finite field elements, provided they fit within the specified number of words. This word-sized code generates unreduced values, to which a specific reduction is then applied, suitable for the particular finite field. This approach allows for the creation of fast engines for numerous specific finite fields without needing to duplicate the core engine instructions.

Plain-Language Overview of Independent Claims:

• Claim 1: Method for Finite Field Addition
  This claim describes a method for adding two elements within a finite field. First, it involves storing the two elements in separate registers, each consisting of a specific number of machine words. An accumulator, also made of a specified number of machine words, is used to compute an initial, unreduced sum by performing an exclusive-OR (XOR) operation on the corresponding machine words of the two elements. Once this unreduced sum is computed, a specific modular reduction process is applied to reduce the result to a valid field element of that finite field. This final, reduced result is then used in a cryptographic operation.

• Claim 2: Finite Field Multiplier Apparatus
  This claim defines a finite field multiplier designed to multiply two elements from a selected finite field. The finite fields are categorized into groups (subsets). The multiplier includes several word-sized multiplication units, each suitable for multiplying elements within a specific subset of finite fields, and a dedicated finite field reducer for each individual finite field. A processor in the system is configured to choose the correct word-sized multiplier for the selected finite field to perform a non-reducing computation, which yields an unreduced intermediate product. After this, the processor identifies the specific modular reduction for the selected finite field and uses the reducer to process the unreduced intermediate product, reducing it to a valid field element to obtain the final product of the two elements.

• Claim 3: Method for Performing a General Finite Field Operation
  This claim describes a general method for carrying out a finite field operation on elements. Each element is represented as a specific number of machine words. A non-reducing, word-sized version of the finite field operation is performed on these representations, completing the operation for each word, to produce an unreduced result. After computing this unreduced result, a specific modular reduction is applied to reduce it to a valid field element of the finite field, thereby obtaining a reduced result. This reduced result is then utilized in a cryptographic operation.

• Claim 4: Finite Field Engine Apparatus
  This claim describes a finite field engine for performing operations on elements from a chosen finite field, where the set of all finite fields is organized into subsets based on their word size. The engine comprises a finite field operator for each subset and a finite field reducer for each individual finite field. A processor in the engine is configured to select the appropriate finite field operator corresponding to the subset of the chosen finite field, and the specific finite field reducer for that field. The processor performs a non-reducing computation by applying the chosen finite field operator multiple times to the elements to generate an unreduced intermediate result. Upon computing this unreduced result, the chosen finite field reducer is applied to reduce it to a valid field element of the selected finite field, providing the final result of the finite field operation.

• Claim 5: Cryptographic System
  This claim describes a cryptographic system that includes several elliptic curves, each defined by specific parameters and an associated finite field. The system also has finite field settings for each finite field, and a collection of word-sized finite fields with their respective routines, with each actual finite field assigned to one of these word-sized versions. A unique reduction routine is provided for each finite field. A processor in the system is configured to perform cryptographic operations by first selecting an elliptic curve. It then executes a non-reducing cryptographic function using routines from the word-sized finite field corresponding to the selected elliptic curve's finite field, which results in an unreduced output. This function includes at least one finite field operation. Subsequently, a modular reduction specific to the respective finite field is performed on the unreduced result to reduce it to a valid field element, obtaining a reduced result of the operation in a predetermined number of words.

CAFC 2026 Dockets:
As of April 26, 2026, a search for US patent 7372960 in the CAFC 2026 dockets did not directly return any active litigation cases at the Federal Circuit for this patent. However, the Google Patents entry for US7372960 indicates that the "Family has litigation," referencing US cases filed in the Texas Western District Court (case 7:25-cv-00222) and the Texas Eastern District Court (case 2:25-cv-00519) in 2025. While these are district court cases, they could potentially lead to appeals at the CAFC. The patent's adjusted expiration date was May 31, 2024.

Known litigation involving US patent 7372960 is as follows:

• Case 1:

  • Jurisdiction: Texas Western District Court
  • Case Number: 7:25-cv-00222
  • Filing Date: 2025 (specific date not provided in snippet)
  • Outcome or Current Status: Active litigation; no specific outcome provided.

• Case 2:

  • Jurisdiction: Texas Eastern District Court
  • Case Number: 2:25-cv-00519
  • Filing Date: 2025 (specific date not provided in snippet)
  • Outcome or Current Status: Active litigation; no specific outcome provided.

Please note that the Google Patents page for US7372960 states "Family has litigation" and references these two district court cases. The patent's "Adjusted expiration" date was May 31, 2024, indicating it has already expired. No direct results for litigation at the CAFC in 2026 were found for this patent.

Proceedings overview

There are no AIA trial proceedings (Inter Partes Review, Post-Grant Review, or Covered Business Method review) on file for US Patent 7372960 as of the current date, based on the USPTO Open Data Portal API and supplemental web searches. This provides a defendant with a relatively strong defensive posture in terms of PTAB challenges, as the patent claims have not been subjected to, nor survived, any such proceedings.

Strategic summary

As there are no PTAB proceedings on file for US7372960, all claims (claims 1-9) remain untested by these particular administrative review processes. This means that if the patent owner asserts this patent, a defendant is not estopped by 35 U.S.C. § 315(e)(2) from challenging the patentability of claims using prior art grounds that could have been raised in an IPR, PGR, or CBM. The full range of prior art defenses remains available for a potential defendant to raise in district court or in a newly filed PTAB petition. The absence of PTAB activity suggests that either the patent has not been aggressively asserted in a manner that would provoke such challenges, or that potential challengers have not yet found compelling grounds or strategic reasons to file.

Recommended next steps

Since no PTAB activity exists for US7372960, a defendant currently facing assertion of this patent should:

• Conduct a thorough prior art search: With no estoppel from previous PTAB proceedings, a defendant can explore all available prior art to challenge the patentability of claims 1-9.
• Evaluate potential PTAB filing: Assess the strength of any newly discovered prior art against the patent claims to determine if filing an IPR (or other relevant AIA trial) would be a viable defensive strategy. The patent expired on May 31, 2024, which limits the types of PTAB proceedings available for newly filed petitions, but challenges may still be possible depending on specific circumstances (e.g., if a prior art ground was not available before the patent's expiration).
• Review district court litigation: The Google Patents page indicates "Family has litigation" with US cases filed in the Texas Western District Court (case 7:25-cv-00222) and Texas Eastern District Court (case 2:25-cv-00519) in 2025. Monitoring these district court cases may reveal insights into the patent owner's assertion strategy, claims being asserted, and any prior art or invalidity arguments being presented there.

Inventors

The sole inventor named on US patent 7372960 is Robert J. Lambert. At the time of filing, it is implied that Mr. Lambert was employed by Certicom Corp, the original assignee, given the immediate assignment of the inventor's interest to Certicom Corp on April 26, 2002, shortly after the application filing date of January 29, 2002. There are no unusual patterns, such as the inventor departing the original assignee within 12 months of filing, readily apparent from the provided information.

Original assignee

The original assignee named on US patent 7372960 was Certicom Corp. Certicom Corp was a company known for providing security solutions, particularly in the realm of elliptic curve cryptography (ECC), which aligns directly with the patent's focus on finite field calculations for cryptographic systems. Certicom Corp was acquired by Research In Motion (now BlackBerry Limited) in 2009. Therefore, Certicom Corp is no longer an independent operating entity.

Assignment timeline

• 2002-04-26 (executed) / recorded 2002-05-13 — Reel 001272/0839
  • Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST
  • Assignor: LAMBERT, ROBERT J.
  • Assignee: CERTICOM CORP.
  • Correspondent: BLAKE, CASSINI & SNYDER; SUITE 1600, 20 QUEEN STREET WEST, TORONTO, ONTARIO, M5H 3R3, CANADA
  • Context: Original assignment from inventor to the initial corporate assignee.
• 2019-10-02 (executed) / recorded 2019-10-18 — Reel 005391/0088
  • Conveyance: ASSIGNMENT OF ASSIGNOR'S INTEREST
  • Assignor: CERTICOM CORP.
  • Assignee: BLACKBERRY LIMITED
  • Correspondent: MARVIN L. BEAN; BLACKBERRY LIMITED, 2200 UNIVERSITY AVENUE EAST, WATERLOO, ONTARIO, N2K 0A7, CANADA
  • Context: Transfer of patent ownership as part of the acquisition of Certicom Corp by Research In Motion (now BlackBerry Limited).
• 2023-06-16 (executed) / recorded 2023-06-21 — Reel 006429/0352
  • Conveyance: ASSIGNMENT OF ASSIGNOR'S INTEREST
  • Assignor: BLACKBERRY LIMITED
  • Assignee: MALIKIE INNOVATIONS LIMITED
  • Correspondent: BRENTON A. PALMER; ST. JOHN & PARTNERS, P.O. BOX 10074, 13188 MOONLIGHT DRIVE, GRAND CAYMAN, KY1-1002, CAYMAN ISLANDS.
  • Context: Transfer from an operating company (BlackBerry) to a new, potentially licensing-focused, entity (Malikie).
• 2023-06-19 (executed) / recorded 2023-06-21 — Reel 006429/0355
  • Conveyance: NUNC PRO TUNC ASSIGNMENT
  • Assignor: BLACKBERRY LIMITED
  • Assignee: MALIKIE INNOVATIONS LIMITED
  • Correspondent: BRENTON A. PALMER; ST. JOHN & PARTNERS, P.O. BOX 10074, 13188 MOONLIGHT DRIVE, GRAND CAYMAN, KY1-1002, CAYMAN ISLANDS. This correspondent recurs in this chain.
  • Context: Corrective assignment related to the previous transfer to Malikie Innovations Limited.

Timeline diagram

timeline
    title Ownership of US 7372960
    2002 : Assigned to Certicom Corp
    2008 : Patent Issued
    2019 : Assigned to BlackBerry Limited
    2023 : Assigned to Malikie Innovations Ltd
         : Corrective assignment to Malikie
    2025 : First litigation filed

NPE / troll-pattern signals

1. Shell-entity transfer
   • Present. The patent was transferred from BlackBerry Limited (an operating company) to Malikie Innovations Limited (Reel 006429/0352, executed 2023-06-16). Malikie Innovations Limited has an address listed in the Cayman Islands (P.O. BOX 10074, 13188 MOONLIGHT DRIVE, GRAND CAYMAN, KY1-1002), which is a common indicator of a shell entity or patent holding company.
2. Known asserter in the chain
   • Present. Malikie Innovations Ltd. is the current assignee and is actively asserting this patent in district court litigation (Texas Western District Court case 7:25-cv-00222 and Texas Eastern District Court case 2:25-cv-00519).
3. Repeat correspondent across the chain
   • Present. Brenton A. Palmer of St. John & Partners appears as the correspondent for both assignments to Malikie Innovations Limited (Reel 006429/0352 and 006429/0355, recorded 2023-06-21). This recurrence signals a consistent legal representative for the current assignee.
4. Cascading transfers
   • Not present. The transfers in the chain occurred over several years (2002, 2019, 2023), not multiple consecutive assignments within a short period.
5. Pre-litigation transfer
   • Present. The assignments to Malikie Innovations Limited were executed in June 2023 (Reel 006429/0352, Reel 006429/0355), and district court litigation against the patent family was filed in 2025. While not within a strict 6-month window, the transfer occurred approximately 1.5 years before the first known assertion by the new assignee, indicating the chain was arranged to enable future assertion.
6. Bankruptcy fire-sale
   • Not present. There is no indication of Certicom Corp or BlackBerry Limited filing for bankruptcy and selling patents in proceedings.
7. Privateering
   • Unclear. While BlackBerry Limited transferred the patent, there is no publicly available information in the provided snippets to confirm that Malikie Innovations Limited is asserting the patent on BlackBerry's behalf against competitors.
8. Defensive aggregator (anti-NPE)
   • Not present. The chain terminates with Malikie Innovations Limited, which is identified as an asserting entity, not a defensive aggregator.

Verdict

NPE — high confidence

The patent exhibits strong NPE characteristics. It was transferred from an operating company (BlackBerry Limited) to Malikie Innovations Limited in June 2023 (Reel 006429/0352), an entity whose correspondent lists an address in the Cayman Islands, suggesting a shell structure. Malikie Innovations Limited is actively asserting this patent in district court litigation (Texas Western District Court 7:25-cv-00222, Texas Eastern District Court 2:25-cv-00519), confirming its role as an asserter. The same correspondent attorney handled both assignments to Malikie (Reel 006429/0352 and 006429/0355).

USPTO Assignment Center search for US7372960: https://assignmentcenter.uspto.gov/patents/7372960

To identify the most relevant prior art for US patent 7372960, we will examine the "Cited By" and "Citations" sections of the Google Patents page, which reflect the prior art considered during the examination process. Prior art refers to any public information that existed before the effective filing date of a patent application and can be used to determine the novelty and non-obviousness of an invention.

Based on the provided patent text, the "Citations" section lists patents that were cited during the prosecution of US7372960. These are generally considered the most direct prior art references by the examiner.

Here are the details of the prior art citations:

1. US5982895A

• Full Citation: US5982895A, "Finite field inverse circuit for use in an elliptic curve processor"
• Publication/Filing Date: Priority date: 1997-12-24, Publication date: 1999-11-09
• Brief Description: This patent describes a finite field inverse circuit specifically designed for use in an elliptic curve processor. This is relevant as US7372960 details methods and apparatus for finite field calculations, including inversion, within cryptographic systems like ECC.
• Potential Anticipation (35 U.S.C. § 102): US5982895A potentially anticipates claims related to finite field inversion, particularly those aspects of claims 3 and 4 that broadly cover performing finite field operations (where inversion is a specific operation) and claim 5 which mentions finite field operations within a cryptographic system. The specific circuits and methods for inversion described in US5982895A could potentially anticipate the "wordsized inversion" discussed in US7372960, especially if the described inversion method in US7372960, which uses the Extended Euclidean Algorithm, shares fundamental similarities with the prior art.

2. US6049815A

• Full Citation: US6049815A, "Method and apparatus for finite field multiplication"
• Publication/Filing Date: Priority date: 1996-12-30, Publication date: 2000-04-11
• Brief Description: This patent focuses on methods and apparatus for finite field multiplication. US7372960 extensively describes word-sized multiplication techniques and a finite field multiplier.
• Potential Anticipation (35 U.S.C. § 102): US6049815A is highly relevant to claim 2 (Finite field multiplier) and claim 9 (method where finite field operation is multiplication). It also potentially anticipates aspects of claims 3 and 4 relating to performing general finite field operations, specifically multiplication. The methods described in US6049815A for finite field multiplication would be directly compared to the multiplication methods detailed in US7372960, particularly the "wordsized multiplication" and the use of dedicated multiplication hardware.

3. US6199086B1

• Full Citation: US6199086B1, "Circuit and method for decompressing compressed elliptic curve points"
• Publication/Filing Date: Priority date: 1997-12-24, Publication date: 2001-03-06
• Brief Description: This patent describes a circuit and method for decompressing elliptic curve points. While not directly about finite field arithmetic operations themselves, it pertains to the broader context of elliptic curve cryptography (ECC) where finite field calculations are fundamental.
• Potential Anticipation (35 U.S.C. § 102): This patent is less likely to directly anticipate the specific finite field calculation methods of US7372960. However, it could be relevant to the cryptographic system claim (Claim 5) as it describes a component used within an ECC system, thereby establishing prior art in the overall ECC system architecture. It might also show the general state of the art in ECC, influencing obviousness arguments.

4. US6230179B1

• Full Citation: US6230179B1, "Finite field multiplier with intrinsic modular reduction"
• Publication/Filing Date: Priority date: 1997-04-18, Publication date: 2001-05-08
• Brief Description: This patent describes a finite field multiplier that incorporates intrinsic modular reduction. This is highly pertinent to US7372960, which emphasizes a two-step process of non-reducing computation followed by specific modular reduction for finite field operations, particularly multiplication.
• Potential Anticipation (35 U.S.C. § 102): This patent is extremely relevant to claim 2 (Finite field multiplier), claim 3 (Method of performing a finite field operation, specifically including modular reduction), claim 4 (Finite field engine, with finite field operator and reducer), and claim 9 (method where finite field operation is multiplication). The concept of a multiplier with intrinsic modular reduction could potentially anticipate the claimed separation and subsequent application of reduction in US7372960, depending on the specifics of how "intrinsic" reduction is implemented compared to US7372960's "specific modular reduction" after an "unreduced intermediate product."

5. US6263081B1

• Full Citation: US6263081B1, "Elliptic curve calculation apparatus capable of calculating multiples at high speed"
• Publication/Filing Date: Priority date: 1997-07-17, Publication date: 2001-07-17
• Brief Description: This patent details an apparatus for high-speed elliptic curve calculations, particularly scalar multiplication. Elliptic curve operations heavily rely on underlying finite field arithmetic.
• Potential Anticipation (35 U.S.C. § 102): While not directly claiming finite field arithmetic at the lowest level, US6263081B1 could be relevant to claim 5 (Cryptographic system) by demonstrating prior art in high-speed ECC systems that implicitly or explicitly utilize finite field calculations. It sets the context for the need for efficient finite field operations in cryptographic systems.

6. US6430588B1

• Full Citation: US6430588B1, "Apparatus and method for elliptic-curve multiplication and recording medium having recorded thereon a program for implementing the method"
• Publication/Filing Date: Priority date: 1998-09-03, Publication date: 2002-08-06
• Brief Description: This patent describes an apparatus and method for elliptic-curve multiplication, which is a high-level operation built upon finite field arithmetic.
• Potential Anticipation (35 U.S.C. § 102): Similar to US6263081B1, this patent is relevant to claim 5 (Cryptographic system) by showcasing prior art in methods and apparatus for ECC scalar multiplication. It contributes to the overall landscape of efficient ECC implementations, which US7372960 aims to improve through its finite field engine.

7. US6466668B1

• Full Citation: US6466668B1, "IC card equipped with elliptical curve encryption processing facility"
• Publication/Filing Date: Priority date: 1998-01-28, Publication date: 2002-10-15
• Brief Description: This patent describes an IC card incorporating an elliptic curve encryption processing facility. This demonstrates the application of ECC in constrained environments.
• Potential Anticipation (35 U.S.C. § 102): This patent is relevant to claim 5 (Cryptographic system) by showing prior art for cryptographic systems that utilize elliptic curves, particularly in embedded or constrained devices, which is an area where ECC is noted as being particularly useful in the background of US7372960.

8. US6480606B1

• Full Citation: US6480606B1, "Elliptic curve encryption method and system"
• Publication/Filing Date: Priority date: 1998-02-26, Publication date: 2002-11-12
• Brief Description: This patent outlines an elliptic curve encryption method and system.
• Potential Anticipation (35 U.S.C. § 102): This patent is relevant to claim 5 (Cryptographic system) as it describes an overall ECC encryption system, setting the stage for the improvements in finite field calculations offered by US7372960 within such systems.

9. US6618483B1

• Full Citation: US6618483B1, "Elliptic curve encryption systems"
• Publication/Filing Date: Priority date: 1994-07-29, Publication date: 2003-09-09
• Brief Description: This patent generally describes elliptic curve encryption systems.
• Potential Anticipation (35 U.S.C. § 102): Similar to other ECC system patents, this reference contributes to the prior art for claim 5 (Cryptographic system) by disclosing general elliptic curve encryption systems.

10. US7286666B1

• Full Citation: US7286666B1, "Countermeasure method in an electric component implementing an elliptical curve type public key cryptography algorithm"
• Publication/Filing Date: Priority date: 1999-03-26, Publication date: 2007-10-23
• Brief Description: This patent describes a countermeasure method in an electrical component implementing an elliptic curve public key cryptography algorithm, focusing on security aspects.
• Potential Anticipation (35 U.S.C. § 102): This patent is relevant to claim 5 (Cryptographic system) as it addresses security implementations within ECC, providing context for the application of finite field calculations in secure systems.

Summary of Most Relevant Prior Art:

The most relevant prior art references, based on direct functional correspondence to the claims of US7372960, appear to be:

• US6049815A ("Method and apparatus for finite field multiplication"): Directly addresses finite field multiplication, making it highly relevant to claim 2 (Finite field multiplier) and claim 9 (method of multiplication).
• US6230179B1 ("Finite field multiplier with intrinsic modular reduction"): Directly addresses finite field multiplication with modular reduction, making it highly relevant to claim 2 (Finite field multiplier), claim 3 (method including modular reduction), claim 4 (finite field engine with reducer), and claim 9. The distinction between "intrinsic" and the "non-reducing computation followed by specific modular reduction" in US7372960 would be a key point of analysis.
• US5982895A ("Finite field inverse circuit for use in an elliptic curve processor"): Directly addresses finite field inversion, making it relevant to claims 3 and 4 (for general finite field operations, including inversion) and by extension the method of inversion discussed in the patent.

These patents directly tackle the core finite field arithmetic operations (multiplication and inversion) and the integration of modular reduction, which are central to the claims of US7372960. The remaining cited patents generally provide context for elliptic curve cryptography systems where these finite field operations are applied, and thus are more relevant to the cryptographic system claim (Claim 5) and potential obviousness arguments rather than direct anticipation of the finite field calculation methods and apparatus themselves.

Obviousness Analysis of US Patent 7372960 under 35 U.S.C. § 103

This analysis identifies combinations of prior art references that would render the independent claims of US patent 7372960 obvious to a person having ordinary skill in the art (PHOSITA) as of the priority date of December 31, 2001. The core inventive concept of US7372960 centers on separating "wordsized" non-reducing finite field operations from specific modular reduction routines to achieve code reusability and efficiency, particularly within cryptographic systems like Elliptic Curve Cryptography (ECC) that need to support multiple finite fields.

Common General Knowledge in the Art (CGK)

At the time of the invention, a PHOSITA in the field of cryptographic hardware and software design would have possessed the following common general knowledge:

• Finite Field Arithmetic in Cryptography: Finite field operations (addition, subtraction, multiplication, inversion, squaring) are fundamental to public-key cryptography, especially ECC. [Description, "Elliptic curve cryptography... calculations are done in the underlying finite field"]
• Multi-precision Arithmetic: Finite field elements for cryptographic applications (e.g., 160 bits or more) often exceed single machine word lengths (e.g., 16, 32, or 64 bits), necessitating representation across multiple machine words and multi-precision arithmetic techniques. [Description, "finite field elements are often too long to be represented in a single machine word of the engine... these elements must be represented in several machine words."]
• Modular Arithmetic: All finite field operations ultimately require a modular reduction step to ensure results remain within the defined field. [Description, "With either type of codes, it is necessary to provide finite field operations including multiplication, addition, inversion, squaring and modular reduction."]
• Software Engineering Principles: Modularity, code reuse, and separation of concerns are well-established principles to improve software maintainability, flexibility, and reduce code size, especially for libraries designed to support varied parameters.
• F2m Addition as XOR: In binary finite fields (F2m), addition is equivalent to the bitwise exclusive-OR (XOR) operation. [Description, "A separate subtraction operation is not necessary in F 2 m because subtraction is the same as addition since the field of characteristic 2."]

Obviousness Combination for Independent Claims 1, 3, 4, and 5

The independent claims 1, 3, 4, and 5 all share the central idea of performing a non-reducing wordsized finite field computation to obtain an unreduced result, followed by a specific modular reduction to obtain a reduced result for use in a cryptographic operation.

References:

• US6618483B1 (Certicom Corporation): "Elliptic curve encryption systems." This patent establishes the context of ECC and the use of finite field operations within cryptographic systems. It highlights the need for efficient and robust implementations of finite field arithmetic for ECC.
• US6230179B1 (Motorola, Inc.): "Finite field multiplier with intrinsic modular reduction." This reference teaches a system where modular reduction is integrated directly into the multiplication process.
• US6049815A (Certicom Corp.): "Method and apparatus for finite field multiplication." This patent discloses methods and apparatus for finite field multiplication, a core finite field operation.
• Common General Knowledge (CGK): Principles of multi-precision arithmetic, software modularity, and the specific arithmetic of F2m fields (XOR for addition).

Motivation to Combine and Explanation of Obviousness:

1. Problem Recognition: A PHOSITA, working on cryptographic systems (as taught by US6618483B1), would recognize the challenge of implementing ECC efficiently across various finite fields. The '960 patent's background explicitly states this problem: "an implementation of elliptic curve cryptography may need to support several different finite fields for use in particular applications. Implementing an elliptic curve cryptosystem therefore requires either the implementation of specific methods for each finite field or a generic method usable in any finite field." [Description]. It further notes that specific methods increase code size dramatically, while generic methods are less efficient. [Description]
2. Addressing Inflexibility of Prior Art: The approach taught by US6230179B1, which uses a "finite field multiplier with intrinsic modular reduction," would be recognized by a PHOSITA as inflexible. If modular reduction is intrinsic to the arithmetic operation, then a new, separate hardware or software routine would be needed for each specific finite field (characterized by its unique modulus or irreducible polynomial), leading to significant code duplication and increased resource requirements for systems supporting multiple finite fields.
3. Obvious Solution through Modularity: Faced with the need for flexibility and reduced code size in multi-field cryptographic implementations, a PHOSITA would be motivated to apply well-known software engineering principles of modularity and separation of concerns. It would be obvious to separate the generic arithmetic operations from the field-specific modular reduction.
   • Wordsized Non-Reducing Computation: It is common in multi-precision arithmetic to perform initial computations (e.g., additions, multiplications) on the multi-word representations of numbers without immediate reduction, allowing intermediate results to temporarily exceed the final modulus. For F2m addition (Claim 1, 3, 5), this means performing word-wise XOR operations on the multi-word elements. For multiplication (Claim 3, 5), references like US6049815A teach finite field multiplication, and a PHOSITA would understand how to adapt such operations to produce an unreduced result over multiple machine words. The '960 patent itself describes storing finite field elements in "memory segments larger than are actually required," using a "wordsized" representation with unused most significant bits set to 0. [Description] This is a straightforward engineering choice to simplify generic multi-word operations.
   • Specific Modular Reduction: After obtaining such an unreduced result, it is a known requirement in finite field arithmetic to perform modular reduction. The "specific" nature of the reduction (i.e., tailored to the particular finite field's modulus or irreducible polynomial) is inherent to finite field definition and would be applied by the PHOSITA using known algorithms for modular reduction. The '960 patent identifies "specialized reduction algorithms 450... one reduction algorithm for each field." [Description]

Therefore, a PHOSITA, aiming to develop a flexible and efficient cryptographic system capable of handling multiple finite fields (US6618483B1), would find it obvious to take a known finite field operation (e.g., addition via XOR as CGK, or multiplication as in US6049815A), perform it in a "wordsized" non-reducing manner on multi-word representations of elements (CGK), and then apply a field-specific modular reduction to the unreduced result. This combination achieves the well-understood benefits of code reuse and modularity, directly addressing the problem of supporting multiple finite fields efficiently, as acknowledged in the background of the '960 patent. The final use of the reduced result in a cryptographic operation is explicitly taught by US6618483B1.

Obviousness Combination for Independent Claim 2 (Finite Field Multiplier Apparatus)

Claim 2 describes a finite field multiplier apparatus with multiple wordsized multipliers for subsets of finite fields and a specific reducer for each field, where a processor orchestrates the non-reducing multiplication and subsequent specific modular reduction.

References:

• US6049815A (Certicom Corp.): "Method and apparatus for finite field multiplication." This patent discloses apparatus and methods for finite field multiplication.
• US6230179B1 (Motorola, Inc.): "Finite field multiplier with intrinsic modular reduction." This reference shows a multiplier with integrated reduction.
• US6466668B1 (Hitachi, Ltd.): "IC card equipped with elliptical curve encryption processing facility." This patent highlights the use of ECC in constrained environments like IC cards, where efficiency and small code size are critical.
• Common General Knowledge (CGK): Architectural design principles for modular hardware/software components, handling multi-precision numbers, and selecting components based on data characteristics.

Motivation to Combine and Explanation of Obviousness:

1. Existing Multipliers and Their Limitations: US6049815A provides an apparatus for finite field multiplication. US6230179B1 further shows a multiplier with intrinsic modular reduction. As discussed for the method claims, the intrinsic nature of reduction in US6230179B1 creates inefficiency when supporting multiple finite fields.
2. Motivation for Flexible Design: A PHOSITA designing a finite field multiplier for cryptographic systems, especially for constrained environments like IC cards (US6466668B1), would be strongly motivated to create a flexible and resource-efficient architecture. The explicit partitioning of finite fields into "subsets according to their word size" and providing "a plurality of wordsized finite field multipliers, each suitable for multiplying elements of each finite field in a respective subset" would be an obvious architectural choice. This allows for a generic core multiplier unit that can operate on data up to a maximum word size, rather than requiring completely distinct multipliers for every possible field modulus.
3. Separating Multiplication and Reduction in Hardware/Software Architecture: Given the known benefits of modularity (CGK), it would be obvious for the PHOSITA to design the multiplier apparatus such that a generic "wordsized" multiplication unit (derived from prior art like US6049815A) first produces an "unreduced intermediate product." A processor (a standard component in any such apparatus) would then, "upon computing said unreduced intermediate product," determine the "specific modular reduction corresponding to said selected one of said finite fields" and engage a "finite field reducer" (a known component, even if previously intrinsic as in US6230179B1) to perform this field-specific reduction. This design separates the general multiplication logic from the specific reduction logic, optimizing the system for reusability and efficiency across multiple finite fields.

In conclusion, the primary inventive step across all independent claims of US7372960—the deliberate separation of generic, wordsized, non-reducing finite field operations from specific modular reduction routines—would have been obvious to a PHOSITA given the known problems in supporting multiple finite fields in cryptographic systems and the clear motivation to apply standard software engineering and architectural modularity principles to existing finite field arithmetic techniques.