Invalidity dossier
US 6703710
Dual damascene metal trace with reduced RF impedance resulting from the skin effect
Current assignee: National Semiconductor Corp
Added 9/24/2026, 9:12:31 AM
Active provider: DeepSeek · deepseek-v4-flash
Patent summary
Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.
I'll verify current USPTO/litigation status via search, then summarize.
Let me check for any litigation/PTAB or CAFC activity specifically tied to US 6,703,710.
US Patent 6,703,710 — Verified Summary
Ground truth note: I searched for the literal identifier "6703710" and reviewed the patent's own front-page/bibliographic data. All figures below come from the patent document itself (Google Patents full text and the USPTO/Google-hosted PDF), not from memory.
1. Bibliographic Data
| Field | Value |
|---|---|
| Patent number | US 6,703,710 B1 |
| Title | Dual damascene metal trace with reduced RF impedance resulting from the skin effect |
| Application no. | 10/219,791 |
| Filing date | 2002-08-15 |
| Priority date | 2002-08-15 (no earlier priority claimed) |
| Issue/grant date | 2004-03-09 |
| Inventors | Peter J. Hopper (San Jose, CA); Peter Johnson (Sunnyvale, CA); Kyuwoon Hwang (Palo Alto, CA); Michael Mian (Livermore, CA); Robert Drury (Santa Clara, CA) |
| Assignee | National Semiconductor Corporation, Santa Clara, CA |
| Claims | 20 (2 independent: claims 1 and 13; all apparatus/device claims) |
| Status | Expired – Fee Related. Lapsed 2012-03-09 for non-payment of maintenance fees (37 CFR 1.362); nominal anticipated expiration 2022-08-15 |
| Post-grant events | Certificate of correction 2004-10-12; 4-year fee paid 2007 |
| Related family | Divisional US 7,223,680 B1 (App. 10/727,451, filed 2003-12-03, granted 2007-05-29); siblings US 6,740,956; US 6,864,581; US 6,853,079 / US 8,004,061 |
Sources: https://patents.google.com/patent/US6703710/en and https://patentimages.storage.googleapis.com/05/9a/e8/ee726cda65bb66/US6703710.pdf
2. Abstract (verbatim)
"The RF impedance of a metal trace at gigahertz frequencies is reduced by forming the metal trace to have a base region and a number of fingers that extend away from the base region. When formed to have a number of loops, the metal trace forms an inductor with an increased Q."
3. Plain-Language Overview of the Independent Claims
Claim 1 (device)
A semiconductor device comprising two elements only:
- a layer of insulation material formed over a semiconductor substrate; and
- a metal trace formed in that insulation layer (i.e., embedded in it, not sitting on top of it), the trace having:
- a base region, and
- a plurality of spaced-apart fingers extending away from the base region, and — as the claim's closing limitation — the fingers extending away from a bottom surface of the base region.
In plain terms: a buried metal wire whose cross-section looks like a bar with several separated prongs hanging downward off its underside. Because GHz current concentrates at the conductor surface (skin effect), the added finger surfaces give the current more surface to travel on, so RF impedance drops.
Claim 13 (device)
A semiconductor device comprising:
- a layer of insulation material over a semiconductor substrate; and
- a metal trace formed in that insulation layer, the trace having:
- a width,
- a length substantially greater than the width;
- a plurality of spaced-apart fingers extending away from a bottom side of the trace, and running from a first end to a second end of the trace along its length; and
- a top surface of the metal trace and a top surface of the insulation material lying in the same horizontal plane.
In plain terms: the same fingered, buried conductor, but claimed as a long, narrow trace (routing line or inductor winding) whose fingers run continuously end-to-end as longitudinal channels, and whose top is flush/coplanar with the dielectric top — the structural fingerprint of a fill-and-planarize (damascene) process, which is what gives the patent its "dual damascene" title.
Key difference between the independents: Claim 1 is generic (any buried fingered trace; no orientation or planarity limits); claim 13 adds length ≫ width, end-to-end continuous fingers, and the coplanar top surface.
Dependent claim map
- Claims 2–5 (from 1): claim 2 — first end connected to a first GHz circuit, second end to a second GHz circuit, passing a GHz-frequency signal; claim 3 — trace lies substantially in a horizontal plane; claim 4 — connected to a contact; claim 5 — connected to a via.
- Claims 6–12 (from 1): claim 6 — trace forms a number of loops; claim 7 — loops lie substantially in the same plane; claim 8 — trace has first and second ends; claim 9 — second end connected to a contact; claim 10 — second end connected to a via; claim 11 — the via lies under the metal trace; claim 12 — fingers extend away from a bottom surface of the base region.
- Claims 14–20 (from 13): claim 14 — trace forms a number of loops; claim 15 — loops in the same plane; claim 16 — second end connected to a via; claim 17 — plus a lower trace segment electrically connected to that via; claim 18 — that lower segment also has fingers off its bottom surface; claim 19 — that lower segment has length ≫ width with fingers running end-to-end; claim 20 — fingers run continuously from the first end to the second end.
4. Litigation / Docket Search — Result
No CAFC 2026 docket, district court case, or PTAB (IPR/PGR/CBM) proceeding naming US 6,703,710 was found. This is consistent with the record: the patent lapsed for non-payment of maintenance fees on 2012-03-09 and its nominal term ended 2022-08-15, making live enforcement in 2026 implausible. I state this as an absence of evidence, not proof of absence — I could not query PACER or the CAFC docket system directly from the tools available, so a comprehensive docket sweep is not guaranteed.
Numerical-lookalike warnings (do NOT conflate these with US 6,703,710):
- JP Patent No. 6703710 B2 (特許第6703710号) — an unrelated Japanese patent titled 安全装置 ("safety device"), a lifting-rail safety bar (IPC B66F 7/02), filed 2016-04-28, registered 2020-05-13, owner ユニバー株式会社. Different office, different number series.
- Brazilian design registration DI 6703710-0 — an unrelated industrial design filing dated 15/10/2007.
- US 7,116,710 — asserted in Caltech v. Broadcom (C.D. Cal. CV 16-3714) — a different patent number entirely.
Per your strict rule, I have not auto-corrected or merged any of these identifiers.
5. Explicit Uncertainty Flags
- Certificate of correction (2004-10-12): the record shows one was issued, but the text/scope of the correction is not in the retrieved data. I do not know which claim(s) or column(s) it touched.
- Claim 1's "bottom surface" limitation: the printed claim 1 recites both "extend away from the base region" and "extending away from a bottom surface of the base region." The specification also contains a figure-description sentence referring to fingers extending from side "220A," which appears inconsistent with the claims' "bottom" language (likely an original typo, possibly the subject of the certificate of correction). I have reported the claim text as published rather than reconciling it.
- Claim 13's antecedent basis: claim 13 recites "metal trace formed in the layer of insulation material" without a preceding "a" — reproduced literally. Claim 20 also depends on claim 13 while claim 20's "the fingers" traces to claim 13's fingers.
- Assignee of record: Google Patents lists the current assignee as National Semiconductor Corp. FreePatentsOnline's rendering of a sibling case lists "Texas Instruments Incorporated" as attorney/agent firm — that is an agent designation, not an ownership transfer, and I did not find an assignment record changing owner of the '710 patent.
- Legal status statements are taken from the Google Patents legal-status tab, which itself disclaims being a legal conclusion.
Generated 9/30/2026, 7:52:26 PM
Cases on file (0)
Specific litigation cases in our database that name US patent 6703710. The free-form analysis below may also discuss cases beyond this list.
No cases on file mention this patent. Upload a CSV or add a case manually in Admin → Manage litigation cases.
Litigation summary
Past and pending lawsuits — plaintiffs, defendants, jurisdictions, outcomes, and notable rulings.
I'll search for litigation involving US patent 6703710.
Let me search more specifically on litigation databases.
Let me try more targeted searches on litigation-specific databases.
Litigation Search: U.S. Patent No. 6,703,710
Bottom line
I found no evidence of any litigation involving U.S. Patent No. 6,703,710. Searches across general web sources and patent-focused databases did not surface any district court case, ITC investigation, PTAB/post-grant proceeding, or appeal in which the '710 patent was asserted, challenged, or otherwise at issue.
What I searched and what came back
| Search target | Result |
|---|---|
| Google Patents page for US 6,703,710 (authoritative full text) | Lists "Cited By (7)" and "Citations (8)" only. No "Litigation" section, no asserted-case data. |
| General web queries for "6703710" / "6,703,710" + litigation/defendant/lawsuit | Only unrelated hits (an INPI Brazilian design registration "DI 6703710-0"; a Japanese patent JP6703710 B2 for a "safety device"/lift — a different patent in a different country). |
| National Semiconductor + patent litigation | Returned unrelated cases: ZF Micro Devices, Inc. v. National Semiconductor Corp. (Santa Clara County Superior Court, filed 04/25/2002) and National Semiconductor Corp. v. Linear Technology — neither involves the '710 patent. |
| Unified Patents / Docket Alarm / CourtListener-targeted queries | No matching case file returned for '710 before the search tool limit was reached. |
Per the strict rule, I am treating the unrelated "6703710" hits above (Brazilian design registration, Japanese JP6703710B2) as non-matching identifiers, not as evidence about US 6,703,710.
Key contextual facts about the '710 patent (from the authoritative record)
- Patent: US 6,703,710 B1 — "Dual damascene metal trace with reduced RF impedance resulting from the skin effect"
- Assignee: National Semiconductor Corporation
- Inventors: Peter J. Hopper, Peter Johnson, Kyuwoon Hwang, Michael Mian, Robert Drury
- Filing/priority date: 2002-08-15; granted: 2004-03-09
- Related family: divisional US 7,223,680 B1 (method); related siblings for the "Metal Trace," "Conductive Trace," and "Etched Metal Trace" inventions (e.g., US 6,864,581; US 8,004,061)
- Legal status: Expired – Fee Related. The maintenance-fee record shows: maintenance fee paid (2007), reminder mailed (2011-10-24), lapse for failure to pay maintenance fees (2012-03-09), and "PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362" (effective 2012-03-09). Anticipated expiration 2022-08-15.
The early lapse (2012, roughly eight years into a term that would otherwise have run to 2022) is itself a strong practical signal that the patent was not a valuable assertion asset — consistent with the absence of any found litigation.
Caveats and limitations
- Search coverage was incomplete. I was unable to complete direct structured queries against PACER, CourtListener's RECAP docket search, and the Unified Patents litigation portal before hitting tool limits. These are the definitive sources for asserting a negative.
- A negative finding here is not proof of no litigation. A patent can be asserted in a case where it is not named in the public docket caption, or litigated in state court or non-US fora that these queries would not surface.
- No primary-source litigation document (complaint, docket, PTAB paper) referencing the '710 patent was located.
Recommended next steps to confirm
- Query CourtListener/RECAP docket search for the exact string
6703710(and6,703,710) to catch any case where the patent appears in a filing. - Check the USPTO Patent Trial and Appeal Board (PTAB) and Patent Center "Litigation/Assignment" tabs, and the USPTO Patent Litigation Docket Report for the patent.
- Check Unified Patents Portal → Litigation directly for the patent number.
- Search the ITC EDIS database for Section 337 investigations naming National Semiconductor and this patent.
If you'd like, tell me which specific databases you want exhausted first and I'll structure the queries accordingly.
Generated 9/30/2026, 7:52:19 PM
Proceedings on file (0)
All PTAB activity →AIA trial proceedings (IPR / PGR / CBM) filed at the USPTO Patent Trial and Appeal Board against this patent. Sourced from the USPTO Open Data Portal and refreshed every six hours; each proceeding number deep-links to the PTAB E2E docket.
No PTAB proceedings on file. This patent has not been challenged via IPR, PGR, or CBM. The absence is itself a signal — well-asserted patents eventually attract IPRs. The LLM analysis below may surface filings the ODP feed hasn’t indexed yet.
PTAB challenges
AIA trial proceedings at the USPTO Patent Trial and Appeal Board — IPR, PGR, and CBM. Petitioners, judge panels, claim-level invalidation outcomes from Final Written Decisions, and Federal Circuit appeals. The single most important defensive datapoint after litigation history.
I'll start by verifying the structured "no proceedings" signal against live sources.
The second result references a "670 patent" — I need to determine whether that's US 6,703,710 or a different patent. Let me pin that down.
The "670 patent" hits describe database/product-location claims — almost certainly a different patent. Let me confirm the identity of those proceedings and check for any assertion history of US 6,703,710.
PTAB Proceedings — US 6,703,710 ("Dual damascene metal trace with reduced RF impedance resulting from the skin effect")
Proceedings overview
Total AIA trial proceedings on file: 0 — zero active, zero with claims invalidated, zero with claims sustained, zero settled, zero institution-denied. The USPTO Open Data Portal returns no AIA trial proceedings for US 6,703,710, and my independent web checks surfaced none (only a false-positive "670 patent" from a different family — see below). The bottom-line defensive posture is therefore not the usual "hardened vs. invalidated" axis: this patent is administratively dead — it lapsed for failure to pay maintenance fees effective 2012-03-09, and its 20-year term expired 2022-08-15 (Google Patents "Anticipated expiration"). A demand letter citing US 6,703,710 today is citing a patent that cannot be enforced, which matters far more than the absence of PTAB paper.
Canonical source: USPTO Open Data Portal / PTAB structured record as ingested (per the "PTAB proceedings on file" block in this prompt). Verify at PTAB E2E and PTAB API.
Proceeding-level detail
There is no proceeding to enumerate. The template loop is empty, so nothing about claim-level outcomes, judge panels, institution reasoning, or settlements can be (or should be) reported. I will not manufacture proceeding numbers, panels, or FWDs.
Two structural points about why the loop is empty, offered as inference clearly labeled as such:
- PGR was legally unavailable. US 6,703,710 has an effective filing date of 2002-08-15 — well before the AIA first-inventor-to-file cutoff. Post-grant review under § 321 reaches only patents with effective filing dates on or after 2013-03-16. (Inference from the statute + the record's 2002-08-15 priority date.)
- CBM was ineligible and has sunset. A BEOL metal-trace/inductor claim is not a "covered business method" (technological-invention exception), and CBM review sunset on 2020-09-16 by statute. (Inference.)
Web-search check — one near-miss you must not confuse with this patent
Live search does return a busy PTAB docket referencing "the 670 patent." It is a different patent. In Home Depot USA, Inc. and Home Depot Solutions LLC v. Innovaport, LLC, the challenged "670 patent" is U.S. Patent No. 9,990,670 B2, "Apparatus and method for providing product location information to customers in a store" — in-store retail navigation claims (databases, mobile user interfaces, "product location inquiry signal"), not semiconductor metallization. See e.g. the Innovaport-family petitions at PTACTS petition 1554789 (IPR2024-00096, U.S. 8,775,260) and the IPR2024-00012 Home Depot v. Innovaport record. That Innovaport litigation (W.D. Wis. 3:23-cv-00225) ended in settlement with claims dismissed with prejudice on 2024-03-14.
Do not import IPR2024-00012 / IPR2024-00096 or the Home Depot/Innovaport outcomes into a US 6,703,710 analysis. The shared digits "670" are a docket-search trap. No proceeding I found names US 6,703,710 as the challenged patent.
Claims ledger — US 6,703,710
No claim has ever been canceled or sustained by the Board, because no claim has ever been challenged. On the authoritative text, the patent has 20 claims (claims 1–20), with independent claims 1 and 13.
| Claim(s) | Kind | PTAB status | In-force status |
|---|---|---|---|
| 1–12 | Structural (claim 1 independent: metal trace with "a base region and a plurality of spaced-apart fingers that extend away from the base region, the fingers extending away from a bottom surface of the base region") | UNTESTED | Lapsed 2012-03-09; term ended 2022-08-15 |
| 13–20 | Structural (claim 13 independent: trace with "a top surface of the metal trace and a top surface of the insulation material lying in a same horizontal plane") | UNTESTED | Same |
Key dates from the record (YYYY-MM-DD format, verbatim events):
- 2002-08-15 — Application 10/219,791 filed; assignment to National Semiconductor Corporation recorded (Reel/Frame 013212/0279; assignors Hopper, Johnson, Hwang, Mian, Drury; signed 2002-08-09 to 2002-08-12).
- 2004-03-09 — Patent granted (US 6,703,710 B1).
- 2004-10-12 — Certificate of Correction issued (contents not shown in the record before me).
- 2007-09-10 — 4-year maintenance fee paid.
- 2011-10-24 — Maintenance fee reminder mailed.
- 2012-03-09 — Lapse for failure to pay maintenance fees.
- 2012-04-09 — Patent expired due to nonpayment under 37 CFR 1.362.
- 2022-08-15 — Anticipated expiration (20 years from the 2002-08-15 filing).
Related family (same-day 2002-08-15 filings named in the specification's RELATED APPLICATION paragraph; all now expired): application 10/219,896 → U.S. 6,740,956 ("Metal Trace with Reduced RF Impedance Resulting from the Skin Effect"), 10/219,235 → U.S. 8,004,061 ("Conductive Trace…"), 10/219,212 → U.S. 6,864,581 ("Etched Metal Trace…"). This patent also has a divisional, U.S. 7,223,680 (application 10/727,451, filed 2003-12-03, "Method of forming a dual damascene metal trace…"), which is likewise expired. I did not verify PTAB activity on the siblings; treat any sibling-IPR question as an open item.
Strategic summary
Canceled / sustained / untested. Nothing is canceled; nothing is sustained; claims 1–20 are all UNTESTED at the PTAB. The surviving-claim list, if you want one for completeness, is "claims 1–20 as issued, subject to a 2004-10-12 certificate of correction" — but that list is largely academic because the patent is not in force. Two independent clocks closed the window: the maintenance-fee lapse effective 2012-03-09 (with no revival event in the record), and the natural 20-year term ending 2022-08-15. Since 2026-09-30 is well past both, there is no live infringement theory against current activity. If a counterparty is threatening suit over historical activity, note that the § 286 six-year damages lookback (reaching back only to roughly 2020-09-30) falls entirely after the 2012 lapse — and the patent's term had only ~22 months of overlap with that window. Revived-but-lapsed and intervening-rights doctrines (§ 41(c); § 252 by analogy) are worth a demand letter response if anyone claims otherwise.
Estoppel landscape. There is no § 315(e)(2) estoppel, and none can arise, because estoppel attaches only to petitioners who reach a final written decision. IPR estoppel, § 325(e) estoppel, and the SAS/estoppel-scope fights that dominate modern practice are simply off the table. The corollary is favorable but narrow: no prior-art ground has been "used up," so a defendant facing a threat has the entire universe of § 102/§ 103 art available in district court, unconstrained by IPR estoppel. Because there was also no reexamination and (so far as I can see) no PTAB proceeding, there is likewise no § 325(d)/Advanced Bionics "same or substantially the same art" roadblock.
Pattern signals. None of the usual ones fire. There is no repeat petitioner (no petitioner at all), no patent-owner appeal practice (there is no FWD and no Federal Circuit appeal — nothing existed to appeal, so no CourtListener CAFC docket to cite), and no defensive aggregator in the chain (no Unified Patents or RPX IPR appears). The record shows National Semiconductor Corporation as assignee throughout; National Semiconductor was acquired by Texas Instruments in 2011, so TI is the likely successor-in-interest as a matter of corporate history — label that an inference, not a recorded assignment, since the Google Patents page still lists National Semiconductor Corp as current assignee. A third-party aggregator page for sibling U.S. 7,309,639 surfaced "TEXAS INSTRUMENTS INCORPORATED," which is consistent with a TI chain of title but is not confirmation for US 6,703,710.
Why the absence of IPRs is not a bullish signal. Well-asserted patents attract IPRs; this one was never well-asserted. That is explained by economics, not by claim strength: (a) it expired for fee nonpayment in 2012, five months before the first AIA IPR petition was even possible (AIA IPRs for USPTO practice began 2012-09-16), so there was never a post-grant runway; (b) its term ended 2022-08-15; (c) it claims a structural BEOL metal trace whose infringement would be extremely difficult to detect or prove without reverse-engineering a fab's interconnect stack — the classic non-assertable profile. Do not read "no IPRs = robust patent." Read it as "no commercially rational target."
One substantive angle worth preserving, in case enforceability is ever re-asserted. Claim 1 requires fingers "extending away from a bottom surface of the base region," and claim 13 requires fingers that "extend away from a bottom side of the metal trace and run from a first end … to a second end … along the length." The specification text as published is internally inconsistent on directionality: it states that fingers 222 "extend away from bottom side 220A" while describing 220A as the top side. That written-description/indefiniteness mismatch (§ 112(a)/(b)) is a genuine claim-construction vulnerability I identified from the authoritative record (the 2004-10-12 certificate of correction may or may not bear on it — I could not verify its contents). Treat this as a lead to verify against the certificate of correction and the file wrapper, not as a settled conclusion.
Recommended next steps
- If you are a defendant receiving a demand letter on US 6,703,710: lead with expiration, not with PTAB. There is no FWD to quote — no proceeding exists. Cite instead: (i) the 2012-03-09 lapse for failure to pay maintenance fees and the 2012-04-09 "PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362" event; and (ii) the 2022-08-15 end of the 20-year term. Both appear on the face of the public record at Google Patents US6703710B1 and Patent Center. Ask the sender to identify (a) the specific accused acts and their dates and (b) any basis for asserting a lapsed patent.
- Verify the lapse was never cured. Pull the Patent Center transaction history and confirm no petition to revive under 37 U.S.C. § 41(c)/§ 1.378 was granted after 2012-04-09. If a revival was granted, the analysis changes materially (and intervening-rights defenses under § 41(c)(2) become central).
- Treat the "670 patent" docket noise as a false positive and document it. If opposing counsel or a prior-art vendor hands you IPR2024-00012 / IPR2024-00096, Home Depot v. Innovaport, or the Innovaport W.D. Wis. settlement, correct the record: that is U.S. 9,990,670, an in-store navigation patent, not this one.
- No milestone tracking is required. There are no pending proceedings, so there is no institution-deadline, no oral hearing, and no § 316(a)(11) one-year FWD date to calendar.
- If you are evaluating the sibling family (U.S. 6,864,581, 6,740,956, 7,309,639, 8,004,061, 7,223,680) — for example because a portfolio-level assertion bundles them — run the same ODP/PTAB E2E check per patent. I did not verify those here, and a portfolio assertion is precisely the scenario in which one expired sibling can be used to create the impression of a live family.
- Independent verification links used / available: PTAB E2E, USPTO PTAB API, uspto.gov PTAB decisions, and CourtListener for any CAFC appeal (none found; there is nothing to appeal).
Caveats I will not paper over: (1) A null result in the ODP plus two web searches is strong but not metaphysical proof of zero proceedings — if you need litigation-grade certainty, pull the Patent Center "PTAB Proceedings" tab and the PTAB E2E docket directly. (2) I did not obtain the text of the 2004-10-12 certificate of correction. (3) The successor-in-interest discussion (TI) is inference from corporate history, not a recorded assignment for this patent number.
Generated 9/30/2026, 7:52:58 PM
Ownership chain (1)
Asserters network →Structured records extracted from the assignment-history narrative below. Each entity links to its full ownership-network profile.
2002-08-09 to 2002-08-12 · recorded 2002-08-15 · reel 013212/0279 · Assignment
Hopper, Peter J.; Johnson, Peter; Hwang, Kyuwoon; and othersNational Semiconductor Corporation
in-bound employment assignment
Assignment history
Inventors, original assignee, and the chain of ownership recorded with the USPTO — including the correspondent attorney who recorded each assignment, since shell-LLC chains often share one repeat-player attorney even when the entity names look unrelated. Surfaces NPE / patent-troll patterns: shell-entity transfers, known asserters in the chain, repeat correspondent fingerprints, pre-litigation assignments, and bankruptcy fire-sales.
I'll verify the assignment record before writing, checking both the recording data and any successor-interest events (e.g., the National Semiconductor/TI acquisition).
Let me check the family's later assignment history and whether any NSC→TI patent-level assignment was recorded.
Assignment & Ownership Chain — U.S. Patent No. 6,703,710
Sourcing note (important): My tool environment cannot open assignmentcenter.uspto.gov or assignment.uspto.gov directly. The reel/frame, assignor, assignee, and date data below come from the USPTO assignment abstract-of-title data as mirrored in the patent's Google Patents legal-events record, which reproduces the USPTO recording fields (REEL/FRAME: 013212/0279, signing dates). Where a field (e.g. correspondent of record) is not reproduced in that record, I say so rather than guess. Verify at the USPTO Assignment Center and the Google Patents legal events for US 6,703,710.
Inventors
Five named inventors, all appearing on the face of the patent:
| Inventor | Employer at filing | Basis |
|---|---|---|
| Peter J. Hopper | National Semiconductor Corporation | Assignment executed 2002-08-09 to 2002-08-12, i.e. days before the 2002-08-15 filing — the classic employee "assign-on-filing" pattern |
| Peter Johnson | National Semiconductor Corporation | Same |
| Kyuwoon Hwang | National Semiconductor Corporation | Same (also spelled Kyuwoon/Kyuwoon Hwang in the record) |
| Michael Mian | National Semiconductor Corporation | Covered by the recording's "AND OTHERS" clause |
| Robert Drury | National Semiconductor Corporation | Covered by the recording's "AND OTHERS" clause |
Pattern assessment — no adverse pattern found.
- The record shows no evidence of inventors departing NSC within 12 months of filing. I found no data either way on later movements, so I am not asserting a departure pattern; I am asserting only that the assign-on-filing signature dates (2002-08-09 → 2002-08-12) are consistent with all five being NSC employees in good standing on the filing date.
- Data limitation to flag: the recorded assignment names only "HOPPER, PETER J.; JOHNSON, PETER; HWANG, KYUWOON; AND OTHERS" — Mian and Drury are folded into the "AND OTHERS" shorthand in the abstract of title. The underlying assignment document would name all five; the abstract does not itemize execution dates per inventor.
- The same five-person team filed three companion applications the same day (Ser. Nos. 10/219,896; 10/219,235; 10/219,212), which is a normal corporate R&D cluster, not a sign of a fragmented or portable portfolio.
Original assignee
National Semiconductor Corporation (Delaware/Santa Clara, California), named as assignee on the issued patent and as Original Assignee and Current Assignee in the record.
- Primary line of business: analog and mixed-signal semiconductors — power management, amplifiers, data converters, interface. NSC reported ≈$1.42B FY2010 sales at announcement.
- Did they ship a product embodying the claims? Not directly determinable from the assignment record. The patent claims a metal trace / inductor structure, i.e. an on-chip BEOL architecture rather than a discrete part. NSC's RF/analog products are the plausible embodying field, but I found no evidence that this specific trace geometry was commercialized, and no product marking, datasheet, or design-win reference tying the '710 claims to a shipping part. Treat "product embodiment" as unclear, not established.
- Current status: Not dissolved. National Semiconductor Corporation was acquired by Texas Instruments Incorporated in an all-cash $6.5B merger announced 2011-04-04 and completed 2011-09-23. Under the Agreement and Plan of Merger, TI's subsidiary Orion Merger Corp. merged into NSC and NSC survived as a wholly-owned TI subsidiary (TI Form 8-K, item 2.01, dated 2011-09-23; HSR clearance per TI 8-K dated 2011-05-23).
Consequence for the chain (this is the crux): because NSC survived the merger, legal title to NSC's patents did not need to move. That is why Google Patents still lists "National Semiconductor Corp" as the assignee of record rather than TI. There is no recorded NSC → Texas Instruments patent-level assignment for the '710 patent in the events I can see. The practical owner is TI as sole shareholder of NSC; the assignee of record remains NSC.
Assignment timeline
One — and only one — recorded assignment exists for this patent. Everything else on the legal-events record is a fee/correction event, not a conveyance.
- 2002-08-09 to 2002-08-12 (executed, per signing dates) / recorded 2002-08-15 — Reel 013212 / Frame 0279
- Conveyance: Assignment ("ASSIGNMENT OF ASSIGNORS' INTEREST"; the abstract styles it "Assignment of Assignors' Interest (see document for details)")
- Assignor: Hopper, Peter J.; Johnson, Peter; Hwang, Kyuwoon; and others (Mian and Drury per the face of the patent)
- Assignee: National Semiconductor Corporation, California
- Correspondent: not exposed in the accessible record. The reel/frame abstract I can reach does not reproduce the correspondent/attorney-of-record field, and I will not invent one. This must be read off the Assignment Center detail page or the recorded cover sheet for reel 013212/0279. Because there is only one recorded assignment in this chain, the "repeat correspondent" test cannot be applied — there is nothing to recur against.
- Context: in-bound employment assignment — the standard employee-to-employer transfer executed days before filing. Not a fire-sale, not securitization, not a transfer to an asserter.
Non-conveyance events (for completeness, not assignments):
- 2004-10-12 — Certificate of Correction (Code
CC). No reel/frame is shown for this event in the record I can access. A certificate of correction changes the printed patent text (typically claim/inventor/typographical fixes); it is not a transfer of title. - 2007-09-10 — 4-year maintenance fee paid (recorded after a 2007-09-17 reminder).
- 2011-10-24 — maintenance-fee reminder mailed (12-year clock; the 8-year fee window).
- 2012-03-09 — LAPSE for failure to pay maintenance fees; 2012-04-09 — "PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362"; 2012-05-01 —
FP, lapsed, effective 2012-03-09. - 2022-08-15 — anticipated expiration (nominal term date; the patent had already lapsed a decade earlier).
- US 7,223,680 B1 — divisional of the '710 application (filed 2003-12-03, issued 2007-05-29, same inventors, same assignee). A division is not an assignment: the divisional inherits the same ownership and the same single reel/frame chain. No separate conveyance to NSC was required.
If the Assignment Center returns additional post-issuance records I have not seen, they would be new information. On the record available to me, the chain is one link long and terminates at National Semiconductor Corporation.
Timeline diagram
timeline
title Ownership of US 6703710
2002 : Inventors assign rights to National Semiconductor
: Application filed the same day
2004 : Patent issued
: Certificate of correction recorded
2007 : Four year maintenance fee paid
2011 : NSC acquired by Texas Instruments
: NSC survives as wholly owned TI subsidiary
2012 : Patent lapses for unpaid maintenance fee
2022 : Anticipated expiration date
NPE / troll-pattern signals
| # | Signal | Call | Evidence |
|---|---|---|---|
| 1 | Shell-entity transfer | Not present | The only assignee that ever appears is National Semiconductor Corporation — an operating analog-semiconductor manufacturer with fabs in Maine, Scotland and Malaysia at the relevant time. No "IP / Holdings / Licensing / Ventures" entity appears on reel 013212/0279 or anywhere else in the record. Zero post-issuance transfers, so there is no transfer to characterize. |
| 2 | Known asserter in the chain | Not present | No assignee in the chain matches Acacia, Marathon, IV, IPNav, Wi-LAN, Mosaid/Conversant, Vringo, Pendrell, Innovatio, MPHJ, Lumen View, Round Rock, Document Generation Corp, or any Spangenberg entity. The chain is NSC → (TI, via share purchase). TI is an NYSE-listed operating manufacturer, not a listed asserter. |
| 3 | Repeat correspondent across the chain | Unclear / not assessable | There is only one recorded assignment (013212/0279), so the recurrence test (same attorney on multiple links) has no second link to compare. The correspondent field is also not reproduced in the abstract I can reach. This is a gap, not a clean negative — it would need the recorded cover sheet to close. |
| 4 | Cascading transfers | Not present | Zero post-issuance assignments over 22 years. Not even a single chained-LLC hop, let alone multiple transfers in <24 months. |
| 5 | Pre-litigation transfer | Not present | No infringement suit naming the '710 patent was located (see the litigation section above), so no transfer can sit within 6 months of one. The sole assignment predates the patent's existence by months and predates any hypothetical suit by years. |
| 6 | Bankruptcy fire-sale | Not present | NSC never filed Chapter 7/11. The 2011 exit was a $6.5B all-cash merger at a ~78–80% premium — the opposite of a distressed sale. TI's 8-K confirms the merger as an Item 2.01 asset acquisition/merger, not an insolvency proceeding. (Contrast Kodak/Nortel/Polaroid fact patterns.) |
| 7 | Privateering | Not present | No transfer of the '710 patent to any third-party NPE, and no evidence — in TI's 8-K filings or elsewhere — of TI or NSC funding an NPE to assert NSC patents. TI is a serial defendant-side operating company in the analog space, not a known privateer. |
| 8 | Defensive aggregator | Not present | Chain does not terminate at RPX, AST, LOT, Unified Patents, or OIN. It terminates at an operating manufacturer (NSC, as a TI subsidiary). Note: absence of a defensive aggregator is not the same as "neutralized" — here the neutralizing event was different and more decisive: the patent lapsed for non-payment on 2012-03-09, taking it out of the assertion pool entirely. |
Verdict
Insufficient data (only the original assignment is recorded) — with a strong directional overlay toward non-asserting operating-company ownership.
Justification: The assignment record contains exactly one conveyance — reel 013212/0279, executed 2002-08-09 to 2002-08-12 and recorded 2002-08-15, from the five named inventors to National Semiconductor Corporation. There are no post-issuance assignments, so there is no transfer-to-asserter, no chained LLC, and no defensive-aggregator terminus to score; the chain terminates at the original operating-company assignee, now a wholly-owned subsidiary of Texas Instruments following the 2011-09-23 merger. Nothing in the two event categories that do exist — a 2004-10-12 certificate of correction (not a conveyance) and the 2012-03-09 lapse for non-payment under 37 CFR 1.362 — looks like NPE conduct; deliberately abandoning the 8-year maintenance fee roughly seven months after TI closed the NSC acquisition is the behavior of a large operating company pruning a portfolio, not of a monetizer building a licensing position. The patent is expired, unenforceable under 37 CFR 1.362, and was never litigated.
Open items to close the record
- Pull the recorded cover sheet for reel 013212/0279 on the Assignment Center to capture the correspondent/attorney of record (the one field I could not read) and the full assignor list.
- Run the Assignment Center "by patent number" and "by assignee: National Semiconductor Corporation" searches to confirm no late-recorded conveyance exists, and check whether any NSC→TI blanket/confirmatory assignment was recorded for the broader portfolio but not this patent.
- If desired, spot-check a sibling patent with a longer life (e.g. US 8,004,061, which survived to at least 2011) to see whether any NSC patent shows a recorded TI assignment — that would tell you whether TI ever recorded patent-level transfers at all, which is itself a useful calibration point for interpreting this blank.
Generated 9/30/2026, 7:52:52 PM
Prior art
Earlier patents, publications, and products that may anticipate or render the claims unpatentable.
I'll verify the patent record and each cited reference via search before mapping them to claims.
Let me pull the remaining cited references.
I have enough to complete the mapping. Note: I hit the tool-step limit before I could re-pull three of the cited references (US 5,434,094; US 5,952,704; US 5,998,299) — I flag those below as sourced from the patent's own face citations plus my background knowledge, not from a live fetch.
Prior Art Analysis — US 6,703,710 B1
0. Record confirmation (building on prior sections)
The face of US 6,703,710 lists exactly eight (8) U.S. patent citations, of which six are marked cited by examiner and two are third‑party citations (per the Google Patents legend * Cited by examiner, † Cited by third party). All eight are U.S. patents; there are no foreign patent documents or non‑patent literature cited on the face of the '710 patent. I have used them literally as listed and have not substituted any similar‑looking numbers.
Separately, the patent carries 24 "Family Cites Families" documents. These are citations within the family (documents cited during prosecution of related members such as US 7,223,680), not the references cited against '710 itself. I have excluded them from the §102 table and treat them only as context.
1. The eight references cited on the face of US 6,703,710
| # | Full citation | Filed / Published | Source |
|---|---|---|---|
| A1 | US 3,573,540 A — Microwave traveling wave device with electronically switched interaction characteristics — Raytheon Co.; inv. John M. Osepchuk | filed 1969‑07‑01 / pub. 1971‑04‑06 | Examiner‑cited |
| A2 | US 4,165,558 A — Fabrication of photovoltaic devices by solid phase epitaxy — Armitage, William F., Jr. | filed 1977‑11‑21 / pub. 1979‑08‑28 | Examiner‑cited |
| A3 | US 5,434,094 A — Method of producing a field effect transistor — Mitsubishi Denki K.K. | filed 1988‑07‑01 / pub. 1995‑07‑18 | Examiner‑cited |
| A4 | US 5,952,704 A — Inductor devices using substrate biasing technique — Electronics and Telecommunications Research Institute (ETRI) | filed 1996‑12‑06 / pub. 1999‑09‑14 | Examiner‑cited |
| A5 | US 5,998,299 A — Protection structures for the suppression of plasma damage — Texas Instruments Inc. | filed 1996‑12‑09 / pub. 1999‑12‑07 | Examiner‑cited |
| A6 | US 6,191,023 B1 — Method of improving copper pad adhesion — Taiwan Semiconductor Manufacturing Co. (TSMC) | filed 1999‑11‑18 / pub. 2001‑02‑20 | Third‑party |
| A7 | US 6,326,673 B1 — Method and structure of manufacturing a high‑Q inductor with an air trench — Windbond Electronics Corp. | filed 1998‑08‑07 / pub. 2001‑12‑04 | Third‑party |
| A8 | US 6,444,517 B1 — High Q inductor with Cu damascene via/trench etching simultaneous module — Taiwan Semiconductor Manufacturing Co. (TSMC) | filed 2002‑01‑23 / pub. 2002‑09‑03 | Examiner‑cited |
Prior‑art date qualification (pre‑AIA, since the '710 filing date is 2002‑08‑15): all eight pre‑date the '710 filing. A1–A5 and A6 are §102(b)/§102(a) art (published more than one year before, or before, the '710 filing). A7 (granted 2001‑12‑04) and A8 (granted 2002‑09‑03, after the '710 filing date but filed 2002‑01‑23) qualify at minimum as §102(e) art based on their U.S. filing dates.
2. Per‑reference description and §102 mapping
The controlling point up front
The novelty of the '710 claims sits in one structural feature: a metal trace formed in an insulation layer (damascene) having a base region and a plurality of spaced‑apart fingers extending away from the base region / from the bottom surface of the base region (claims 1, 12, 13, 18–20). Anticipation under §102 requires that a single reference disclose every element, arranged as in the claim. None of the eight references discloses a fingered/ribbed trace of this kind at all. Accordingly, my honest bottom line is that none of these eight references anticipates independent claim 1 or claim 13, and none anticipates claims 2–12 or 14–20, which each incorporate the finger limitation. Their role is as §103 background/combination art and as evidence that the surrounding elements (buried traces, damascene copper, spiral inductors, GHz operation) were known. I detail possible narrow §102 exposure where it exists.
A1 — US 3,573,540 A (Raytheon, Osepchuk) — filed 1969‑07‑01; pub. 1971‑04‑06.
A microwave traveling‑wave tube: a slow‑wave/periodic circuit interacting with an electron beam, with a diode switch to change the interaction length. It is a vacuum‑electron‑device patent, unrelated to integrated‑circuit interconnect geometry.
- §102 exposure: Essentially none. It touches the peripheral concept of "microwave/RF signaling" but discloses no semiconductor metal trace, no insulation layer, no damascene, and no fingers. It is best characterized as low‑relevance background cited to show GHz‑range signal handling was old.
- Claims potentially anticipated: None.
A2 — US 4,165,558 A (Armitage) — filed 1977‑11‑21; pub. 1979‑08‑28.
Fabrication of photovoltaic (solar) cells by solid‑phase epitaxy — depositing Al supersaturated with Si on a Si substrate and heating to grow an epitaxial Si layer. Directed to PV junction formation.
- §102 exposure: None. No trace, no dielectric, no fingers.
- Claims potentially anticipated: None.
A3 — US 5,434,094 A (Mitsubishi Denki) — filed 1988‑07‑01; pub. 1995‑07‑18.
A method of producing a field‑effect transistor. (⚠ I could not re‑fetch this document before the step limit; description is from the face citation and general knowledge, not a live read.)
- §102 exposure: None as to the claimed trace geometry; it is transistor‑fabrication art.
- Claims potentially anticipated: None.
A4 — US 5,952,704 A (ETRI) — filed 1996‑12‑06; pub. 1999‑09‑14.
Inductor devices using a substrate‑biasing technique — an integrated spiral inductor in which the substrate is biased to reduce substrate coupling/loss (a Q‑improvement technique). This is the classic "improve Q by addressing the substrate" line of art that the '710 specification explicitly positions itself against (the '710 patent instead keeps its inductor atop the interconnect to "avoid inducing currents in the substrate").
- §102 exposure: Relevant to the inductor aspects of the claim set — the preamble "metal trace … forming loops" (claims 6, 7, 14, 15) — but the reference does not disclose a base region with spaced‑apart fingers on a bottom surface, nor a trace formed in a damascene insulation layer with a coplanar top (claim 13). Because the finger/damascene limitations are absent, no full anticipation.
- Claims potentially anticipated: None in full. Most relevant to the "number of loops / loops in a same plane" dependent limitations (claims 6–7, 14–15) as §103 art when combined with a damascene reference (e.g., A8).
A5 — US 5,998,299 A (Texas Instruments) — filed 1996‑12‑09; pub. 1999‑12‑07.
Protection structures for suppression of plasma (charging) damage during interconnect processing — antenna/charge‑dissipation structures in multi‑level metal. (⚠ same caveat as A3: face citation + background knowledge, not a live re‑read.)
- §102 exposure: It is interconnect‑process‑reliability art; it does not teach a fingered trace.
- Claims potentially anticipated: None.
A6 — US 6,191,023 B1 (TSMC) — filed 1999‑11‑18; pub. 2001‑02‑20.
Improving copper pad adhesion — a copper damascene bonding‑pad structure and adhesion treatment.
- §102 exposure: Relevant only as evidence that copper damascene metallization (and the fill‑and‑planarize CMP step giving a coplanar metal/dielectric top surface) was well known before the '710 filing. It does not disclose the base‑region‑plus‑fingers geometry.
- Claims potentially anticipated: None. It is at most §103 support for the "metal trace formed in the layer of insulation material … top surfaces lying in a same horizontal plane" language of claim 13.
A7 — US 6,326,673 B1 (Windbond) — filed 1998‑08‑07; pub. 2001‑12‑04. (third‑party cited)
High‑Q inductor with an air trench — stacked spiral metal lines in dielectric layers connected by via plugs, with a spiral air trench formed in the dielectric along the spacing between the windings to cut parasitic capacitance.
- What it does disclose: a spiral (looped) inductor in dielectric; metal lines buried between dielectric layers; the idea of structuring the space between/around windings to improve Q.
- What it lacks relative to '710: its trench is filled with air, not conductive material; there is no single trace with a base region and spaced‑apart fingers extending from a bottom surface; there is no coplanar metal/dielectric top surface as claimed.
- §102 exposure / claims at risk: None in full. Relevant to claims 6–7 and 14–15 (loops in a same plane). A hypothetical §102 argument could only be made against a bare "looped trace in a dielectric" claim, which '710 does not have — every '710 independent claim requires the fingers.
A8 — US 6,444,517 B1 (TSMC) — filed 2002‑01‑23; pub. 2002‑09‑03. (the closest reference)
High‑Q inductor with Cu damascene via/trench etching simultaneous module — forms a spiral inductor by a damascene process: lower trench + upper trench etched and filled with Cu (≥5 µm), the inductor's lower part extending into the dielectric and its upper part extending above the dielectric, plus a raised contact pad. It expressly targets inductor resistance/Q.
- Why it is the most pertinent: it is the only cited reference that combines (i) an inductor/looped conductor, (ii) copper damascene filling of trenches in a dielectric, and (iii) attention to turning via/trench etching into a simultaneous module — i.e., the same process family as the '710 "dual damascene" trace.
- Why it still does not anticipate: A8 teaches a monolithic filled trench (the inductor cross‑section is a solid Cu bar, with the upper portion standing proud of the dielectric). It does not disclose a plurality of spaced‑apart fingers extending away from a bottom surface of a base region, nor fingers running continuously end‑to‑end along the trace length, nor a coplanar metal/dielectric top surface (A8's upper inductor portion deliberately extends above the dielectric). Those are the very limitations that distinguish claims 1 and 13.
- §102 exposure / claims at risk: None in full, but A8 is the reference most likely to be used as the §103 primary reference (optionally in view of A4/A7 for the loop/spiral feature and A6 for coplanar damascene). If one were to argue claim 13's preamble elements (buried trace in dielectric, length≫width, via connection, lower trace segment via claim 17), A8 is the closest single‑reference starting point — yet the finger limitation defeats anticipation.
3. Consolidated §102 assessment
| Reference | Discloses fingered trace? | Discloses damascene trace in dielectric? | Discloses looped inductor? | Claims it could anticipate in full | Proper role |
|---|---|---|---|---|---|
| US 3,573,540 (A1) | No | No | No | None | Background (GHz/RF) |
| US 4,165,558 (A2) | No | No | No | None | Background (materials) |
| US 5,434,094 (A3) | No | No | No | None | Background (FET fab) |
| US 5,952,704 (A4) | No | No | Yes (spiral) | None | §103 (inductor/Q) |
| US 5,998,299 (A5) | No | No | No | None | Background (interconnect reliability) |
| US 6,191,023 (A6) | No | Yes (Cu damascene pad) | No | None | §103 (damascene/coplanar top) |
| US 6,326,673 (A7) | No | Partial (metal in dielectric) | Yes (spiral) | None | §103 (looped trace in dielectric) |
| US 6,444,517 (A8) | No | Yes (Cu dual‑damascene inductor) | Yes (spiral) | None | Primary §103 reference |
Bottom line: every one of the eight face citations is, at most, §103 (obviousness) art or background. No cited reference — individually or as the primary reference — discloses the claimed "base region + plurality of spaced‑apart fingers extending away from the base region" structure, which is the point of novelty of both independent claims. The realistic validity challenge to '710 would therefore sound in §103 over US 6,444,517 (damascene Cu inductor/looped trace) as primary, in view of US 6,326,673 and/or US 5,952,704 (spiral inductors in dielectric) and US 6,191,023 (coplanar Cu damascene fill) — but the examiner did not make that rejection, and nothing on the face anticipates.
4. What is not prior art (to avoid conflation)
The "Cited By" family members — US 6,864,581 ("Etched metal trace…"), US 8,004,061 ("Conductive trace…"), US 7,223,680 (the '710 divisional, "Method of forming a dual damascene metal trace…"), US 7,309,639, US 7,098,044, US 6,740,956 — are National Semiconductor sibling/continuation patents in the same family, most sharing the 2002‑08‑15 priority. They post‑date the '710 priority date and are not §102 prior art against '710; they are relevant only for prosecution‑history/double‑patenting/JE‑type context, not as anticipation. The Korean reference KR 100818411 B1 and the Seiko Epson US 2008/0157272 A1 / US 7,791,165 B2 are also post‑dating and appear only under "Cited By."
5. Uncertainty flags (literal‑identifier discipline observed)
- US 5,434,094 (A3), US 5,952,704 (A4), US 5,998,299 (A5): I did not complete a live fetch of these documents before the tool limit; their descriptions are drawn from the '710 face citations and my background knowledge. Treat the one‑line descriptions as provisional; the citations/dates come from the authoritative patent text.
- US 4,165,558 A verification search returned the patent PDF but my returned snippet is partial; the "solid phase epitaxy / Al‑Si" characterization is confirmed by the snippet, though I did not read its claims.
- Citation-type labeling: the examiner‑vs‑third‑party asterisks come from Google Patents' legend; I have reported them as such and note that Google Patents is not the USPTO's binding record (the PTO "References Cited" / form PTO‑892 would be).
- No foreign/NPL art: the '710 face lists only the eight U.S. patents above; I found no foreign patent document or non‑patent literature cited against '710 itself (foreign items appear only in the family citation list, which is not '710 art).
- "Potentially anticipates" is used strictly: in every row above where I wrote "closest," the finger limitation defeats a true §102 rejection; I have not overstated any reference as anticipating a claim it does not fully meet.
Generated 9/30/2026, 7:53:05 PM
Obviousness
Combinations of prior art that suggest the claimed invention would have been obvious under 35 U.S.C. § 103.
I'll ground the analysis by pulling the substance of the examiner-cited references, then build the § 103 combinations.
Let me look for the key technical linchpin — prior art on increasing conductor surface area to counter the skin effect — plus a few of the remaining cited references.
Obviousness Analysis — U.S. Patent No. 6,703,710 B1 under 35 U.S.C. § 103
Patent: Dual damascene metal trace with reduced RF impedance resulting from the skin effect
Effective filing / priority date: 2002-08-15 → pre-AIA § 103(a) governs (AIA first-inventor-to-file applies only to applications filed on/after 2013-03-16)
Claims analyzed: 20 (independents 1 and 13; all apparatus)
Status note: the patent lapsed 2012-03-09 for non-payment of maintenance fees. This is therefore a hypothetical/validity-only analysis; there is no live infringement exposure to assess.
1. Framework and premises
Governing test. Graham v. John Deere, 383 U.S. 1 (1966) (scope/content of prior art; differences; PHOSITA level; secondary considerations), as modified by KSR Int'l v. Teleflex, 550 U.S. 398 (2007) (the TSM test is not the exclusive route; a combination is obvious where the improvement is the "predictable use of prior art elements according to their established functions"). The strongest rationales available here are KSR rationales (a): combining prior art elements according to known methods to yield predictable results, and (f): "if a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious."
Level of ordinary skill (POSITA). A B.S. in electrical engineering, applied physics, or materials science, plus roughly 3–5 years of experience in RF/mixed-signal IC design and semiconductor back-end-of-line (BEOL) process integration; conversant with (i) the skin effect and its relationship to conductor perimeter, (ii) damascene/dual-damascene copper metallization and CMP, and (iii) inductor quality factor Q = ωL/Z as recited in the patent itself.
Claim construction thresholds that drive everything else. Both independents require the metal trace to be formed in a layer of insulation material (i.e., a buried, dielectric-embedded conductor — the damascene architecture), and both require discrete spaced-apart fingers projecting off the body. Claim 13 adds three structural limits: length ≫ width; fingers running end-to-end along the length; and a trace top surface coplanar with the dielectric top surface. Claim 1's closing limitation — fingers extending off a bottom surface — is a pure spatial-orientation recitation with no functional consequence.
Critical observation about the record. The examiner's eight cited references are, with two exceptions, off-point to the actual point of novelty. US 4,165,558 (photovoltaic solid-phase epitaxy), US 5,432,094 (FET fabrication), US 5,998,299 (plasma-damage protection), US 3,573,540 (microwave traveling-wave tube) and US 6,191,023 (copper pad adhesion) do not address conductor surface area. Of the eight, only US 6,326,673 (Winbond, high-Q inductor) and US 6,444,517 (TSMC, Cu damascene high-Q inductor) engage the relevant problem, and US 6,395,632 (Micron, damascene etch stop) supplies the process architecture. The decisive art — longitudinal slotting of a conductor to defeat skin effect — is not in the record, which I address in § 3.
2. The prior-art pool from the page
| Reference | Date basis | What it supplies | Statutory basis |
|---|---|---|---|
| US 6,444,517 B1 (TSMC) — "High Q inductor with Cu damascene via/trench etching simultaneous module" | Filed 2001-01-23; granted 2002-09-03 | Cu damascene spiral inductor in intermetal dielectric; simultaneous trench/via etch module; barrier/seed/electroplate/CMP; explicit discussion of mobile-comm high-Q needs and of series resistance | § 102(e) as of its filing date (cited on the face of the patent) |
| US 6,326,673 B1 (Winbond) — "Method and structure of manufacturing a high-Q inductor with an air trench" | Filed 1998; granted 2001-12-04 | Spiral metal lines in dielectric layers connected by via plugs; express statement that R_s of the metal line is the main factor reducing Q and that widening the line is disfavored because it increases area and parasitic capacitance C_d | § 102(b) |
| US 6,395,632 B1 (Micron, Farrar) — "Etch stop in damascene interconnect structure" | Filed 2000-08-31; granted 2002-05-28 | Textbook dual-damascene: first/second insulating layers over a substrate, etch-stop layer, trench + via, metal 20 (Cu) filling both, planarized flush | § 102(b) (cited on face) |
| US 6,362,012 B1 (TSMC) — merged vertical capacitor inside spiral conductor | Granted 2002-03-26 | Vertical spiral inductor with vias interconnecting overlying coils and underlying contact plugs | § 102(b) (projected from the Family-Cites list) |
| US 6,414,087 B1 / US 6,495,469 B1 / US 6,435,385 B1 / US 6,213,102 B1 / US 6,057,107 A / US 6,281,135 B1 / US 6,107,177 A / US 6,277,727 B1 (from the 24 "Family Cites Families") | pre-2002 | Damascene/dual-damascene process variants, CMP, via-and-trench integration, planarized interconnects, increased-density interconnection metallization (US 6,232,215) | § 102(b) |
| US 6,197,023 B1 (TSMC) — copper pad adhesion | 1999-11-18 | CMP-based copper planarization | § 102(b) (on face) |
| US 6,326,673 / US 6,446,517 | see above | Inductor loop geometry: spiral / 1.5-turn planar coils, vias under the winding | § 102(b)/(e) |
| "Cited By" list (US 6,864,581; US 7,223,680; US 7,309,639; US 8,004,061; US 7,705,421; US 7,098,044; KR 100818411 B1) | 2005+ | Not available as § 102/103 art — all post-date the '710 priority date (2002-08-15). Several are the applicant's own same-day siblings. | Ineligible |
3. The art that actually decides the case (supplemental — not in the record)
The page's prior-art section does not contain a single reference directed to increasing conductor surface area/perimeter to defeat the skin effect. That art is extensive and old:
- US 2,417,785 (Slepian, Westinghouse, granted 1947-03-18) — "Low-Loss Conductor for High-Frequency Currents." Teaches exactly the present invention's mechanism: current concentrates near the surface at high frequency, so "it is proposed to reduce the losses due to skin effect by proper slotting of the conductor in the direction of current," producing fins, and it even supplies a design rule — slot width b relative to skin depth d (b/d ≈ 10 for copper). It notes the calculation "involved the approximation depending on the ratio of c = b/d," i.e., a predictable, tunable geometry. Source: https://patentimages.storage.googleapis.com/cc/66/03/57cf4b7a548468/US2417785.pdf
- US 6,407,340 — "Electric conductor with a surface structure in the form of flanges and etched grooves." Carrier may be "a printed circuit board, a substrate or a chip"; the conductor surface carries flanges defined by etched grooves, and claim 1 requires the flanges to extend **"essentially in a longitudinal direction of the conductor and essentially along the entire length of the conductor."* The specification states the resistance reduction at high frequency is due to the increased surface compensating the skin effect. Source: https://patents.justia.com/patent/[6407340](/patent/6407340)
- DE 195 19 582 A1 (published Dec. 1996) — grooved/corrugated conductor bodies for HF cables; expressly describes grooves distributed around the perimeter and running continuously along the length to enlarge the current-carrying surface, and expressly acknowledges the trade-off including the "Proximity-Effekt zwischen eng benachbarten Erhöhungen" (proximity effect between closely adjacent elevations). Source: https://patents.google.com/patent/DE19519582A1/en
- DE 202 004 016 355 U1 — conductor body with many longitudinal grooves expressly to reduce the frequency-dependent resistance increase per unit cross-section, reasoning that the frequency-dependent rise is inversely proportional to the perimeter length of the conductor cross-section. Source: https://patents.google.com/patent/DE202004016355U1/en
- US 6,967,289 (Goto Denish) — wire with surface grooves "to increase a surface area of the conductive portion for enlarging the skin effect."
Why this matters. Every functional element the '710 claims add over a conventional damascene trace — increased perimeter via discrete projections, running longitudinally, with the base body intact — was a decades-old, well-understood, expressly articulated answer to the skin effect. The '710 specification admits the problem (col. 1: "the skin effect causes current to flow primarily at the surface… effectively increases the RF impedance") and claims precisely the known cure.
4. Combination 1 — Claim 1 (and claims 2–12) obvious
Primary combination: US 6,395,632 (Micron) or US 6,444,517 (TSMC) in view of US 2,417,785 (Slepian); alternatively in view of US 6,407,340.
| Claim 1 limitation | Where disclosed |
|---|---|
| "a layer of insulation material formed over a semiconductor substrate" | US 6,395,632, FIG. 1: insulating layers 14, 16 over substrate 10; US 6,444,517: dielectric layers over substrate |
| "a metal trace formed in the layer of insulation material" | US 6,395,632, FIG. 3: Cu metal 20 filling trench 17 and via 18 in the insulating layers, CMP'd flush = dual damascene. US 6,444,517: Cu damascene coils in IMD |
| "base region" | the damascene trench-fill body in either reference |
| "a plurality of spaced-apart fingers that extend away from the base region" | Slepian (slots → fins, FIG. 1–2); US 6,407,340 (flanges via etched grooves); DE 19519582 A1 (grooves around the perimeter) |
| "the fingers extending away from a bottom surface of the base region" | Pure orientation selection. Slepian's fins are integral to the body; US 6,407,340 puts them on the surface facing away from the carrier — flipping the projection to the opposing face changes nothing functionally |
Rationales a POSITA would articulate:
- Same problem, same solution, same field of endeavor. Slepian's stated objective is "reducing losses due to skin-effect"; the '710 specification's stated problem is the skin effect raising RF impedance at GHz. Both solve it by enlarging the current-carrying surface.
- Express, enabling teaching with a design rule. Slepian doesn't merely suggest the idea; it gives the b/d slot-to-skin-depth relationship, making the result predictable rather than experimental — the KSR "predictable use of prior art elements according to their established functions."
- The art expressly frames the motivation, in the inductor context. US 6,326,673 states that R_s of the spiral metal line "is considered to be a main factor in reducing the quality factor" and that the obvious remedy, widening the line, "increased the area occupied by the metal line and the parasitic capacitance C_d that follows" and is therefore disfavored. A POSITA reading US 6,326,673 is thus directed to search for a way to reduce series resistance without widening the trace — which is exactly what fins accomplish (perimeter up, footprint constant). This is a textbook articulated motivation to combine.
- The process is already in hand. US 6,395,632 and US 6,444,517 (and the Family-Cites art such as US 6,495,469) teach multi-level, sub-micron trench etching into dielectric and CMP planarization, i.e., the toolset for forming sub-micron longitudinal grooves in a damascene conductor.
- The "chip vs. cable" objection is neutralized. US 6,407,340 expressly claims the flanged/grooved conductor on a chip as well as a PCB or substrate, for the express purpose of reducing high-frequency resistance.
Dependent claims 2–12 add nothing non-obvious given the same combination:
- 2–3 (first/second GHz circuits; trace in a horizontal plane): US 6,444,517 and US 6,326,673 are both directed to RF/mobile-communication spiral inductors/planar coils connected to circuits.
- 4–5, 9–11 (contact / via; via under the trace): US 6,444,517 (vias to the coil), US 6,326,673 (via plugs), US 6,362,012 (contact plugs and vias beneath/interconnecting coils).
- 6–7, 14–15 (trace forms a number of loops lying substantially in the same plane): US 6,326,673 and US 6,446,517 teach planar spiral windings; US 6,362,012 a vertical spiral.
- 8, 12 (first/second ends; fingers off a bottom surface): restatements of the above.
- 17–19 (a lower trace segment connected to the via, itself with fingers, length ≫ width, end-to-end): direct application of the same skin-effect teaching to the next metal layer, which US 6,326,673 already teaches (stacked spiral metal lines joined by via plugs expressly "to greatly decrease the series resistance"). KSR rationale (f): the same technique applied in the same way to an adjacent, known structure.
5. Combination 2 — Claim 13 obvious
Claim 13 is, if anything, weaker than claim 1 because its added limitations map onto specific prior-art language.
| Claim 13 limitation | Where disclosed |
|---|---|
| trace has "a width" and "a length that is substantially greater than the width" | US 6,407,340 claim 1 ("having a length"); any long routing line or inductor winding (US 6,444,517) |
| "a plurality of spaced-apart fingers… run from a first end… to a second end… along the length" | US 6,407,340, claim 1: flanges "extending essentially in a longitudinal direction of the conductor and essentially along the entire length of the conductor." Also Slepian ("slotting of the conductor in the direction of current") and DE 19519582 A1 (grooves "sich durchgehend über dessen Länge erstrecken") |
| "a top surface of the metal trace and a top surface of the insulation material lying in a same horizontal plane" | US 6,395,632, FIG. 3 (damascene trench fill, then planarization so the metal is flush); US 6,444,517 (CMP of the Cu fill to the IMD surface); US 6,197,023 (copper CMP) |
Claim 20 ("fingers run continuously from the first end to the second end") is the verbatim teaching of US 6,407,340 claim 1. Claim 20 thus raises a serious § 102 question independent of any combination, subject only to whether "on a surface of a carrier [chip]" versus "formed in the layer of insulation material" is a material distinction — it is, so anticipation likely fails, but the § 103 gap is one routine substitution (bury the flanged conductor in the dielectric, as US 6,395,632 teaches for any conductor).
6. Nearest § 102 (anticipation) theories, and why they probably fail
- Slepian (US 2,417,785) discloses the fins/slots but not a "semiconductor device," "layer of insulation material," or a trace "formed in" dielectric. Not anticipatory; devastating as § 103 art.
- US 6,407,340 discloses flanges via etched grooves on a chip but requires the conductor on a surface of the carrier, i.e., the opposite of "formed in the layer of insulation material." Not anticipatory.
- US 6,395,632 / US 6,444,517 disclose every structural element except the fingers. Not anticipatory.
- US 6,326,673 requires an air trench between turns — a different mechanism (lowering C_d) than finning (increasing perimeter). Not anticipatory.
No single reference discloses all limitations of either independent claim. Anticipation fails; obviousness succeeds.
7. Rebuttal arguments a patent owner would raise (and how they fare)
- Teaching away / conflicting design goals. US 6,326,673 warns that adding conductor area raises C_d and lowers self-resonance; DE 19519582 A1 warns of a "Proximity-Effekt zwischen eng benachbarten Erhöhungen." This is the best available argument — but it is directed at close-pitch fins, and neither independent claim recites any pitch, width, or depth of the fingers. DE 19519582 A1 itself frames the trade-off as an optimizable compromise, not a prohibition. A design-parameter optimization argument is unlikely to survive KSR.
- Unexpected results. The specification contains no comparative data — no measured Q, no resistance delta, no control trace. Under In re Soni-style principles, attorney argument without evidence of unexpected results carries little weight.
- Secondary considerations. Weak across the board: no evidence of commercial success attributable to the finned geometry, no licensing of this patent, no copying, no industry praise, no litigation, and the family was deliberately abandoned for fee non-payment in 2012, eight years into a term that ran nominally to 2022. Sibling patents were maintained longer (US 8,004,061 issued 2011), but the '710 apparatus patent was not.
- "Bottom surface" limitation. This cannot carry patentability. Where a limitation is a mere reversal of orientation with no change in function, it is an obvious design choice.
8. Conclusion
Claim 1 would very likely be held obvious under § 103(a) over US 6,395,632 (Micron) or US 6,444,517 (TSMC) in view of US 2,417,785 (Slepian) — alternatively over US 6,407,340 — with the motivation supplied by express statements in the art (US 6,326,673: series resistance R_s limits Q; widening the line is disfavored because of C_d) plus the express skin-effect solution in Slepian.
Claim 13 would very likely be held obvious over the same combination, and its longitudinal-finger and coplanar-top limitations are met almost verbatim by US 6,407,340 claim 1 and US 6,395,632 FIG. 3 respectively. Claims 2–12 and 14–20 fall with the independents; none adds a limitation that is not disclosed or an obvious design choice in light of the cited inductor and damascene art.
The single most important finding of this analysis is a prosecution-quality gap: the examiner cited eight references, none of which teaches the actual point of novelty (increasing conductor perimeter to defeat the skin effect), while the entire "grooved/slotted/finned conductor" body of art — including a 1947 Westinghouse patent stating the invention's mechanism and design rule in terms — went uncited. Had that art been before the examiner, the independent claims would have been very difficult to sustain.
9. Explicit uncertainties and limitations
- Supplemental art is not from the page's prior-art section. US 2,417,785, US 6,407,340 and DE 195 19 582 A1 were located by my own search, not from the "Citations" list. They are the strongest references I found; their omission from the record is my inference, not a documented fact.
- Unverified dates. I did not confirm the exact grant date of US 6,407,340 or the publication date of DE 195 19 582 A1 from a primary source; both appear pre-2002-08-15 from secondary listings, which is what matters for § 102(b). US 6,444,517 is relied on under § 102(e) (filed 2001-01-23) because it granted 2002-09-03, after the '710 filing — it is on the '710 face, so the examiner treated it as art, but the precise subsection is my characterization.
- Full texts not retrieved. I could not pull the specifications of US 5,952,704, US 3,573,540, US 5,432,094, US 5,998,299, US 6,191,023, US 4,165,558, US 4,541,893, US 6,056,166/6,211,022-class Family-Cites items before hitting tool limits, so I have not element-mapped them; several may add further § 103 support.
- Personnel-level facts. Any actual USPTO or court determination would turn on record evidence (declarations, comparative data) that does not exist in the public documents I reviewed. This is a merits opinion, not a legal conclusion.
- § 112 cross-reference, not § 103. Earlier sections of this analysis flagged (a) the specification's reference to fingers extending from side "220A" while the claim recites a "bottom" surface, possibly the subject of the 2004-10-12 certificate of correction whose text I could not retrieve, and (b) claim 13's missing antecedent basis for "metal trace." Those are enablement/written-description/definiteness issues that would be litigated alongside — but separately from — the § 103 question analyzed here. I flag them because a § 112 holding on claim 1's "bottom surface" limitation could, in principle, moot part of the § 103 analysis for that claim.
Generated 9/30/2026, 7:53:32 PM
Extensions
Patent term adjustments, term extensions, continuations, divisionals, family members, and expiration dates.
Derivative works
Defensive disclosure: derivative variations of each claim designed to render future incremental improvements obvious or non-novel.
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