Invalidity dossier

US 6678192

Error management for writable tracking storage units

Current assignee: SanDisk Technologies LLC

Added 9/23/2026, 7:07:49 PM

At a glanceNo PTAB challengesNo litigation on file

Active provider: DeepSeek · deepseek-flash

Patent summary

Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.

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Patent Overview

Title: Error management for writable tracking storage units
Patent No.: US6678192B2
Application No.: US10/053,339
Assignee (original): SanDisk Corporation; current assignee listed as SanDisk Technologies LLC
Inventors: Geoffrey S. Gongwer, Shahzad B. Khalid, Daniel C. Guterman
Priority/Filing Date: 2001-11-02
Publication Date: 2004-01-13
Legal Status (as listed): Expired – Lifetime; adjusted expiration 2022-04-02

Purpose: The patent addresses error management for stored levels—particularly reference levels—used to discriminate logic levels in non-volatile, multi-state memory systems such as flash cards. Because charge retention is imperfect, stored levels can drift or become aberrant due to bias voltages, electromagnetic fields, trapped charge, voltage disturbs, physical variations, and charge loss, increasing read-error probability.

Plain-language scope: The disclosed approaches read stored levels (e.g., reference levels) from predetermined storage units, such as writable tracking storage units, and evaluate their quality. If a stored level is deemed aberrant or unacceptable, the system corrects for it, then determines discrimination levels for associated data storage units based on the stored levels. Embodiments include: reading reference levels and evaluating quality; substantially concurrently reading data levels and reference levels, computing a processed reference level, determining state discrimination levels, discriminating data states, then evaluating reference-level quality while discriminating; and either directing read data to a requester when quality is acceptable, or halting/sending and correcting when quality is unacceptable. The text indicates the invention may be implemented as a system, device, or method, typically in a non-volatile memory product providing binary or multi-state data storage.

Source: https://patents.google.com/patent/[US6678192](/patent/US6678192)/en

What the excerpt does not establish: The supplied text is an excerpt with omitted claims and detailed description, so full claim scope, dependent claims, and specific correction mechanisms are not established here. It also does not establish litigation history, validity, prior-art distinctions, or ownership-transfer details; classification entries are listing metadata, not substantive findings.

Generated 10/1/2026, 9:42:19 PM

Cases on file (0)

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Litigation summary

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Proceedings on file (0)

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No PTAB proceedings on file. This patent has not been challenged via IPR, PGR, or CBM. The absence is itself a signal — well-asserted patents eventually attract IPRs. The LLM analysis below may surface filings the ODP feed hasn’t indexed yet.

PTAB challenges

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Assignment history

Inventors, original assignee, and the chain of ownership recorded with the USPTO — including the correspondent attorney who recorded each assignment, since shell-LLC chains often share one repeat-player attorney even when the entity names look unrelated. Surfaces NPE / patent-troll patterns: shell-entity transfers, known asserters in the chain, repeat correspondent fingerprints, pre-litigation assignments, and bankruptcy fire-sales.

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Prior art

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Obviousness

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Extensions

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Derivative works

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