Invalidity dossier
US 5835785
Multiplexed three line synchronous/full-duplex asychronous data bus and method therefor
Current assignee: Google Technology Holdings LLC
Added 9/23/2026, 5:14:29 PM
Active provider: DeepSeek · deepseek-flash
Patent summary
Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.
Patent Overview — US 5,835,785 A
Title: Multiplexed three line synchronous/full-duplex asynchronous data bus and method therefor
Patent number / application: US 5,835,785 A; Application US08/338,993
Inventors: Eric J. Overtoom; Manohar A. Joglekar
Original assignee: Motorola, Inc. (later recorded assignees listed as Motorola Mobility, Inc., Motorola Mobility LLC, and Google Technology Holdings LLC)
Dates: Priority date 1994-11-14; filing date 1994-11-14; publication/grant date 1998-11-10. Listed legal status: Expired – Lifetime (anticipated expiration 2015-11-10).
Purpose. The patent describes a data transmission system with a multiplexed synchronous/asynchronous data bus and a method therefor. One application is a portable radiotelephone, where minimizing bus lines and connectors aids miniaturization. The disclosed bus has three communications lines (T, C, R) and carries: (1) a first data message at a first data transfer rate; (2) a second data message at a second data transfer rate; and (3) a third data message from a slave back to a master. Each message is a plurality of binary bits, each bit being a binary zero or binary one for a period related to the data transfer rate.
Plain-language scope. Per the supplied text, the master device applies a first binary state to first and second lines before and after the first message, couples the first message and a false address to those lines, then applies a second binary state to them, and applies the second message's bits to the second line while the first line holds the second binary state. The slave receives the first message and false address, applies the second binary state condition similarly, sends the third message on the third line at the first rate, and receives the second message. The disclosure references a known self-clocking bus (U.S. Pat. No. 4,369,516 to Byrns) and asynchronous serial transmission (MC68HC11A8 SCI).
Not established by the excerpt. Claims, detailed description, exact figures/tables, any prior-art analysis beyond the citations noted, and any litigation, validity, or ownership-transfer details are not established here and are not assessed.
Generated 10/1/2026, 9:43:44 PM
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Prior art
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