Invalidity dossier
US 5159353
Thermal inkjet printhead structure and method for making the same
Current assignee: HP Inc
Added 9/24/2026, 9:58:01 AM
Active provider: DeepSeek · deepseek-flash
Patent summary
Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.
I'll search for authoritative information on this patent number, including any litigation or CAFC activity.
Let me run a couple more targeted searches to check for any litigation or PTAB records tied specifically to this number.
Let me do one final check for any PTAB/IPR or litigation activity specifically tied to this patent.
Verification and search scope
I searched for US 5,159,353 specifically and found no litigation, no PTAB/IPR, and no CAFC 2026 docket activity tied to this patent number. Two cautions on that negative finding:
- One search hit referenced a "515 patent" in a 2026 order in National Steel Car Limited v. FreightCar America, Inc. (D. Del. 1:24-cv-00594-JLH-CJB). That is a different patent number and a railroad-freight dispute; nothing connects it to 5,159,353. I am not auto-associating them.
- I could only reach CAFC/PACER-adjacent material indirectly through general web search, not direct docket queries. So "no CAFC 2026 activity found" reflects my search coverage, not a certified docket check. It is also consistent with the patent's status: it is recorded as Expired – Lifetime, with an anticipated expiration of 2011-07-02 (20 years from the 1991-07-02 filing), so live assertion in 2026 would be implausible except for past-damages appeals in a long-pending case.
The primary source for everything below is the authoritative full text: https://patents.google.com/patent/US5159353/en
Bibliographic data
| Field | Value |
|---|---|
| Patent number | US 5,159,353 A (US5159353A) |
| Title | "Thermal inkjet printhead structure and method for making the same" |
| Application number | US07/724,658 |
| Filing date | 1991-07-02 |
| Priority date | 1991-07-02 |
| Issue/publication date | 1992-10-27 |
| Original assignee | Hewlett-Packard Company (assignment recorded 1991-08-22, "A CA Corporation") |
| Current assignee (as listed) | HP Inc — Google notes the assignee list may be inaccurate |
| Inventors | Duane A. Fasen; Jerome E. Beckmann; John H. Stanback; Ulrich E. Hess; James R. Hulings; Larry S. Metz; Charles E. Moore |
| Claims | 37 |
| Status | Expired – Lifetime; anticipated expiration 2011-07-02 |
| Patent family | EP0521634B1 (EP), DE69210115T2, JP3262595B2, HK149696A |
Later reassignments recorded: 2001-01-16 to Hewlett-Packard Company (merger), and the Google record lists Hewlett-Packard Development Co. as a family assignee.
Abstract (as published)
An improved thermal inkjet printhead having MOSFET drive transistors incorporated therein. The gate of each MOSFET is formed by applying a silicon dioxide layer onto a silicon substrate, a silicon nitride layer onto the silicon dioxide, and a polycrystalline silicon layer onto the silicon nitride. Portions of the substrate surrounding the gate are oxidized to form field oxide regions. Drain and source regions are then conventionally formed, followed by a protective dielectric layer over field oxide, drain, source and gate. A resistive layer is deposited on the dielectric and directly connected to source, drain and gate. A conductive layer is deposited on a portion of the resistive layer, forming covered and uncovered regions. The uncovered region functions as a heating resistor and the covered regions function as electrical contacts to the transistor and resistor.
Plain-language overview of the independent claims
The disclosed invention is a thermal (bubble-jet) printhead in which MOSFET drive transistors are built into the same silicon chip as the heater resistors. Its central trick is that the same SiO₂/Si₃N₄ dual layer used as the LOCOS field-oxide mask is left in place and reused as the finished gate dielectric, eliminating the conventional strip-and-regrow gate-oxide steps.
Claim 1 — the base printhead structure (apparatus).
A silicon substrate carries a MOSFET with source, drain and a gate between them. The gate is a three-layer stack: silicon dioxide directly on the substrate, silicon nitride on the oxide, and polycrystalline silicon on the nitride. A silicon-dioxide field oxide surrounds the transistor. A dielectric layer covers the field oxide and the transistor, with openings down to source, drain and gate. On top of that dielectric sits an electrically resistive layer that directly contacts source, drain and gate through those openings (no intervening layers). A conductive layer is affixed over part of the resistive layer, creating a multi-layer stack in which at least one section of resistive material is left uncovered by conductor — that uncovered section is the heating resistor. Critically, the resistive material is covered by conductor at the source, drain and gate, so the same resistive/conductive stack serves double duty: heaters and wiring. Protective material covers the heater, and an orifice plate is secured to that protective material with a section removed beneath the orifice opening to form an ink-receiving cavity aligned over the heater.
Claim 9 — the base structure narrowed to the preferred embodiment.
Same overall architecture, but with these additional limitations:
- the dielectric layer over the field oxide/transistor is specifically silicon nitride;
- the gate's polysilicon continuously decreases in width from its lower surface to its upper surface (i.e., the sloped/isotropically-etched sidewalls that promote full nitride coverage);
- the resistive layer is polycrystalline silicon or a tantalum-aluminum mixture;
- the conductive layer is aluminum, copper or gold;
- the protective material is specified as four layers: a silicon nitride first passivation layer, a silicon carbide second passivation layer on it, a tantalum/tungsten/molybdenum cavitation layer on that, and a plastic ink barrier layer on the cavitation layer, with the orifice plate secured to the barrier layer and the cavity formed in the barrier layer.
Claim 11 — a thermal inkjet printing apparatus (cartridge-level claim).
A housing with at least one outlet; an ink storage means inside the housing; and a printhead secured to the housing and in fluid communication with the storage means through the outlet. The printhead is the full structure recited verbatim in claim 1 (same gate stack, field oxide, dielectric with openings, resistive layer in direct contact with source/drain/gate, resistive/conductive multi-layer with an uncovered heater section, protective material, and orifice plate with the cavity aligned over the heater).
Claim 19 — a printing apparatus narrowed to the preferred embodiment.
The apparatus of claim 11 but with the printhead of claim 9: sloped (width-decreasing) polysilicon gate, silicon nitride dielectric, resistive layer of polysilicon or Ta-Al, conductive layer of Al/Cu/Au, and the four-layer protective stack of SiN/SiC/cavitation metal/plastic barrier with the orifice plate on the barrier.
Uncertainty note (please read)
I can confirm the four independent claims above (1, 9, 11, 19) because their text is present in the source. Claims 20–37 are not visible in the text I retrieved — the record truncates mid-claim 20 ("The printing apparatus of claim 19 wherein said source region and said drain regio[n]…"). Given the title ("…and method for making the same") and the 37-claim count, I would expect additional independent method claims in that range, but I will not state their content as fact. Anyone needing them should pull the full claim set from the USPTO PatentCenter/Patent Public Search record for US07/724,658.
Two literal-reading observations rather than corrections: (a) claim 9 as published opens the transistor element with the phrase "a MOSFET transistor substrate," which reads like an artifact of the original text; (b) the abstract/description writes the conductive-layer composition as "about 95.5% by weight aluminum, about 3.0% by weight about 1.5% by weight silicon," which is missing a material name between the two "by weight" clauses. I am reporting the text as it appears rather than inferring the intended wording.
Downstream citation footprint (context, not litigation)
US 5,159,353 has been cited as prior art in later HP inkjet work — e.g., US 6,102,528 ("Drive transistor for an ink jet printhead," citing it at http://www.everypatent.com/comp/pat6102528.html), US 5,774,148 ("Printhead with field oxide as thermal barrier in chip"), and EP 1 944 164 A3's European search report, which lists it as an "X" category document against claims 27, 31 and 33. None of these are litigation or CAFC proceedings.
Generated 9/30/2026, 7:41:05 PM
Cases on file (0)
Specific litigation cases in our database that name US patent 5159353. The free-form analysis below may also discuss cases beyond this list.
No cases on file mention this patent. Upload a CSV or add a case manually in Admin → Manage litigation cases.
Litigation summary
Past and pending lawsuits — plaintiffs, defendants, jurisdictions, outcomes, and notable rulings.
I'll research litigation involving US patent 5159353.
Let me search more targeted litigation databases.
Let me try more specific litigation-focused searches.
Litigation Search Report — U.S. Patent No. 5159353
Patent identification (verified against the authoritative full-text provided):
- Patent No.: US 5,159,353 A
- Title: "Thermal inkjet printhead structure and method for making the same"
- Application No.: US 07/724,658; Filed: 1991-07-02; Granted/Published: 1992-10-27
- Original Assignee: Hewlett-Packard Company (current listed assignee: HP Inc.)
- Inventors: Fasen; Beckmann; Stanback; Hess; Hulings; Metz; Moore
- Status on the authoritative source: Expired - Lifetime (anticipated expiration 2011-07-02)
- Related family members noted on the source: EP 0521634 B1, DE 69210115 T2, JP 3262595 B2, HK 149696 A
Result: No litigation found
Based on my searches, I found no evidence of any litigation — district court, ITC, PTAB, or CAFC — involving U.S. Patent 5,159,353. No case records with a plaintiff, defendant, jurisdiction, case number, filing date, or outcome could be identified for this patent.
Searches performed and what they returned
- "US patent 5159353 litigation lawsuit" — Returned only the Google Patents page for the '353 patent itself, plus unrelated results (a Honeywell/Litton patent-tort case, a Mahle aftermarket parts catalog listing part "5159353", etc.). Nothing referencing the '353 patent in litigation.
- "5159353" patent infringement case — Returned the Japanese patent JP 5159353 B2 (a Hitachi storage-system patent — a completely different, unrelated patent) and an unrelated Fed. Cir. case (VL Collective IP v. Unified Patents). Note: JP 5159353 B2 is a distinct identifier from U.S. 5,159,353 and I have not conflated the two.
- unifiedpatents.com litigation "5159353" — No Unified Patents litigation/PTAB record for the '353 patent; only Unrelated Unified Patents coverage (e.g., U.S. 7,373,655).
- "5,159,353" patent lawsuit Hewlett-Packard — Returned generic HP/HPE securities-disclosure litigation summaries (Nokia, R2 Semiconductor, Q3 Networking, Intergraph settlement, etc.). None of these assert or mention U.S. 5,159,353.
- patent 5159353 CAFC appeal — Returned unrelated Fed. Cir. decisions (e.g., Biomedical Device Consultants v. ViVitro Labs involving a different "’935 patent"). Nothing on U.S. 5,159,353.
Important caveats — please treat this as a negative result, not an affirmative clearance
- I could not directly query the Unified Patents litigation portal, PACER, or CourtListener/Justia docket pages for this patent number; those searches either returned no responsive records or timed out. My conclusion rests on general web searches, which are not a substitute for an authoritative docket search.
- Negative search results are not proof of no litigation. A patent can be asserted in cases where the public web indexing is incomplete, where the patent number appears only inside a sealed or non-indexed complaint, or where it was asserted alongside other HP inkjet patents (HP historically asserted inkjet printhead patents as part of larger portfolios — e.g., against ink-cartridge remanufacturers), and the specific '353 number may not surface in general web results.
- Given the patent expired in 2011, any assertion would necessarily predate expiration, and any such older cases are less likely to be well-indexed online.
Recommended next steps for a definitive answer
To confirm or rule out litigation conclusively, run paid/authoritative docket searches rather than open web search:
- LexisNexis / Docket Navigator / RPX / Unified Patents litigation portal — search the patent number directly.
- USPTO Patent Center → "Legal Proceedings / PTAB" and the USPTO Assignment record (already linked on the source page).
- CourtListener/RECAP full-text search for "5,159,353" and "5159353".
- ITC EDIS (Section 337 investigations) and CAFC docket search.
Bottom line: On the evidence available, no litigation involving U.S. Patent 5,159,353 is known or discoverable, but I cannot rule it out with certainty because I was unable to access the primary litigation databases directly.
Generated 9/30/2026, 7:41:16 PM
Proceedings on file (0)
All PTAB activity →AIA trial proceedings (IPR / PGR / CBM) filed at the USPTO Patent Trial and Appeal Board against this patent. Sourced from the USPTO Open Data Portal and refreshed every six hours; each proceeding number deep-links to the PTAB E2E docket.
No PTAB proceedings on file. This patent has not been challenged via IPR, PGR, or CBM. The absence is itself a signal — well-asserted patents eventually attract IPRs. The LLM analysis below may surface filings the ODP feed hasn’t indexed yet.
PTAB challenges
AIA trial proceedings at the USPTO Patent Trial and Appeal Board — IPR, PGR, and CBM. Petitioners, judge panels, claim-level invalidation outcomes from Final Written Decisions, and Federal Circuit appeals. The single most important defensive datapoint after litigation history.
PTAB / AIA Trial Analysis — US 5,159,353
Bottom line up front: there are no AIA trial proceedings on this patent. The structured "PTAB proceedings on file" block (USPTO Open Data Portal, canonical) returns zero proceedings. I searched for the same and found nothing — but found four decoy "353" records that are frequently conflated with this patent. Details in the Strategic Summary.
Proceedings overview
Total count: 0 AIA trial proceedings on US 5,159,353 — 0 active, 0 with claims invalidated, 0 with claims sustained, 0 settled, 0 institution-denied. There is therefore no PTAB disposition of any kind to lean on: the patent's 37 claims were never tested at the Board, and no FWD, no institution decision, and no PTAB appeal exists for a defendant to cite, characterize, or ride. A defendant facing assertion today inherits no veteran-FWD advantage and no PTAB estoppel shield — the whole validity fight would have to be built from scratch in district court or at the ITC. The flip side is that nothing has been lost either: all claims stand as issued, never canceled.
Per-proceeding detail
None. There is nothing to enumerate. To be explicit about what does not exist:
- No IPR — not a single petition was filed against this patent.
- No PGR — unavailable anyway (PGR reaches only patents with an effective filing date on or after 2013-03-16; this patent was filed 1991-07-02).
- No CBM — unavailable: the subject matter is a thermal inkjet printhead, not a "financial product or service" (AIA § 18(d)(1)).
- No derivation proceeding, no covered-business-method transitions, no PTAB appeal to the Federal Circuit originating from this patent.
Why the silence is structural, not strategic
This is the single most important fact for a practitioner reading this file. US 5,159,353 issued 1992-10-27 and expired 2011-07-02 (20 years from the 1991-07-02 filing date; Google Patents records "Expired – Lifetime"). The AIA's IPR provisions took effect for petitions filed on or after 2012-09-16 — roughly ten weeks after this patent's term ended. IPRs against expired patents are technically possible (for past-damages carve-out reasons), but they are vanishingly rare because the cost/benefit only works when there is a live exclusionary right to crush. There was never a window in which an IPR against this patent made economic sense.
The absence of PTAB activity here is therefore not the usual signal that "the patent was never worth attacking." It is a calendar artifact.
Strategic summary
Canceled vs. sustained vs. untested. Nothing is canceled — there has been no cancellation mechanism (IPR, PGR, CBM) applied. Nothing is "sustained" in the PTAB sense either, because "sustained" presupposes a Board decision that affirmatively upheld claims. The accurate characterization is: all 37 claims are untested by the Board and unamended, and the patent is expired. For a defendant, that collapses the practical question to past damages only — no injunction exposure, no ongoing royalty base. (Caveat carried forward from the earlier bibliographic section: the claim text available to me truncates mid-claim 20, so I cannot enumerate claims 21–37. I am not going to pretend the record is complete; pull the full claim set from USPTO Patent Public Search for application 07/724,658.)
Estoppel landscape — § 315(e)(2). There is no IPR, so no § 315(e)(2) estoppel attaches to anyone. That cuts both ways:
- Good for defendants: the entire universe of prior art remains available as invalidity grounds in litigation or at the ITC — including art that would have been "reasonably could have raised" material. No petitioner-privity trap, no Shaw/HP v. MPHJ edge cases to litigate.
- Bad for defendants: you also get no free benefit from a Board's prior art analysis. There is no instituted ground to point the judge to, no FWD to request deference/consistency on, and no § 315(a) civil-action bar to invoke. Everything is fresh work.
Pattern signals. No petitioner has filed multiple IPRs against this patent (none has filed one). The patent owner has not pursued PTAB appeals (there is nothing to appeal). No defensive aggregator — Unified Patents or otherwise — appears anywhere in the chain. In fact I found no PTAB activity involving this patent number at all, in either direction, ever. The only HP inkjet PTAB filings I surfaced in searching were HP as petitioner against third parties (e.g., Hewlett-Packard Company v. Memjet Technology Ltd., Patent 6,880,914; HP Inc. v. Slingshot Printing LLC, IPR2020-01085, Patent 6,243,115) — none of which involve US 5,159,353.
Decoy "353" records — do not conflate these (this matters)
My searches repeatedly surfaced three unrelated records whose numbers end in "353." None is US 5,159,353; each would be a serious citing error:
- US 7,461,353 B2 (SoftView) — a rich IPR history: IPR2013-00007 (Kyocera) filed 2012-10-02, instituted 2013-03-29, with IPR2013-00256 (Motorola Mobility) filed 2013-04-29 and joined to it; FWD 2014-03-27 holding claims 1, 33, 36, 43, 48, 51, 52, 58, 59, 66, 118, 138, 139, 149, 183, 252, 283 and 317 unpatentable under § 103. See the FWD at https://www.finnegan.com/a/web/[115586](/patent/115586)/2G4qSW/ipr2013-00007-final-written-decision-35-usc-c2a7-318a-and-3.pdf and Docket Alarm's docket at https://www.docketalarm.com/cases/PTAB/IPR2013-00007/. This is a completely different patent (software display of web content), different owner (SoftView), different decade.
- US 6,309,053 — the "'053 patent" asserted by HP in ITC Inv. No. 337-TA-723 (Certain Inkjet Ink Cartridges with Printheads, instituted 2010-06-25; ALJ Rogers final ID 2011-06-10; Commission final determination 2011-10-24, general exclusion order). This is the trap: it is an HP inkjet patent asserted in an HP inkjet-cartridge case, but it is 6,309,053, not 5,159,353. The asserted claims there were claims 1–6 and 8–17 of the '053 patent. Do not attribute those findings to US 5,159,353.
- JP 5159353 B2 — a Japanese patent about storage virtualization (virtual volumes / page pooling). Nothing to do with inkjet.
The earlier-generated section already flagged a fourth near-miss (a "515 patent" in National Steel Car Ltd. v. FreightCar America, Inc., D. Del. 1:24-cv-00594-JLH-CJB, and US 6,102,528 / US 5,774,148 / EP 1 944 164 A3 citations). Those are downstream citations, not proceedings. None connects to PTAB activity.
Recommended next steps
If you are a defendant being asserted against:
- Do not search for a PTAB win that isn't there. There is no FWD to link, and I will not link you to one. Any claim that US 5,159,353 has "invalidated claims" would be fabrication.
- Lead with the expiration date, not the Board. US 5,159,353 expired 2011-07-02. Verify against the USPTO Patent Public Search / PatentCenter record for application 07/724,658 and the maintenance-fee history. If the accusation postdates expiry, the only live theory is past damages over a bounded historical window — narrow the damages case and consider a laches/§ 286 limitations attack on the recovery period.
- Since there is no IPR, there is no reason to file one. IPR on an expired patent with no live exclusionary right is generally a poor spend, and it buys you no estoppel benefit. Direct your invalidity spend to the forum where the case actually lives.
- Build invalidity independently of the Board record. Because no estoppel exists, you have the full prior-art field — but you must develop it. The natural starting points are the very references the patent itself distinguishes: U.S. Pat. Nos. 4,719,477 (Hess), 4,532,530 (Hawkins), 4,947,192 (Hawkins), 4,500,895 (Buck), 4,513,298 (Scheu), 4,794,409 (Cowger), 4,510,670 (Schwabe), plus the LOCOS literature (Appels, Philips Research Reports Vol. 26 No. 3 (June 1971); Kooi, id.; Elliott, Integrated Circuit Fabrication Technology, 1982). The asserted novelty is essentially the reuse of the SiO₂/Si₃N₄ LOCOS mask as the finished gate dielectric (claim 1's three-layer gate stack) — attack that narrow point directly with contemporaneous MOS gate-dielectric practice.
- Watch dependents. The independent claims (1, 9, 11, 19) are broad; the dependent claims (e.g., 2–4, 6–8, 12–18) narrow to Ta–Al, polysilicon, Al/Cu/Au, SiN dielectric, SiC/SiN/cavitation/plastic protective stack, and the 1.25–1.75 µm source/drain depth. If you must accept a narrow construction, push the dispute into the dependent claims where the added limitations supply your non-infringement arguments.
Coverage caveat (stated plainly): the ODP block is canonical and says zero. My independent web searches reached PTAB petition PDFs, Docket Alarm dockets, and PTAB E2E-adjacent pages, and none referenced US 5,159,353. What I could not do is run a certified docket query or a live ODP case lookup by patent number while writing this. If a petition were filed recently and not yet indexed, it would not have appeared. My confidence that none exists over the patent's life is high for the structural reason given (term ended before IPR was available); my confidence that no brand-new filing exists as of 2026-09-30 is moderate-to-high but not certified. Verify directly at PTAB E2E (https://ptacts.uspto.gov/) and USPTO Patent Public Search before relying on the negative.
Generated 9/30/2026, 7:41:36 PM
Ownership chain (3)
Asserters network →Structured records extracted from the assignment-history narrative below. Each entity links to its full ownership-network profile.
1991-08-22 · Assignment
Fasen, Duane A.; Beckmann, Jerome E.; Stanback, John H.; Hess, Ulrich E.; Hulings, James R.; Metz, Larry S.; Moore, Charles E.Hewlett-Packard Company, A CA Corporation
? · recorded 2001-01-16 · reel 011523/0469 · Merger
Hewlett-Packard Company (California)Hewlett-Packard Company (Colorado/Delaware)
internal reorg
? · recorded 2011-09-22 · reel 026945/0699 · Assignment
Hewlett-Packard CompanyHEWLETT-PACKARD DEVELOPMENT COMPANY, L.P., TEXAS
internal reorg
Assignment history
Inventors, original assignee, and the chain of ownership recorded with the USPTO — including the correspondent attorney who recorded each assignment, since shell-LLC chains often share one repeat-player attorney even when the entity names look unrelated. Surfaces NPE / patent-troll patterns: shell-entity transfers, known asserters in the chain, repeat correspondent fingerprints, pre-litigation assignments, and bankruptcy fire-sales.
I'll attempt to pull the actual assignment records before writing anything.
Let me try to reach the Assignment Center record and check for any assertion activity.
The second search surfaced INPADOC legal-status records for sibling HP patents showing a standard HP chain. Let me try to pin those reel/frame numbers down, and check whether US5159353 itself carries them.
Inventors
Seven inventors are named on the face of US 5,159,353:
| Inventor | Employer at filing | Basis |
|---|---|---|
| Duane A. Fasen | Hewlett-Packard Company | Named assignor on the recorded 1991 assignment of inventors' interest to "Hewlett-Packard Company, A CA Corporation" (Google Patents legal events, 1991-08-22) |
| Jerome E. Beckmann | Hewlett-Packard Company | same |
| John H. Stanback | Hewlett-Packard Company | same |
| Ulrich E. Hess | Hewlett-Packard Company | same; also named on HP's related US 4,719,477, cited in the spec as prior HP driver-circuitry work |
| James R. Hulings | Hewlett-Packard Company | same |
| Larry S. Metz | Hewlett-Packard Company | same |
| Charles E. Moore | Hewlett-Packard Company | same |
Pattern note. The inventors' assignment was executed and recorded 1991-08-22, roughly seven weeks after the 1991-07-02 filing — the ordinary "file first, record the employment assignment after" sequence, not a distress signal. All seven inventors assigned to the employer; there is no record in the sources I could reach of any inventor retaining rights, or of any inventor-originated assignment to a third party. I found no evidence of the departure-and-fire-sale pattern (inventors leaving the original assignee within 12 months of filing followed by a portfolio sale). I also could not reach employment histories (LinkedIn-style records) for these engineers, so "employer at filing = HP" rests on the recorded assignment, not on independent biographical confirmation. Seven named inventors on a single printhead patent is itself unremarkable for HP's inkjet organization of that era, which staffed head-development work in teams.
Original assignee
Hewlett-Packard Company, a California corporation (assignment recorded 1991-08-22; issued 1992-10-27). Google Patents lists HP Inc. as current assignee and notes that assignee lists "may be inaccurate"; the same record lists Hewlett-Packard Development Co. at family level.
- Did they ship a product embodying the claims? Yes, on the face of the document. The patent's own detailed description states that cartridge 10 "is currently being manufactured and sold by the Hewlett-Packard Company of Palo Alto, Calif., under the THINKJET trademark," and cartridge 36 under the DESKJET trademark — both are the thermal inkjet cartridges whose substrates the specification says carry "pulse driver circuitry 17 and heating resistors 19." This is direct in-spec evidence of commercial embodiment by the original assignee, not an inference.
- Primary line of business. Diversified computing and printing/manufacturing (printers, inkjet cartridges, computers, instruments).
- Current status. Operating. HP did not enter bankruptcy; there is no Chapter 7/11 event anywhere in this chain. The original California corporation ceased to exist as an entity only through an internal merger reorganization (see timeline), not a failure. HP's PC-and-printing half survives as HP Inc.; the enterprise-IP-holding entity is Hewlett-Packard Development Company, L.P. (Texas).
Assignment timeline
Records below were reconstructed from the Google Patents legal-events record for US 5,159,353 and cross-checked against EPO INPADOC legal-status records and USPTO PTAB filing documents for sibling HP patents of the same era. I could not query the USPTO Patent Assignment Search interface directly with the tools available to me, so reel/frame numbers for this specific patent could not be read off the Assignment Center record. Where I give a reel/frame, I say explicitly whether it is confirmed on this patent or pattern-matched from siblings.
1991-07-02 filed / 1991-08-22 recorded — Reel/frame not retrievable from the sources I could reach
- Conveyance: Assignment (of inventors' interest)
- Assignor: Fasen, Duane A.; Beckmann, Jerome E.; Stanback, John H.; Hess, Ulrich E.; Hulings, James R.; Metz, Larry S.; Moore, Charles E.
- Assignee: Hewlett-Packard Company, A CA Corporation
- Correspondent: Not retrievable. Recorded boilerplate is "ASSIGNMENT OF ASSIGNORS INTEREST." No attorney/agent name or firm is exposed in any source I could reach. I am not filling this in by guesswork (see Signal 3 below — this is the one genuinely unassessable NPE tell on this chain).
- Context: Standard employment assignment to the operating employer; not an acquisition.
1998-05-20 effective / 2001-01-16 recorded — Reel 011523/0469 (pattern-matched, not confirmed on US 5,159,353)
- Conveyance: Merger ("MERGER; ASSIGNOR: HEWLETT-PACKARD COMPANY")
- Assignor: Hewlett-Packard Company (California)
- Assignee: Hewlett-Packard Company (Colorado/Delaware)
- Correspondent: Corporate recording agent / in-house; name not exposed in the INPADOC or Google records I retrieved.
- Context: Internal reorg — HP's reincorporation, with the merger effective 1998-05-20 but recorded in bulk on 2001-01-16. Google's legal-events entry for US 5,159,353 independently corroborates the 2001-01-16 / "MERGER (SEE DOCUMENT FOR DETAILS)" event, but the reel 011523/0469 value comes from identically-dated, identically-worded INPADOC entries on sibling HP patents (e.g. US 5,751,300 and US 5,988,802: "2001/01/16 … ASSIGNMENT, NEW OWNER: HEWLETT-PACKARD COMPANY, COLORADO … MERGER;ASSIGNOR:HEWLETT-PACKARD COMPANY; REEL/FRAME:011523/0469").
- Flag: This is an inference by multi-patent pattern match, not a direct read of the 5,159,353 assignment record. Treat the date as confirmed and the reel/frame as probable.
2003-01-31 effective / 2011-09-22 recorded — Reel 026945/0699 (found on siblings; NOT surfaced on the US 5,159,353 legal-events list — please verify)
- Conveyance: Assignment ("ASSIGNMENT OF ASSIGNORS INTEREST; ASSIGNOR: HEWLETT-PACKARD COMPANY")
- Assignor: Hewlett-Packard Company
- Assignee: Hewlett-Packard Development Company, L.P., Texas
- Correspondent: Not exposed in the retrieved record.
- Context: Internal reorg into the IP-holding LP — HP moved its patent estate into HP DevCo, with an effective date of 2003-01-31 but a very late recording date of 2011-09-22. Confirmed with a reel/frame on an unrelated HP matter's legal-status printout (USPTO PTAB petition 1502434 document, ptacts.uspto.gov): the row reads "ASSIGNMENT — HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P., TEXAS — ASSIGNOR: HEWLETT-PACKARD COMPANY — REEL/FRAME: 026945/0699 — 2003-01-31," entered on 2011-09-22.
- Caveat — this is where I flag a possible gap rather than assert: Google's legal-events list for US 5,159,353 itself shows only the 1991-08-22 and 2001-01-16 events; it does not show an HP DevCo row, even though Google's family-level assignee list names Hewlett-Packard Development Co. Either the bulk 026945/0699 recordation did not cover this patent, or Google's per-patent event extraction missed it. I cannot resolve that. Do not treat "HP DevCo owns US 5,159,353" as established.
No other recorded instruments were found — no security agreements, no releases, no recorded licenses, no third-party assignments. (Recordation of licenses is optional, so absence proves little about licensing.)
Timeline diagram
timeline
title Ownership of US 5159353
1991 : Filed 1991-07-02
: Assignment recorded to Hewlett-Packard California
1998 : HP reincorporation merger effective
2001 : Merger assignment recorded 2001-01-16
2003 : HP transfers patent estate to HP Development Company LP
2011 : Transfer recording entered 2011-09-22
: Patent expires 2011-07-02
NPE / troll-pattern signals
Shell-entity transfer — not present. Every assignee of record is an HP operating entity: Hewlett-Packard Company (CA), Hewlett-Packard Company (CO/DE), and — on siblings — Hewlett-Packard Development Company, L.P. (Texas). No "IP / Patents / Licensing / Holdings / Ventures" suffix appears; no registered-agent-service address appears; no single-purpose Delaware or Texas LLC appears. Note that HP DevCo's Texas LP form is not a shell tell — it is HP's disclosed internal IP-holding vehicle, formed for tax/structural reasons while HP continued making and selling the products.
Known asserter in the chain — not present. No assignee matches Acacia, Marathon, Intellectual Ventures, IPNav, Wi-LAN, Mosaid/Conversant, Vringo, Pendrell, Innovatio, MPHJ, Lumen View, Round Rock, Document Generation Corp, or the Spangenberg family. I also found no hit for this patent number in any RPX or Unified Patents asserter-directory material I could reach. (Cross-reference: the prior section of this analysis already found no litigation, no PTAB/IPR, and no CAFC activity naming this patent.)
Repeat correspondent across the chain — unclear, and this is the honest answer. The correspondent of record — the single most useful tell, per the task framing — is not exposed in any source I could reach (Google Patents legal events, INPADOC, or the PTAB filing excerpt). I will not invent a name or a firm, and I will not treat "the record looks like HP boilerplate" as attribution. This is a genuine evidence gap: the Assignment Center record for US07/724,658 is the only reliable place to read it, and my tooling could not query it.
Cascading transfers — not present. Three events spanning ~20 years, with the two later ones being internal corporate reorganization steps whose effective dates (1998-05-20 and 2003-01-31) long precede their recording dates. No chain of LLCs, no <24-month sequence, and no evidence of shared principals or a shared correspondent address between assignees — because there are no third-party assignees at all.
Pre-litigation transfer — not present. There is no infringement suit naming this patent, so no transfer could be timed to one. The last effective transfer (2003-01-31) precedes the patent's 2011-07-02 expiry by eight years and is internal to HP.
Bankruptcy fire-sale — not present. No Chapter 7 or Chapter 11 proceeding by any assignee of record. HP's 1998 and 2003 events were a reincorporation and an intra-group IP transfer, not insolvency sales. There is nothing analogous to Kodak/Nortel/Polaroid here.
Privateering — not present for this patent. No transfer of US 5,159,353 to an NPE, and no indication that any assertor is litigating it on HP's behalf. Caution on scope: HP has historically both enforced its own patents and divested portions of its estate, and HP inkjet patents have turned up in later third-party hands generally — but I found no evidence tying this specific patent to any such transaction, so I will not generalize.
Defensive aggregator — not present. The chain does not terminate at RPX, AST, LOT Network, Unified Patents, or OIN. There is no recorded neutralization transfer. (Inverse consideration: the patent is Expired – Lifetime, anticipated expiration 2011-07-02, which neutralizes it factually — nobody can assert it now.)
Verdict
Insufficient data — with the explicit caveat that this label reflects an evidence gap, not ambiguity about NPE status. The affirmative finding is non-NPE: every recorded event stays inside the original assignee's corporate family — the inventors' 1991-08-22 assignment to Hewlett-Packard Company (CA), the 2001-01-16 merger recording (reel 011523/0469 on siblings), and the HP→HP Development Company L.P. transfer (reel 026945/0699, effective 2003-01-31, recorded 2011-09-22, present on siblings). No shell-entity transfer, no listed asserter, no cascade, no bankruptcy sale, no defensive-aggregator terminus. What keeps this out of the "defensive / non-asserting" and "operating-company assertion" buckets is that I could not read the Assignment Center record for US07/724,658 itself (no correspondent of record, no confirmed reel/frame for this patent, and no confirmation that the HP DevCo recording covers it) and I found no assertion activity either way. Practically, the question is moot: the patent expired 2011-07-02.
Verification links:
- USPTO Assignment Center: https://assignmentcenter.uspto.gov/
- Legacy Patent Assignment Search (search by patent number 5159353): https://assignment.uspto.gov/patent/index.html
- Google Patents legal events for this patent: https://patents.google.com/patent/US5159353/en
- INPADOC legal status corroborating the 2001-01-16 merger recording reel 011523/0469 on sibling HP patents: https://be.espacenet.com/publicationDetails/inpadoc?CC=US&NR=[5751300A](/patent/5751300A)&KC=A&FT=D&ND=5&date=19980512&DB=EPODOC
- Source evidencing the HP→HP DevCo reel 026945/0699 recording (effective 2003-01-31, entered 2011-09-22) on an unrelated HP matter: https://ptacts.uspto.gov/ptacts/public-informations/petitions/1502434/download-documents
Generated 9/30/2026, 7:41:58 PM
Prior art
Earlier patents, publications, and products that may anticipate or render the claims unpatentable.
I'll search for the USPTO record and the cited prior-art references for US 5,159,353.
Let me pull the citation lists from multiple patent databases.
Let me try to pull the front-page citation list specifically.
Scope, method, and a retrieval limitation you need to know about
What I was able to reach this session
| Source | What it gave me for US 5,159,353 |
|---|---|
| Google Patents full text (authoritative, supplied) | Claims 1–20 (truncating mid-claim 20), specification, "prior art keywords," family, classifications |
| EPO / Espacenet record for the EP counterpart (EP0521634A3) | The European search report ("DOCUMENTS CONSIDERED TO BE RELEVANT") with claim-range mapping |
| US 5,635,966 (Keefe et al., HP) | Express cross-citation of 5,159,353 and of US 5,122,812, including filing dates |
| EveryPatent mirror pat5159353 | Independent-claim text (claim 9 confirms the "a MOSFET transistor substrate" artifact) |
What I could NOT reach
- I could not directly query USPTO Patent Public Search / PatentCenter / the USPTO full-text database in this session. Search results came from Google Patents (which mirrors USPTO data), Espacenet, and third-party mirrors.
- I therefore could not retrieve the front page "References Cited" block of US 5,159,353 in the form the examiner signed off on. The reference list below is reconstructed from (a) the prior-art documents expressly cited inside the 5,159,353 specification, and (b) the EPO search report on the same family. I am not asserting these are the complete, verbatim "References Cited" of record. Treat the below as a reconstructed list, not a certified one.
- I could not read the full text of the EP search-report documents. Where I describe one, I say so.
Note also a small data inconsistency in this workflow: the system header gives today as 2026-09-30, while this task states April 26, 2026. It doesn't change anything below; flagging it per the cross-reference rule.
Statutory frame (pre-AIA, as this patent is pre-1996). Filing/priority date is 1991-07-02. Therefore §102(b) prior art must have been published/patented before 1990-07-02. Anything published between 1990-07-02 and 1991-07-02 is §102(a)/§102(e) territory, and the patent's claim to a 1991 priority is fragile against it.
Part 1 — Prior art cited on the face of / inside US 5,159,353
1A. U.S. patent references expressly cited in the 5,159,353 specification
| Ref. | Citation as it appears in the patent | Date (best determination — verify) | §102 basis | Brief description | Claims potentially affected |
|---|---|---|---|---|---|
| US 4,500,895 | "to Buck et al." | Issued ≈1985-02-12 | §102(b) | Thermal inkjet cartridge architecture: backing plate, substrate, orifice plate, ink bladder, outlet channel, substrate opening. Cited for Cartridge 10's full structure | Claim 11 / 19 preamble (housing, outlet, ink storage means, printhead in fluid communication). Element of claims 1/9 (orifice plate). Cannot anticipate — no MOSFET gate stack, no resistive/conductive dual-function layer |
| US 4,794,409 | "to Cowger et al." | Issued ≈1988-12-27 | §102(b) | Cartridge 36 architecture: reservoir, opening, porous sponge storage, outlet, substrate opening, orifice plate (DESKJET) | Claim 11 / 19 preamble; ink-receiving-cavity/orifice-plate elements. No transistor structure — no anticipation |
| US 4,719,477 | "to Hess" | Issued ≈1988-01-12 | §102(b) | Substrate carrying both pulse driver circuitry and heating resistors on the printhead (explicitly cited for that proposition) | Elements (a) silicon substrate, (b) MOSFET on substrate, (e) dielectric over transistor, (f) resistive layer contacting transistor — genera only. Closest of the U.S. batch on the "integrate the driver" concept, but it does not show the three-layer SiO₂/Si₃N₄/poly-Si gate left in place, nor the shared resistive/conductive heater-and-interconnect stack |
| US 4,532,530 | "to Hawkins" | Issued ≈1985-07-30 | §102(b) | Cited alongside 4,719,477 and 4,947,192 as disclosing pulse drive circuitry integrated on the printhead substrate | Same as 4,719,477. No anticipation |
| US 4,947,192 | "to Hawkins" | Issued 1990-08-07 (≈11 months before filing) | §102(e) (filed earlier; not §102(b) — outside the one-year bar) | Driver circuitry integrated on printhead substrate | Elements (a), (b). Notably not §102(b) art because of its Aug-1990 issue date |
| US 4,513,298 | "to Scheu" | Issued ≈1985-04-23 | §102(b) | Cited twice: (i) as a basic IC layer-formation/masking reference (thermal oxidation, CVD, PECVD, LPCVD); (ii) as the source for phosphorus-doped polycrystalline silicon as the resistor material, deposited by LPCVD from silane diluted in argon | Directly bears on claims 3 and 13 (resistive layer = polycrystalline silicon) and on the poly-Si-resistor embodiment of claims 1(f)–(g) / 9. This is the most claim-element-specific U.S. citation in the list |
| US 4,510,670 | "to Schwabe" | Issued ≈1985 | §102(b) | Cited generically for conventional MOSFET manufacture by a substantial number of masking/etching steps | Claim 1(b)–(c) at the level of "MOSFET made by conventional masking/etching." Purely background — no anticipation |
1B. Non-patent literature cited in the 5,159,353 specification
| Reference | Citation as given | Date | §102 basis | Relevance | Claims potentially affected |
|---|---|---|---|---|---|
| Appels, J. A. et al. | "Local Oxidation of Silicon; New Technological Aspects," Philips Research Reports, Vol. 26, No. 3, pp. 157–165 | June 1971 | §102(b) printed publication | The LOCOS process — the SiO₂/Si₃N₄ mask-and-oxidize step that this patent repurposes | Claim 1(d) and claim 9 (field oxide surrounding the transistor); the field-oxidation process steps. Anticipates the field oxide element only |
| Kooi, E. et al. | "LOCOS Devices," Philips Research Reports, Vol. 26, No. 3, pp. 166–180 | June 1971 | §102(b) printed publication | LOCOS device structures (the "Kooi effect") | Same as Appels |
| Elliott, D. J. | Integrated Circuit Fabrication Technology, McGraw-Hill, New York, 1982 (ISBN 0-07-019238-3) | 1982 | §102(b) printed publication | General IC fabrication (deposition, masking, diffusion) | Generic support only |
| Hewlett-Packard Journal | Vol. 36, No. 5 | May 1985 | §102(b) printed publication | Thermal inkjet system construction and operation | Claim 11/19 preamble context |
| Hewlett-Packard Journal | Vol. 39, No. 4 | August 1988 | §102(b) printed publication | Same | Same |
Part 2 — The best evidence of "most relevant prior art": the EPO search report on the same family
The EP counterpart EP0521634A3 (application 92305554.5, filed 1992-06-17, search report dated 15 March 1993) carries a "DOCUMENTS CONSIDERED TO BE RELEVANT" table for the same disclosure. That is the strongest available proxy for what an examiner of record judged the closest art, because the EPO searcher was looking at the same specification.
| Reference | Claim range cited against | Retrieval status | Notes |
|---|---|---|---|
| EP-A-0 401 440 (Xerox Corporation) | 1–10 | Not retrieved; content unverified | Listed first, with the passage indicator "page 2, line 38–line 41; claims 1–3; figures 1–5" and IPC B41J2/16. This is the single most likely "most relevant prior art" on the family record. The category letter (X/Y/A) is not legible in the snippet I obtained, so I will not characterize it as novelty-destroying |
| EP-A-0 432 982 (Canon K.K.) | 1–10 | Not retrieved; content unverified | Passage indicator "claims 1–16" |
| US-A-4 472 875 (Christian et al.) | 1–10 | Not retrieved; content unverified | Passage indicator "column 1, line 33–line 52" (looks like background/context citation). Marked "A" (background art) in the retrieved snippet |
| GB-A-2 040 564 (American Microsystems) | — | Not retrieved; content unverified | Passage indicator "page 1, line 37–line 109". Marked "A" in the retrieved snippet |
| EP-A-0 378 439 (Canon K.K.) | 1–10 | Not retrieved; content unverified | Passage indicator "claims 1–18" |
Important caveat, stated plainly: the "1–10" figure is the EP claim range, not US claims 1–10. The EP and US claim sets are not coextensive (US has 37 claims; the EP case was examined as a smaller set). Mapping EP 1–10 onto US claims 1/9 (and their dependents) is an inference, not a verified correspondence. Anyone building a §102 position on these documents must pull the EP search report and the five documents themselves.
Part 3 — Additional earlier-filed, same-field art I identified (flagged as my own finding, not confirmed as being of record in the 5,159,353 file)
| Ref. | Citation | Date | §102 basis | Why it matters |
|---|---|---|---|---|
| US 5,122,812 (Hess et al.) | "Drive transistor / printhead structure," Hewlett-Packard | Filed 1991-01-03; issued 1992-06-16 (filing date grounded in US 5,635,966's own text) | §102(e) — earlier U.S. filing by a different inventive entity, same assignee | US 5,635,966 describes 5,122,812 as disclosing "a unique conductive system for electrical elements of the printhead. A layer of resistive material performs dual functions: (1) as heating resistors in the system, and (2) as direct conductive pathways to the drive transistors." That is claim 1(g) almost verbatim — the resistive/conductive multi-layer with an uncovered heater section and covered interconnect sections. This is the most dangerous §102(e) reference for the "dual-function layer" element, and it is not a document cited inside the 5,159,353 text |
| US 5,010,355 (Hawkins et al.) | Hewlett-Packard | Issued ≈1991-04-23 | §102(e) | Appears alongside 5,159,353 in the applicant-side citation list of EP 0 909 649 A2. Same-field, same-assignee, integrated-driver printhead work. Filed earlier; relevant to elements (a), (b), (e) |
These two deserve a look specifically because they are same-assignee, earlier-filed, overlapping-subject-matter references — the classic §102(e) posture — and 5,122,812 in particular targets the claim element that most distinguishes claim 1 from the LOCOS/thin-film background.
Part 4 — §102 anticipation analysis
Anticipation requires a single reference disclosing every element as arranged. On the reconstructed record, I assess as follows.
Claims 1 and 9 (printhead structure) — no anticipation found
The four elements that carry the claim are:
- The gate stack: SiO₂ on substrate + Si₃N₄ on the SiO₂ + poly-Si on the Si₃N₄ — i.e. a nitride-topped gate dielectric left in place from the LOCOS mask.
- Field oxide surrounding the transistor (LOCOS).
- A dielectric layer with openings to source, drain and gate.
- A resistive layer in direct electrical contact with all three (source, drain, gate), overlaid by a conductor on a portion of it, leaving an uncovered section that is the heater and covered sections that are interconnect.
- Element 2 is squarely the subject of Appels and Kooi (June 1971) — §102(b) printed publications. But they teach field oxidation only; they do not teach the transistor or the printhead.
- Elements 1, 3 and 4 are HP's contribution. No document in the reconstructed list discloses a gate dielectric consisting of silicon dioxide plus silicon nitride with polysilicon deposited on the nitride. Every conventional MOSFET reference in the list (Schwabe, and by implication the LOCOS art) uses thermal silicon dioxide as the gate dielectric.
- US 5,122,812 (Hess) attacks element 4 on its own, but on the record available it does not also supply the nitride-topped gate stack or the LOCOS field oxide in the same structure.
- EP-A-0 401 440 (Xerox) was cited against EP claims 1–10 in the family search report, which makes it the leading candidate to disclose a substantial portion of the structure claims. I could not read it, so I will not assert it anticipates.
Conclusion for claims 1 and 9: no §102 anticipation on the record available. The realistic attack is §103 — e.g. LOCOS art (Appels/Kooi) in view of an integrated-driver printhead (4,719,477 / 4,947,192 / 5,122,812 / 5,010,355), optionally in view of 4,513,298 for the poly-Si resistor.
Claims 2–8 and 10 (dependents)
No independent anticipation. Claim 3 (poly-Si resistive layer) and claim 13 are element-for-element met by US 4,513,298 (Scheu) in isolation — but Scheu lacks the gate stack, the field oxide in the claimed arrangement, and the orifice-plate/cavity architecture, so the claims are not anticipated.
Claims 11 and 19 (printing apparatus) — no anticipation found
- The preamble (housing with an outlet; ink storage means; printhead secured to the housing and in fluid communication through the outlet) is met by US 4,500,895 (Buck) and US 4,794,409 (Cowger) for both cartridges, and by the HP Journal 1985/1988 publications.
- But claims 11 and 19 incorporate the full printhead of claim 1 / claim 9 respectively. Because the printhead body is not anticipated, the apparatus claims are not anticipated either. A §102 rejection of claims 11/19 would require a reference disclosing the cartridge and the integrated nitride-gate-stack printhead together — none found.
Claims 12–18 (dependents of 11)
Same conclusion as claims 2–8/10.
Claims 20–37 (not retrieved)
I cannot analyze these. The Google Patents text truncates mid-claim 20. Given the title ("...and method for making the same") and the 37-claim count, method claims are expected in this range, and method claims are generally harder to anticipate than apparatus claims (each recited step must be disclosed). But I will not state their content or their anticipation posture as fact. Pull them from USPTO Patent Public Search / PatentCenter under application 07/724,658.
Part 5 — Bottom line
- Most relevant prior art, ranked, on the record I could assemble:
- EP-A-0 401 440 (Xerox) — cited against EP claims 1–10 in the family search report; the EPO searcher's lead reference against the structure claims. Unread by me.
- US 5,122,812 (Hess) — earlier-filed, same-assignee §102(e) art disclosing the dual-function resistive/conductive layer (claim 1(g)).
- US 4,719,477 / US 4,947,192 / US 4,532,530 (Hess, Hawkins) — integrated driver circuitry on the printhead substrate (claims 1(a),(b),(e),(f) genera).
- Appels & Kooi, Philips Research Reports (June 1971) — the LOCOS field-oxide element, claims 1(d)/9.
- US 4,513,298 (Scheu) — poly-Si resistor material for claims 3/13.
- US 4,500,895 (Buck) / US 4,794,409 (Cowger) — cartridge/apparatus preamble for claims 11/19.
- EP-A-0 432 982 and EP-A-0 378 439 (both Canon) — cited against EP claims 1–10; unread.
- US 4,472,875 (Christian) and GB 2 040 564 (American Microsystems) — marked "A" (background) in the search report; general semiconductor-fabrication context.
- No reference I could examine anticipates any claim of US 5,159,353. The distinctive combination — the LOCOS SiO₂/Si₃N₄ dual layer retained as the finished gate dielectric, plus a single resistive layer that simultaneously forms the heater and the direct interconnect to source, drain and gate — does not appear in any single reference on this list.
- The proper §102 attack is thin; the proper §103 attack is real and would run through the LOCOS publications combined with the HP integrated-driver patents, with 4,513,298 and (especially) 5,122,812 supplying the missing elements.
- The "most relevant prior art" question cannot be closed without (i) the actual front-page "References Cited" of US 5,159,353 from USPTO PatentCenter, and (ii) the text of EP-A-0 401 440. I flag both as open, not resolved.
Sources used: https://patents.google.com/patent/US5159353/en (authoritative full text supplied); EP0521634A3 search report at https://patentimages.storage.googleapis.com/6e/29/b3/91c1dc0c1653da/EP0521634A3.pdf; US 5,635,966 at https://patents.google.com/patent/US5635966; http://www.everypatent.com/comp/pat5159353.html; EPO data at http://data.epo.org/gpi/EP0909649A2.
Generated 9/30/2026, 7:42:15 PM
Obviousness
Combinations of prior art that suggest the claimed invention would have been obvious under 35 U.S.C. § 103.
I'll research the prior art references cited in the patent and check for additional relevant art before building the § 103 analysis.
Key lead emerged: a closely related HP patent (US 5,122,812) and Xerox work by Hawkins. Let me pin down dates and contents, since those determine § 102/§ 103 status.
I've hit my search limit, so the analysis below rests on (a) the authoritative full text you supplied for US 5,159,353 — including its own cited-art list and its express "Background" admissions — and (b) the search results I was able to retrieve before hitting the cap, which confirmed the content of several key references. Where a date or reference characteristic could not be verified in this session, I flag it rather than assert it.
Obviousness Analysis — U.S. Patent No. 5,159,353 under 35 U.S.C. § 103
0. Threshold framing and scope
Legal regime. US 5,159,353 was filed 1991-07-02, so pre-AIA § 103(a) governs, and the relevant evidentiary framework is Graham v. John Deere Co., 383 U.S. 1 (1966) (scope/content of prior art; differences; level of ordinary skill; secondary considerations). KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398 (2007), confirms that the motivation to combine need not be found expressly in the references and that "any need or problem known in the field of endeavor at the time of invention and addressed by the patent" can supply the rationale (§ 103(a) also codifies "predictable variations"). I note separately where a pre-KSR "teaching, suggestion, or motivation" (TSM) standard — which would have governed at the 1992 issue date — would have reached a different or narrower result.
What this analysis is and is not. The patent is recorded as Expired – Lifetime (anticipated expiration 2011-07-02), and (per the earlier sections of this report) I found no litigation, PTAB, or CAFC activity tied to this number. So this is a hypothetical / retrospective invalidity analysis, not a real-world challenge posture. It is not a legal opinion.
Prior-art universe used. You directed me to the Prior Art section of the page. I have used:
- the references cited on the face of / in the specification of the '353 (the "of-record" art), and
- art surfaced in searching that is either the same family of HP work or the same commercial field (Xerox/Hawkins integration work).
I flag one important completeness gap carried forward from the earlier section: claims 20–37 are not visible in the retrieved record, which truncates mid-claim 20. My claim-by-claim treatment therefore covers the four independent claims (1, 9, 11, 19) and the dependent claims whose text is present. ¶
1. Level of ordinary skill in the art (PHOSITA)
A person having ordinary skill in the art as of mid-1991 would be a person with:
- a B.S. in electrical engineering, materials science, or applied physics (or equivalent), and
- roughly 2–4 years of hands-on experience in thin-film semiconductor device fabrication (thermal oxidation, LPCVD/PECVD, photolithographic masking/etching, LOCOS isolation, MOS device design), or a graduate degree plus 1–2 years of such experience, and
- ready access to the standard textbook literature, including Elliott, D.J., Integrated Circuit Fabrication Technology, McGraw-Hill (1982), which the '353 itself cites as describing "basic layer formation techniques … and masking/imaging processes used for layer definition."
This is a high-skill, high-information artisan working in a field (silicon MOS processing) that was already mature and heavily documented by 1991. That matters to obviousness: much of the '353's subject matter is, in the '353's own words, "well known in the art."
2. Scope and content of the prior art
2.1 The patent's own admissions are the strongest § 103 evidence
Confirming and extending the earlier "Plain-language overview" and "Downstream citation footprint" sections, the '353 specification expressly concedes as known:
| Admission in the '353 | Resulting effect on § 103 |
|---|---|
| "thermal inkjet cartridges have been developed which print in a rapid and efficient manner. These cartridges include an ink reservoir in fluid communication with a substrate having a plurality of resistors thereon." | The entire cartridge + resistor + orifice plate + ink cavity architecture of claims 1/11 is admitted prior art. |
| "thermal inkjet printheads have been developed which incorporate pulse driver circuitry (e.g. … MOSFET transistors) directly on the printhead substrate with the resistors. This development is described in U.S. Pat. Nos. 4,719,477 to Hess; 4,532,530 to Hawkins; and 4,947,192 to Hawkins." | Integrating MOSFET drivers on the same silicon as the heaters is the admitted starting point. |
| "Currently, MOSFET devices are manufactured using a substantial number of conventional masking/etching steps, as described in Appels …; Kooi …; U.S. Pat. No. 4,510,670 to Schwabe; and Elliott." | LOCOS, nitride-masked field oxidation, and the SiO₂/Si₃N₄ dual layer are admitted prior art. |
| "it is always desirable in the production of MOSFET devices and thermal inkjet printing systems to reduce the number of necessary materials and manufacturing steps." | The problem to be solved and the motivation to combine are admitted to exist in the field. |
That last row is decisive for motivation. Under KSR, a rationale can be supplied by a known problem in the field; the '353 states that problem in the specification's own words.
2.2 Reference table
| Ref. | Content (as relevant) | Why it matters to the '353 claims |
|---|---|---|
| US 4,513,298 — Scheu (HP; cited in '353) | Thermal ink jet printhead: polysilicon resistive element on SiO₂ insulating layer; conductors of aluminum or aluminum-copper; dual passivation of silicon nitride plus silicon carbide (SiC uppermost, in contact with ink); RISTON/VACREL plastic barrier elements; orifice plate adhered to the barriers. (Confirmed in search: the searchable text of '298 recites the dual nitride/SiC passivation, the nitride-or-oxynitride underlayer, the RISTON/VACREL barriers and the orifice plate.) | Supplies the entire protective stack of claims 7/18 (SiN + SiC + plastic barrier + orifice plate), the polysilicon resistor of claim 3, and the Al/Al-Cu conductor of claim 4. |
| US 4,532,530 — Hawkins (Xerox; cited in '353) | Carriage bubble-jet system; heavily doped polycrystalline silicon resistors "formed on the same process lines with those for integrated circuits"; SiN passivation; tantalum cavitation layer; thick-film pit layer. (Confirmed via search text and the JPH06143581/EP0434946 family discussions.) | Resistor material + passivation/cavitation + the express teaching that printhead resistors can be co-fabricated with ICs. |
| US 4,719,477 — Hess (HP; cited in '353) | Combined printhead + on-chip pulse-driver MOSFET fabrication; resistor, conductor and passivation layers built after the transistors are fabricated; multi-level metal interconnect; tantalum cavitation barrier; silicon nitride films above and below the resistor; PSG reflow at ~1000 °C. (Confirmed from the '477 full text retrieved in search.) | Supplies the dielectric-over-field-oxide/transistor + via + resistive/conductive multi-layer + Ta cavitation architecture and the build-after-transistor sequence. |
| US 4,947,192 — Hawkins (Xerox; cited in '353) | Monolithic integration of MOS logic and drivers with resistive elements on the same silicon substrate, "formed from a single layer of polysilicon with the resistive element formed on a thermally grown field oxide layer," using "fewer processing steps than used in existing chips." (Confirmed from the EP 0 494 076 counterpart's abstract/search text, which describes the same Hawkins work; that document also shows the EPO search report citing US-A-4,947,192 against claims 1–19 of the later Xerox case.) | Teaches the exact combination: field oxide + polysilicon gate + resistor + MOS drivers on one substrate, with step-count reduction as the stated object. |
| US 4,510,670 — Schwabe (cited in '353) | MOS-FET fabrication with a nitride layer used to prevent oxidation of a polysilicon surface, silicide/low-impedance conductors, LOCOS-type field isolation. (Confirmed: the searchable text recites the nitride layer employed "for the prevention of oxidation on the polysilicon surface," and LOCOS steps.) | Reinforces that using a nitride layer in the gate/field-oxidation sequence was routine MOS practice. |
| Appels, J.A. et al., "Local Oxidation of Silicon; New Technological Aspects," Philips Res. Repts. 26(3):157–165 (June 1971) | LOCOS: pad SiO₂ + Si₃N₄ mask + selective field oxidation; the nitride is an oxygen-diffusion barrier. | This is the '353's "dual-layer structure 78" and field oxide regions 84, 86 — the patent describes field-oxide formation expressly "in accordance with known processes as generally discussed in Appels." |
| Kooi, E. et al., "LOCOS Devices," Philips Res. Repts. 26(3):166–180 (June 1971) | Nitride-edge / "white ribbon" oxidation effects at the nitride boundary; characterization of the LOCOS structure. | Supplies both the masking mechanism and the known edge artifacts that explain why a nitride/oxide edge geometry would be engineered. |
| Elliott, D.J., Integrated Circuit Fabrication Technology (1982) | General CVD/PECVD/LPCVD, diffusion, masking and layer-formation techniques. | Establishes that the process steps the '353 recites in numeric detail are textbook-level. |
| EP 0 229 673 (Hess) — the EP counterpart of US 4,719,477 (priority US 820,754, filed 1986-01-17; published 1987-07-22). | "Integrated thermal ink jet printhead and method of manufacture … combined printhead and pulse drive integrated circuit"; two-level metallization interconnecting printhead resistors to MOSFET drivers fabricated in the same silicon substrate. (Confirmed in search.) | I flag this as potentially the single most damaging printed publication relative to claim 11/19's apparatus concept; published > 1 yr before the '353 filing. |
| Hewlett-Packard Journal, Vol. 36, No. 5 (May 1985) and Vol. 39, No. 4 (Aug. 1988) | Described in the '353 as describing "the general construction and operation of thermal inkjet systems." | § 102(b) printed publications describing the ThinkJet and DeskJet cartridges the '353's Figs. 1–2 depict. |
| US 5,122,812 (HP — Hess, Fasen et al.); EP counterpart EP 0 493 897 | "Thermal ink jet printhead having driver circuitry thereon and method for making the same." Claim 1 (as retrieved from the Justia text): substrate; drive transistor on the substrate; a layer of electrically resistive material in direct physical contact with the electrical contact regions of the drive transistor; a conductive layer on a portion of the resistive layer leaving an uncovered section functioning as a heating resistor; … and the spec describes direct gate contact through the passivation layers ("lead 170 is connected to gate 78 of the transistor 74 directly through passivation layers 122, 123 … connected to the covered section 107 of layer 80"). | Highest-value reference. Its independent claim is the '353's claim 1 minus the three-layer gate and field oxide. See § 4. |
2.3 Verified vs. unverified — explicit flags
- Verified in this session: the content of US 4,513,298; US 4,719,477; US 4,510,670; US 4,532,530 (via family discussions); US 4,947,192 (via EP 0 494 076); US 5,122,812 (via Justia claim text); EP 0 229 673; EP 0 494 076; EP 0 493 897 family text.
- Not independently re-verified in this session (drawn from general knowledge; confirm before relying on them in any filing): the exact issue dates of the of-record patents, and the filing date of US 5,122,812. That date is dispositive: if '812's U.S. filing date precedes the '353's 1991-07-02 filing (or the '353's actual date of invention), '812 is § 102(e) prior art and the analysis in § 4 becomes very strong. My search hit for '812 was returned in the context of a 1991-dated HP document and an EP publication date of 1992-07-08, consistent with a pre-1991-07-02 U.S. filing, but I could not confirm the filing date itself. Treat as unverified.
3. Claim 1 — element-by-element mapping
Claim 1 is an apparatus claim to a printhead. Breaking it into elements:
| # | Claim 1 element | Where taught |
|---|---|---|
| 1a | "a substrate comprised of silicon" | '477, '530, '192; EP 0 229 673 (silicon substrate). |
| 1b | MOSFET with source/drain and a gate between them | '477, '192, EP 0 494 076, '812. |
| 1c | Gate = SiO₂ on substrate + Si₃N₄ on the SiO₂ + polysilicon on the Si₃N₄ | The structurally distinctive element. The SiO₂ + Si₃N₄ dual layer is taught by Appels/Kooi/Schwabe as the LOCOS mask stack; a polysilicon layer over that stack is what the '353 itself forms at Fig. 8 before any inventive insight. Oxide-nitride dual dielectrics ("ON"/ONO) were standard in the MOS art (e.g., MNOS charge-storage devices). |
| 1d | Field oxide surrounding the transistor | Appels; Kooi; Schwabe; and expressly '192 / EP 0 494 076 ("resistive element formed on a thermally grown field oxide layer"). |
| 1e | Dielectric layer covering field oxide + transistor, with openings to source, drain, and gate | '477 (passivation etched down to the conductor; vias); '812 (passivation layers 122/123 with lead to gate). |
| 1f | Resistive layer in direct electrical contact with source, drain and gate through the openings | '812, verbatim in substance — resistive layer "in direct physical contact with said electrical contact regions of said drive transistor," and gate contact through the passivation. Also EP 0 493 897. |
| 1g | Conductive layer on part of the resistive layer → multi-layer with an uncovered section = heating resistor; covered at source, drain, gate | '812, verbatim in substance and, independently, the later HP patents (US 6,273,555; US 6,336,713) that recite the same "current confined to the conductive layer … thereby generating minimal thermal energy" rationale expressly attributing it to US 5,122,812. |
| 1h | Protective material over the resistor | '298 (SiN + SiC); '477 (SiN/PSG + Ta); '530 (SiN + Ta). |
| 1i | Orifice plate secured to the protective material, cavity beneath the orifice opening, heater aligned beneath the cavity | '298 (barrier + orifice plate); '530/EP 0 434 946 (recesses patterned in thick film expose heaters to ink); '500,895/'794,409 (cartridge/orifice plate). |
Result. Every element of claim 1 other than 1c (the SiO₂/Si₃N₄/polysilicon gate stack) is met — many elements verbatim in substance — by the admitted prior art and, especially, by US 5,122,812. The only genuine question is whether the gate stack and field oxide were obvious. They plainly were, for the reasons in § 5.
4. Specific combinations that render the claims obvious
I give the primary combination first, then two independent fallback combinations, then claim-specific treatments.
Combination A (primary): US 5,122,812 (Hess/Fasen, HP) + Appels + Kooi + Elliott
What each supplies. '812 supplies every element of claim 1 except the three-layer gate and the field-oxide-surrounding-the-transistor limitation. Appels/Kooi supply the LOCOS structure — the SiO₂ pad layer + Si₃N₄ mask + thick field oxide grown in the unmasked regions — which is literally the "dual-layer structure 78" and the "field oxide layer 84, 86" of the '353. Elliott supplies the deposition/etch techniques.
The gap and its bridge. The '353's insight is to not strip the nitride/oxide stack after field oxidation and to use it as the gate dielectric. That is a step-elimination and reuse choice. Appels and Kooi disclose that the pad oxide/nitride stack sits directly on the silicon at the exact location where the gate will be formed; a POSITA reading them immediately sees that the protected region is the active/gate region. Reusing the in-place stack instead of stripping and re-growing gate oxide is the kind of substitution of known elements with a predictable result that KSR holds obvious.
Motivation (all four KSR rationales are available):
- Known problem in the field, stated by the patent itself: "reduce the number of necessary materials and manufacturing steps."
- Design incentive / predictable result: eliminating a strip-and-regrow sequence removes at least two process steps and their attendant masking and defect-generating handling; masking step count was a recognized cost driver (the Xerox EP 0 494 076 filing frames its entire object as reducing the "eleven mask step process").
- Reasonable expectation of success: the retained oxide (~150–240 Å in the '353) is in the standard gate-oxide thickness range; the nitride overlayer merely thickens the composite dielectric, which a POSITA would account for in threshold-voltage design.
- Same field of endeavor: all references are directed to MOS device fabrication and/or printhead structure.
Prediction: on this combination, claim 1 is invalid.
Caveat — a real legal obstacle. Inventors Hess, Fasen, Hulings, Moore, Metz, Beckmann, Stanback appear on both the '353 and (at least Hess/Fasen) on '812, and both were HP cases. If '812 is § 102(e) art (i.e., "by another" because the inventive entities are not identical) but was commonly owned with the '353 at the time the invention was made, pre-AIA § 103(c) disqualifies it from use in a § 103 rejection. That is a defense, not a cure — but absent the common-ownership facts it cannot be evaluated, and I flag it as the single most likely reason a real-world examiner never pressed this combination.
Combination B: US 4,947,192 (Hawkins, Xerox) + US 4,513,298 (Scheu) + Appels/Kooi
- '192 (and its EP 0 494 076 counterpart) teaches the whole integration concept: MOS logic and drivers monolithically integrated with resistive heater elements on one silicon substrate, with the resistor on thermally grown field oxide, made with fewer mask steps. Its 1990 grant makes it § 102(e) art against the July 1991 filing.
- Scheu '298 supplies the resistor + conductor + SiN/SiC passivation + plastic barrier + orifice plate stack, plus the polsilicon resistor material of claims 3 and Al/Al-Cu conductor of claim 4.
- Appels/Kooi supply the LOCOS dual-layer/field-oxide structure and the nitride-as-oxygen-barrier function.
Because '192 already puts the resistor on thermally grown field oxide and already uses a single polysilicon layer for gate and resistor, a POSITA combining '192 with Scheu's resistor/passivation stack and the LOCOS teaching gets the '353's claims 1, 2, 3, 4, 6, 7, 9, 11, 18 and 19 essentially as a matter of arrangement of known elements. Motivation: (i) both are thermal inkjet printhead references (same field); (ii) both pursue the same stated goal of mask/step and lead-count reduction; (iii) the combination is a mere substitution of one known resistor/passivation stack for another in a known printhead architecture — KSR, "a patent composed of several elements is not proved obvious merely by demonstrating that each element was independently known," but here the references do provide the "idea" and the "interconnection" of the elements, which is what the Court required.
Combination C: US 4,719,477 (Hess) + EP 0 229 673 + Scheu '298 + Appels/Kooi
- '477 + EP 0 229 673 supply the on-chip MOSFET driver + two-level metallization + SiN films above and below the resistor + Ta cavitation barrier + multi-layer passivation (SiN/PSG) + resistor built after the transistors.
- Scheu supplies the SiN/SiC dual passivation + RISTON/VACREL barrier + orifice plate of claim 7.
- Appels/Kooi supply the gate dielectric + field oxide.
This combination reaches claim 1's architecture and, importantly, claim 9's "dielectric layer comprised of silicon nitride" (claim 6) since '477 uses nitride above and below the resistor, and '298 uses a nitride-of-silicon passivation in contact with the resistor and conductors.
4.1 Dependent claims
| Claim | Content | Obviousness basis |
|---|---|---|
| 2 | Resistive layer = Ta–Al mixture | Expressly disclosed in the '812 family ("the resistive material used to form layer 80 is manufactured of a mixture of aluminum and tantalum") and in the '812-based HP family discussed in search results. Simple substitution of a known resistor material. |
| 3 | Resistive layer = polysilicon | Scheu '298 (phosphorus-doped polysilicon resistor) and Hawkins '530 (heavily doped polysilicon resistors). Both also teach the rough, uniform surface that the '353 asserts promotes nucleation — i.e., the alleged advantage is pre-taught. |
| 4 | Conductor = Al, Cu, or Au | Scheu '298 (Al or Al–Cu); '812 family (Al; and the explicit 95.5% Al / 3.0% Cu / 1.5% Si composition). Routine selection. |
| 5 | Polysilicon gate continuously decreasing in width from lower to upper surface (sloped sidewalls) | Tapered/sloped etch profiles were a known technique to improve step coverage of subsequently deposited films — the '353 states that this is exactly why they are used ("substantial layers of material will more readily cover a sloped surface than a substantially vertical surface"). Under KSR, "a known technique used to improve a similar device in the same way" — here, sloped vias 174–177 in the same structure of the same patent. |
| 6 | Dielectric = silicon nitride | '477 (nitride films above and below the resistor); '298 (nitride-of-silicon passivation). |
| 7 | Protective stack = SiN + SiC + Ta/W/Mo cavitation + plastic barrier + orifice plate | Scheu '298 discloses this stack almost element-for-element (SiN-or-oxynitride lower layer; SiC upper layer in contact with ink; RISTON/VACREL barrier; orifice plate adhered to the barrier). Ta cavitation from '477 and '530. This claim is the most straightforwardly obvious in the patent. |
| 8 | Source/drain depth 1.25–1.75 µm | A result-effective variable optimized by routine experimentation (In re Boesch; In re Aller). The '353 identifies the result (avoiding junction spiking with Ta–Al resistors and Al conductors) — the very phenomenon '477 addresses with its nitride barriers and 1000 °C anneal. |
| 9 | Claim 1 + SiN dielectric + sloped poly gate + Ta–Al/poly resistor + Al/Cu/Au conductor + four-layer protective stack | Cumulative of the above; no element adds anything not separately taught. |
| 10, 17, 20 | Source/drain depth (same as claim 8) | Routine optimization. |
| 11 / 19 | Apparatus: housing + outlet + ink storage means + printhead in fluid communication via the outlet | The printhead limitations are those of claims 1/9. The cartridge elements are admitted prior art: the '353 describes cartridge 10 (flexible bladder 22, backing plate 12, outlet 26, cover 24) as disclosed in US 4,500,895 to Buck, and cartridge 36 (reservoir 38 + porous sponge 44 + outlet 50 + substrate 59 + orifice plate 60) as disclosed in US 4,794,409 to Cowger — and calls them "exemplary thermal inkjet cartridges … suitable for use with the present invention." Combining a claimed printhead with the two cartridges the specification names as the environments of use is a textbook obviousness combination. |
5. Why the combination would have been made (§ 103 rationale, consolidated)
- Identity of field and problem. Every reference is in thermal inkjet printheads and/or silicon MOS fabrication. The '353's stated object — "a method for making an improved thermal inkjet printhead structure having MOSFET driver circuitry therein which uses a reduced number of processing steps compared with previously-known production procedures" — is the same object stated by the prior art (e.g., EP 0 494 076's "fewer processing steps than used in existing chips"; EP 0 494 076 and EP 0 494 077-family discussion of combining mask/implant steps to cut cost).
- The elements were known to be combinable for the stated purpose. '192/EP 0 494 076 already integrates MOS logic + drivers + resistors on one substrate with a polysilicon gate and resistor-on-field-oxide; '812/'477/EP 0 229 673 already interconnect a resistive/conductive multi-layer directly to the transistor's source, gate and drain to eliminate interconnect layers. The '353's contribution is the order and retention of the LOCOS mask layers.
- Predictable result. Reusing an existing in-place SiO₂/Si₃N₄ stack as the gate dielectric changes the composite dielectric constant and thickness; a POSITA accounts for this by adjusting threshold implant/dose — an ordinary design step. The '353 asserts no electrically surprising behavior in claim 1.
- "Obvious to try." KSR endorses rejecting claims where the prior art presents "a finite number of identified, predictable solutions." Here there is essentially one place to leave the nitride (over the channel/active region) and one consequence.
- Weak nexus to any secondary consideration. The '353's asserted advantages (fewer steps, better nitride coverage over the gate, protection against junction spiking, nucleation-friendly resistor surface) are each either (a) admitted to be known benefits of the same techniques in the same references ('298's rough polysilicon; '477's nitride barriers; the taper-for-coverage rationale) or (b) a cost/time saving, which is "the product of ordinary design choice" rather than a nonobvious technical advance.
6. The strongest counterarguments (and how they fare)
A rigorous analysis should state where the challenger is weakest, because these are the arguments the patentee would raise:
- No explicit suggestion to retain the LOCOS stack. Appels and Kooi disclose the structure and its masking function, but the conventional LOCOS flow strips the nitride and pad oxide and re-grows gate oxide — a step the Appels and Kooi processes themselves describe. Post-KSR, the absence of an explicit "keep the nitride" teaching is not fatal: the rationale comes from the known problem (step-count reduction) and the finite set of options. Pre-KSR TSM, however, would have made this a much closer case, and it is plausible the patent would have survived a 1992-era TSM attack on this ground alone. This asymmetry is important and worth stating plainly.
- Teaching away / known detrimental properties of nitride as a gate dielectric. Silicon nitride is well known to trap charge, to have a high interface-state density, and to behave as a non-ideal gate insulator (this is the basis of MNOS memory devices). A patentee could argue that a POSITA would not deliberately place a nitride layer in the gate dielectric stack of a power MOSFET on a printhead, where threshold-voltage stability matters. Assessment: this is the best nonobviousness argument, but it is a preference, not a teaching away, unless a reference expressly criticizes oxide-nitride gate dielectrics. I found no such reference in the art retrieved. Note also the counterweight: the patent's own claim 6/16 make the overlying dielectric nitride, and '477 already sandwiches the resistor between nitride films — the field was comfortable with nitride in the stack.
- Distinctive processing consequences. The '353 notes the nitride's hardness means it does not "reflow" (unlike doped SiO₂), which is why sloped polysilicon sidewalls are needed. A patentee could frame sloped gate sidewalls + nitride passivation as a synergistic pair producing an unexpected result (full, defect-free nitride coverage). Assessment: modest. The sloped-edge-for-step-coverage principle is conceded in the specification as a general truth, and the same patent uses sloped via sidewalls (178/179) for the same reason. Also note that the "result" here is better manufacturability — an efficiency/predictability argument.
- Secondary considerations / commercial success. HP's ThinkJet and DeskJet printheads and the broad downstream citation footprint (US 6,102,528; US 5,774,148; EP 1 944 164 A3 "X" citation) could be marshaled as evidence of commercial uptake. But the patent's own specification attributes the cartridge design and the chemical/mechanical stack (SiN/SiC/Ta/plastic) to the cited prior art, so the nexus between any commercial success and the claimed gate-stack/process-retention feature would have to be shown specifically. No evidence of a nexus appears in the record I have.
- § 103(c) common ownership (HP/HP). Discussed in § 4, Combination A. This is a statutory bar to using '812 (and any commonly owned 102(e) art) in a § 103 rejection, and it is the most concrete reason the '353's claim 1 might have been practically unimpeachable at the time even if technically obvious.
- Enablement/support and claim-drafting quirks. The earlier sections of this report flagged two literal anomalies — claim 9's opening phrase "a MOSFET transistor substrate," and the abstract/description's garbled "about 95.5% by weight aluminum, about 3.0% by weight about 1.5% by weight silicon." Neither is a § 103 issue; I mention them only to keep the record consistent with the earlier sections. The § 112(b) indefiniteness exposure is separate from obviousness and I do not fold it in here.
7. Bottom line
- Claim 1 is, on the art of record, obvious. Its non-cartridge elements are met in substance by US 5,122,812 (and by US 4,719,477 + EP 0 229 673), and its distinguishing elements — a gate comprising SiO₂ → Si₃N₄ → polysilicon, and a field oxide surrounding the transistor — are the LOCOS structure of Appels and Kooi, which the '353 itself cites and describes as "known processes," combined with a polysilicon layer deposited over that stack exactly as the patent's own Fig. 8 shows. The motivation (fewer process steps; mask-count reduction) is admitted in the '353's own background and is the stated object of independent prior art (EP 0 494 076).
- Claim 9 and its dependents are obvious over the same references as applied to claim 1, plus Scheu '298 (Ta–Al/polysilicon resistor; Al/Al–Cu conductor; SiN + SiC + plastic-barrier + orifice-plate stack) and '477/'530 (Ta cavitation layer). Claim 7/18 is the most vulnerable: Scheu '298 discloses the claimed four-layer protective stack essentially element-for-element. Claims 8/10/17/20 (junction depth) are routine optimization of a result-effective variable.
- Claims 11 and 19 are obvious as the combination of an obvious printhead (claims 1/9) with the very cartridges the specification identifies as its use environment (Buck US 4,500,895; Cowger US 4,794,409).
- The two genuine vulnerabilities of this attack are (i) the pre-KSR TSM framing, which would have made the "retain the LOCOS stack as gate dielectric" step harder to reach without an express suggestion, and (ii) pre-AIA § 103(c) common ownership if US 5,122,812 or other 102(e) art is HP-owned and the invention was commonly owned. Everything else I examined cuts toward obviousness.
8. Explicit limitations of this analysis
- Claims 20–37 are not in the record I retrieved (the text truncates mid-claim 20 at "…said source region and said drain regio…"). The '353 is titled "…and method for making the same," and I would expect additional independent method claims in that range covering the FIGS. 3–19 sequence; I am not asserting their content or their validity status. Pull the full claim set from USPTO Patent Center / Patent Public Search for application US 07/724,658 before relying on this as a complete claim-by-claim analysis. This is a material gap, because a method claim reciting the retention of the dual-layer structure could be materially harder to invalidate than the structural claims I analyzed.
- The filing date of US 5,122,812 was not verified in this session, and it determines whether '812 is § 102(e) art. If '812's filing post-dates the '353's invention date, Combination A must be rebuilt from '477 + EP 0 229 673 + Appels/Kooi (Combination C), which is weaker on the "direct resistive contact to source, drain and gate" element.
- Issue dates and canonical identifiers for the of-record references (Scheu '298, Hawkins '530, Hess '477, Hawkins '192, Schwabe '4,510,670, Buck '4,500,895, Cowger '4,794,409) are given to support the § 102(b)/§ 102(e) characterizations, but I did not re-verify each date from the front page in this session. Verify before filing.
- No direct litigation, PTAB, or CAFC record for US 5,159,353 was found (consistent with the Litigation and Verification sections above), so there is no adjudicated claim construction or validity ruling to constrain this analysis; the claim constructions used here are the plain meanings drawn from the specification.
- Consistent with the operating rules, I have not auto-corrected any identifier: the "515 patent" in National Steel Car Ltd. v. FreightCar America, Inc. (D. Del. 1:24-cv-00594-JLH-CJB) and JP 5159353 B2 (Hitachi) remain identified as different patents from US 5,159,353, and I do not treat them as related.
Generated 9/30/2026, 7:42:49 PM
Extensions
Patent term adjustments, term extensions, continuations, divisionals, family members, and expiration dates.
Derivative works
Defensive disclosure: derivative variations of each claim designed to render future incremental improvements obvious or non-novel.
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