US 4472875

I'll research US patent 4472875 across USPTO and litigation sources.

Let me run additional targeted checks for any litigation or later activity involving this patent.

US Patent 4,472,875 — Analyst Summary

Source of record: Full text retrieved from Google Patents (https://patents.google.com/patent/[US4472875](/patent/US4472875)/en), fetched 2026-09-24. No live USPTO PAIR/PatentCenter or CAFC docket record for this number appeared in my searches (see "Litigation check" below).

Bibliographic data

Assignments of record: Teletype Corporation → AT&T Teletype Corporation (change of name); maintenance fee paid at year 4 (1988); lapse recorded Dec. 1, 1992.

Abstract (as issued)

"A method for manufacturing an integrated circuit thermal print head is illustrated including transistor 20 and a resistor doped region 22 formed on a first surface of a silicon circuit wafer 10. A contamination barrier in the form of a moat 26 filled with silicon nitride 30 is formed around the transistor 20. A support wafer 50 is secured to the first surface of the circuit wafer 10 by an adhesive layer 58. The circuit wafer 10 is thinned, and the exposed surface of the circuit wafer 10 is photoshaped to define wafer segments 68 positioned over the resistor doped region 22."

Independent claim — plain-language overview

The patent has 6 claims, of which only claim 1 is independent. Claims 2–6 all depend directly or indirectly on claim 1 (claim 4 depends on claim 3, which depends on claim 1).

Claim 1 — A method of making an integrated-circuit device, comprising:

• (A) Processing a silicon circuit wafer to form (i) an integrated circuit on its first surface and (ii) at least one alignment pattern. The integrated circuit must include an active circuit and a passive heating element controlled by that active circuit (i.e., the driver transistor plus the resistive heater of a thermal print head).
• (B) Surrounding the active circuit with a barrier against environmental contaminants (the moat filled with silicon nitride).
• (C) Preparing the surface of a separate support wafer for later processing (e.g., oxide/nitride/oxide layers).
• (D) Positioning the first (circuit-carrying) surface of the circuit wafer opposing a first surface of the support wafer.
• (E) Forming an adhesive layer between those opposing surfaces so the two wafers adhere into a wafer sandwich.
• (F) Photoshaping (photolithographically etching) an opening through the circuit wafer to expose indicia corresponding to the alignment pattern — i.e., using the back side of the thinned wafer and the buried alignment mark for front-to-back registration.
• (G) Photoshaping the circuit wafer using that exposed indicia to produce an isolated circuit wafer section (a thermally isolated "segment"/mesa) positioned over the passive heating element.
• (H) Slicing the wafer sandwich into individual integrated-circuit chips.

Practical gist: a back-side alignment / wafer-bonding process flow for building a monolithic thermal print head, where the heater resistor is left on a thinned, thermally isolated silicon segment over which paper is drawn, while the drive transistor is protected by a nitride-filled moat.

Dependent claims (brief):

• Claim 2: thin the circuit wafer before step (G) to reduce segment thickness.
• Claim 3: place a contaminant-barrier material layer over the circuit-wafer surface before step (E) (the oxide/nitride/oxide triple passivation).
• Claim 4: the circuit wafer has ⟨100⟩ crystalline structure (giving the 54.76° etch walls noted in the spec).
• Claim 5: outgas the adhesive before bonding.
• Claim 6: the barrier is a moat filled with silicon nitride.

Prior art cited on the face of the patent (5 references)

US3852563 (HP, thermal printing head); US3889358 (Siemens); US4110598 (Texas Instruments, thermal printhead assembly); US4134125 (Bell Telephone Laboratories, passivation of metallized semiconductor substrates); US4266334 (RCA, manufacture of thinned substrate imagers).

Related/sibling Teletype filings (same June 27, 1983 priority date, different patents — not to be confused with this one): US 4,468,857 ("Method of manufacturing an integrated circuit device") and US 4,485,553 ("Method for manufacturing an integrated circuit device"), plus EP0129915B1 and EP0132614B1.

Litigation check (USPTO / CAFC 2026)

• No CAFC 2026 docket, IPR, ITC §337 investigation, or district-court action naming US 4,472,875 was found in my searches.
• ⚠️ Caution on search noise: my CAFC/agency searches surfaced an unrelated matter repeatedly referred to as "the '287 patent" (a hydrodermabrasion-system patent at the ITC, see Cartessa, Commission final determination, 91 FR, March 26, 2026, https://www.govinfo.gov/content/pkg/FR-2026-03-26/pdf/2026-05838.pdf). That is a different patent (a differently numbered '287 patent directed to skin-treatment apparatus), not US 4,472,875. Do not conflate them.
• The patent lapsed in 1992 and would in any event have expired June 27, 2003, so 2026 infringement litigation over this number is not plausible.

Uncertainty notes

• I could not independently pull a USPTO PatentCenter/Assignment record or a Federal Circuit docket query confirming current ownership beyond the Google Patents assignment records quoted above. Treat the "AT&T Teletype Corp." current-assignee field as the database's listing, not a freshly verified chain of title.
• The Google Patents OCR of the specification contains the typo "water sandwich" (should read "wafer sandwich"); this is a source-text artifact, not part of the patent.

I'll search for litigation involving US patent 4472875.

Initial searches returned unrelated results. Let me search targeted litigation databases.

Litigation search — U.S. Patent No. 4,472,875

Bottom line: I found no litigation involving U.S. Patent No. 4,472,875 ("Method for manufacturing an integrated circuit device").

What I searched and what came back

I ran targeted queries against litigation-oriented sources (Unified Patents Portal, Docket Alarm/PACER-derived dockets, CourtListener/RECAP, and the Stanford NPE Litigation Database) and general web searches for the specific number. Findings:

• No case names, dockets, complaints, PTAB/IPR petitions, or ITC § 337 investigations referencing 4,472,875 surfaced.
• Searches for the bare number "4472875" returned only false positives from unrelated databases — e.g., a CourtListener investment record ID 4472875, an Argentine trademark act number, and a UK companies-gazette ID — none of which are patent litigation. I have not treated these as matches.
• Searches for "4,472,875" also surfaced cases asserting different, similarly numbered patents — notably U.S. Pat. No. 4,464,228 (Tegal/Tokyo Electron) and the Blue Spike patents (7,346,472; 7,660,700; 8,214,175, etc.). Per your instruction, these are excluded as non-matches.

Why this is consistent with the record

The patent's lifecycle makes litigation very unlikely and explains the absence of any hits:

The patent became unenforceable in 1992 when maintenance fees were not paid ("Expired – Fee Related"). With no enforceable rights after 1992, there was effectively nothing to assert, and the assertion window (1984–1992) evidently produced no recorded infringement suits in the databases searched. The record does show the patent was cited by later patents (16–22 forward citations, e.g., Hewlett‑Packard thermal ink‑jet printheads), but citation is not litigation.

Caveats

• I cannot rule out a pre‑1992 state-court or early federal action that never made it into modern digital dockets (PACER coverage of 1980s–early‑1990s cases is incomplete, and many older dockets are not digitized). My conclusion of "no known litigation" is limited to what is discoverable in the sources searched as of today.
• The patent has foreign family members — EP 0129914B1, JP S6052046A, CA 1205575A, and DE 3466952D1 — whose national proceedings (e.g., EPO oppositions) are outside the scope of "litigation involving US 4,472,875" and were not the subject of this search. If you want, I can check opposition/validity proceedings on the EP member (EP 0129914B1).

Requested table

If you'd like, I can also pull the forward-citation list (parties that cited the patent) or run a maintenance-fee/assignment history check, but neither reflects actual litigation.

Proceedings overview

Zero AIA trial proceedings are on file against US 4,472,875. The structured "PTAB proceedings on file" block — the canonical list sourced from the USPTO Open Data Portal — returns no IPR, PGR, or CBM for this patent, and supplemental web searches (PTAB E2E petition documents, PTAB decisions, Federal Circuit material) surfaced nothing further. Institution-denied: 0 · Claims invalidated: 0 · Claims sustained: 0 · Settled: 0 · Active: 0.

Bottom line for a defendant: there is no PTAB record to lean on and none to fear. The patent is not "hardened" by surviving IPRs — it simply was never challenged at the Board. Its defensive posture comes from a different source: it lapsed in 1992 for failure to pay the maintenance fee (effective 1992-09-27) and would in any event have expired 2003-06-27. An assertion of this patent in 2026 would be a statute-of-limitations/non-existence problem, not an invalidity problem. Any demand letter citing US 4,472,875 is citing a dead patent.

(No per-proceeding entries follow, because there are no proceedings to describe. Fabricating sections here would be exactly the failure mode this analysis is meant to avoid.)

Strategic summary

1. Claim status is "untested," not "canceled" and not "confirmed." Because no petition was ever filed, the full claim set stands exactly as issued on 1984-09-25: claim 1 independent, claims 2–5 depending from it, claim 6 depending from claim 1 (claim 4 via claim 3). There is no FWD, no certificate of cancellation, and no adverse judgment under 37 C.F.R. § 42.73 that would have estopped the patent owner or narrowed the claims by amendment. Anyone who tells you "the claims were killed at the PTAB" is confusing this patent with another.

2. Estoppel landscape is empty — and irrelevant. Section 315(e)(2) estoppel only attaches to a petitioner that filed and was instituted; no petitioner exists. Practically, the prior-art ground budget is unlimited, but a defendant does not need it: the patent expired 2003-06-27, so § 271 infringement of a then-expired claim would require conduct during the term (pre-2003). The real defenses are the patent term and the 1992 lapse, plus equitable defenses (laches, estoppel, § 286 damages bar) against any stale claim.

3. Pattern signals: none. No repeat petitioner, no defensive aggregator (no Unified Patents, RPX, or similar entity appears in any filing or record tied to this number), and no patent-owner appeal activity, because there was never a Board proceeding to appeal. The absence of IPR activity is a weaker signal than usual here — it is explained by the patent's age, expiry, and the fact that Teletype/AT&T Teletype never enforced it, not by the claims' strength.

⚠️ Search-noise warning (carry this forward). Multiple PTAB documents in my searches refer to "the '287 patent," but none is US 4,472,875:

• IPR2018-00998 / IPR2018-00999 (Micron v. North Star Innovations) — the "'875 patent" there is US 6,127,875, claims 1–3 held unpatentable under § 102 over Hsieh. Different patent, different number (6,127,875 vs. 4,472,875). Note this is a "875" collision, not a "287" collision — easy to mishandle.
• An IPR2025 discretionary-denial brief refers to an expired "'287 Patent" filed 2003-10-31, issued 2005-02-15 with an FWD expected 2026-10-14 — again not this patent.
• The hydrodermabrasion ITC matter flagged in the earlier summary (91 FR, 2026-03-26) is a third, unrelated "'287."

None of these are US 4,472,875. Do not cite them.

Recommended next steps

• If you are a defendant and cannot point to a PTAB disposition: that is the correct answer — say so plainly. There is no FWD to link. The authoritative negative is the ODP-derived proceedings list in the structured block of this analysis; PTAB E2E (https://ptabstats.uspto.gov / https://ptacts.uspto.gov) will likewise show no trial for this patent number.
• Pivot the defense off validity. Even though an IPR is technically available against an expired claim (see Sony Corp. v. Iancu, 924 F.3d 1235 (Fed. Cir. 2019)), filing one against a patent that lapsed in 1992 and expired in 2003 is a waste of fees and signals weakness. Lead instead with (i) expiration/term, (ii) the 1992 lapse for non-payment (maintenance fee records above), and (iii) § 286's six-year damages bar plus laches/estoppel for any remote-time assertion.
• If, contrary to all of the above, a live 2026 assertion appears: get the pleading and any demand letter, confirm the patent number character-by-character, and check the sibling patents from the same 1983-06-27 priority family — US 4,468,857, US 4,485,553, EP0129915B1, EP0132614B1, and US 4,516,136 (thermal print head, At&T Teletype). A demand letter may be misciting one of those as "4,472,875." Those siblings are equally expired, but the number mismatch matters for your response posture and for any Rule 11 analysis.
• No PTAB milestones to track. There is no institution-deadline date, no oral hearing, and no statutory one-year FWD clock running, because no petition was filed.

Confidence note: I am confident in the negative result for US 4,472,875 (structured ODP data plus multiple negative web searches). I could not verify any live USPTO PatentCenter filing history beyond the assignment and fee records already reported, so treat "no proceedings" as sourced from the ODP-derived list rather than from a fresh PatentCenter pull.

I'll verify the recorded assignment data and the corporate history behind it before writing up.

Let me try to pull the actual recordation notices and check for any downstream AT&T/Lucent conveyances.

Assignment chain analysis — US 4,472,875

Retrieval note (read first): I was not able to load the USPTO Assignment Center UI live in this session. The reel/frame data below comes from two independent records that agree with each other: (i) the Google Patents legal-events table for US4472875 (reels 004149/0501 and 004372/0404, https://patents.google.com/patent/US4472875/en), and (ii) an Espacenet INPADOC legal-status entry for US 3,961,337 (a different, earlier Teletype patent) which carries the same reel 004372/0404 with the same effective date — confirming the 1984 name change was a blanket portfolio-wide recordation, not a patent-specific transfer. The correspondent / recording attorney fields were not exposed in either source, so I cannot report them; I flag that explicitly in signal 3 rather than guessing. Verify at https://assignmentcenter.uspto.gov/ (or https://assignment.uspto.gov/patent/index.html) by searching patent number 4472875.

Inventors

All three assigned their entire right, title and interest to Teletype Corporation by an instrument executed 1983-06-22 and recorded 1983-06-27 (five days after the June 27, 1983 filing date — i.e., the assignment was hitched to the filing, the normal employer practice). Their employer is established by the assignment itself, not by independent employment records; for a 1983 corporate MOS-process R&D filing out of Skokie that inference is safe but is an inference.

Unusual-pattern check: Not present. There is no recorded reassignment by any of the three inventors to a third party, no fractional-interest assignments, and no subsequent instrument in which any inventor's name appears again. The classic fire-sale tell (all inventors departing and their interests being separately conveyed within 12 months of filing) does not appear in the record. I could not determine individual departure dates from these sources; the absence of any inventor-side conveyance is the only evidence available.

Original assignee

Teletype Corporation (a Delaware corporation), 5555 Touhy Ave., Skokie, Illinois 60076.

• Business: Design, development and manufacture of data and record communications equipment — historically teleprinters (Models 15, 28, 32/33, 35, 42/43), and by the 1980s, terminal and printer products (e.g., the AT&T Teletype 5540 Cluster Display family). At filing it was a subsidiary within AT&T's Western Electric manufacturing arm; it had been wholly owned by AT&T since 1930.
• Product embodying the claims: Unclear / not evidenced. US 4,472,875 claims a method of manufacturing a monolithic thermal print head (driver transistor + nitride-moated contamination barrier + thinned, thermally isolated heater segment). The specification describes an integrated circuit "particularly adapted for thermal printing on a paper medium," but I found no evidence of a commercial Teletype thermal print head product built by this process. Do not read the patent's forward citations (HP, Xerox, Lexmark thermal ink-jet print heads, 1988–2005) as product evidence — citation is not commercialization.
• Current status: Dissolved as an operating entity. Renamed AT&T Teletype Corporation effective 1984-08-17; the Skokie plant was vacated in 1987–88 and redeveloped as a shopping center in 1989–90; the last vestiges of the Teletype business ceased around 1990 (Wikipedia Teletype Corporation, https://en.wikipedia.org/wiki/Teletype_Corporation; kekatos.com Skokie site history, https://web.archive.org/web/20080603235022/http://www.kekatos.com/teletype/). Massachusetts corporate records for the entity show a Certificate of Withdrawal filed 1987-09-01 (city-data.com business entity 361855520); Maryland and Alabama records list it as "Merged" (marylanddb.com F00548792; alabamaregistry.org ID 44928219). None of these state filings transferred this patent — see the timeline.

Assignment timeline

1983-06-22 (executed) / recorded 1983-06-27 — Reel 004149/0501

• Conveyance: Assignment (assignment of inventors' interest)
• Assignor: Raymond R. Christian; Harry Sue; Joseph C. Zuercher
• Assignee: Teletype Corporation, 5555 Touhy Ave., Skokie, IL (a Delaware corporation)
• Correspondent: not retrieved — the correspondent field was not exposed in the Google Patents legal-events rendering or the INPADOC record I could reach. Cannot be reported without fabrication.
• Context: Ordinary employee invention assignment to the original employer, executed five days before the June 27, 1983 filing date; the same instrument covered the sibling Teletype filings on the same priority date (US 4,468,857 and US 4,485,553).

1984-08-17 (executed) / recorded 1985-03-11 — Reel 004372/0404

• Conveyance: Change of Name (AT&T's own recordation language: "CHANGE OF NAME; ASSIGNOR: TELETYPE CORPORATION")
• Assignor: Teletype Corporation
• Assignee: AT&T Teletype Corporation, a corporation of Delaware
• Correspondent: not retrieved (same limitation as above).
• Context: Change of name only — no change in beneficial ownership. This is a corporate-renaming recordation reflecting the post-divestiture rebrand (Teletype Corporation → AT&T Teletype). Crucially, the identical reel 004372/0404 with the identical effective date 1984-08-17 appears on the INPADOC record for US 3,961,337, proving it was a bulk portfolio recordation rather than a transaction touching this patent alone. A change of name is not an ownership transfer and should not be counted as one.

Post-1984: no further assignments of record. The only remaining legal events are fee-related, not conveyances: FPAY year‑4 fee paid 1988-02-11; maintenance-fee reminder 1992-04-29; lapse for failure to pay 1992-09-27; lapsed-due-to-nonpayment 1992-12-01; anticipated expiration 2003-06-27. Google Patents' "Current Assignee: AT&T Teletype Corp" is a database carry-forward of the 1984 name change, not evidence of a fresh recorded assignment.

Two things that did not happen, and are worth stating for the record: the 1996 AT&T → Lucent Technologies spin-off and the 2006 Alcatel / 2016 Nokia acquisitions of the Lucent portfolio produced no recorded assignment for this patent, because the patent had already lapsed in 1992 and would have been of no portfolio value. Its foreign sibling EP 0129914B1 (granted 1987-10-28, corresponding DE 3466952D1) has a separate European chain that I did not retrieve; if you want the EP register pulled, say so, but it does not bear on US ownership.

Timeline diagram

timeline
    title Ownership of US 4472875
    1983 : Inventors assign to Teletype Corp
         : Application filed 27 June 1983
    1984 : Patent granted 25 September 1984
         : Teletype renamed AT&T Teletype
    1985 : Name change recorded reel 004372
    1992 : Lapsed for unpaid maintenance fee
    2003 : Anticipated expiration

NPE / troll-pattern signals

1. Shell-entity transfer — NOT PRESENT. No LLC, no "IP / Holdings / Licensing / Ventures" suffix, no registered-agent address, and no conveyance of any kind after 1984-08-17. The chain is two entries long and both assignees are the same AT&T subsidiary under two names.

2. Known asserter in the chain — NOT PRESENT. No assignee in the chain matches Acacia, Marathon, Intellectual Ventures, IPNav, Wi-LAN, Mosaid/Conversant, Vringo, Pendrell, Innovatio, MPHJ, Lumen View, Round Rock, Document Generation Corp, or any Spangenberg entity. The chain terminates in the original operating company's corporate family. (This also corroborates the earlier litigation section: no suits, no IPRs, no §337 investigations found for this number.)

3. Repeat correspondent across the chain — UNRESOLVED, not scored. This is the one signal I cannot close: the correspondent/recording-attorney field was not returned by the sources I could reach (Google Patents legal events supply only reel/frame + owner text; the INPADOC entry supplies reel/frame + conveyance + effective date). I am declining to infer a correspondent from the prose of the assignment text. Flagging as a genuine gap rather than calling it "not present."

4. Cascading transfers — NOT PRESENT. Zero consecutive transfers, let alone multiple links in <24 months. The only two recordations are 1983 (original assignment) and 1985 (name change) — one of which isn't a transfer at all.

5. Pre-litigation transfer — NOT PRESENT. No infringement suit naming this patent was found (see the prior litigation section), so there is no pre-suit assignment window to assess. The chain's last ownership event (1984/1985) predates the patent's 1992 lapse by seven years with nothing in between.

6. Bankruptcy fire-sale — NOT PRESENT as recorded. Teletype/AT&T Teletype was wound down operationally (Skokie vacated 1987–88, Teletype business ceased ~1990), but the record shows no bankruptcy proceeding and no assignment of this patent out of the corporate family. The later AT&T equipment spin-offs (Lucent 1996) predate nothing here — the patent had already lapsed for non-payment in 1992. Do not characterize the Skokie wind-down as a fire-sale on this record; there is no reel/frame evidencing a sale of this patent.

7. Privateering — NOT PRESENT. No operating-company-to-NPE transfer appears anywhere in the chain, and there is no SEC filing, RPX, Unified Patents or Patent Progress coverage tying this patent to an assertion campaign. AT&T was a net defendant-side participant in the 1980s–1990s patent environment, not a privateer on this asset.

8. Defensive aggregator (anti-NPE) — NOT PRESENT. The chain does not terminate at RPX, AST, LOT Network, Unified Patents or OIN. The patent simply died of non-payment in the hands of its original owner's successor-by-name — which is a different fact from neutralization by a defensive aggregator, and I am not conflating the two.

Verdict

Insufficient data — in the specific sense defined for this exercise: the Assignment Center record for this patent consists of only the original inventors' assignment (reel 004149/0501, recorded 1983-06-27) plus a name-change recordation (reel 004372/0404, recorded 1985-03-11) that conveys no ownership. There is no transfer chain to score.

Justification: both entries fall inside the original AT&T corporate family, and no ownership change is recorded at any point after 1984-08-17, with the patent lapsing for unpaid maintenance fees effective 1992-09-27 and expiring 2003-06-27 — so all eight NPE signals resolve to not present (signal 3 unresolved for lack of a correspondent field). Substantively this is the anti-NPE outcome an analyst would want to see: a captive corporate portfolio asset that was never spun out, never asserted, and was allowed to die in place. I am not entering "NPE — moderate confidence" or "operating-company assertion" because neither is supported by a single reel/frame entry.

Verify: https://assignmentcenter.uspto.gov/ → search "4472875" (mirror: https://assignment.uspto.gov/patent/index.html), then open reels 004149/0501 and 004372/0404 to capture the correspondent-of-record I could not retrieve.

I'll verify the USPTO record for this specific patent number and pull details on each cited reference.

Let me pull the remaining cited references and the family-cited art.

Prior-Art Analysis — US 4,472,875

1. Verification of the target patent (USPTO record)

Searching the specific number 4472875 returns the expected single record; no similar-number records were substituted:

Source of record: the authoritative full text supplied (Google Patents, https://patents.google.com/patent/US4472875/en). I was not able to load a live USPTO PatentCenter page for 4472875 in this session, so I treat the supplied full text as the ground truth for the claims and citation list, and note that limitation.

Note on "prior art" scope. US 4,472,875 was examined in 1983–84. Because the AIA grace-period/derivation provisions (35 U.S.C. §§ 102(a)(1)/(b)(1)) do not apply, all citations below are governed by pre‑AIA § 102(a)/(b)/(e) — i.e., the reference must be a patent, printed publication, or public use "before the invention" or "more than one year prior to the U.S. filing date" (i.e., before 1982‑06‑27), or an earlier U.S. application/patent under § 102(e). Every reference below predates 1982‑06‑27, so each qualifies as § 102(b) art except where noted.

2. Reference-by-reference analysis

(i) US 3,852,563 — Hewlett-Packard Co.

• Citation: US 3,852,563, "Thermal printing head," Hewlett-Packard Co. Filed 1974‑02‑01; issued 1974‑12‑03.
• § 102 category: § 102(b) — issued more than one year before the 1983‑06‑27 filing.
• Description: A thermal printing head built on a single-crystal sapphire substrate with an epitaxially deposited silicon layer. An array of resistive heating elements and isolation diodes are diffused into the semiconductor layer, and transistor decoding logic is made an integral part of the printing head. Conductive regions doped in the silicon layer beneath the diodes/transistors provide cross-unders so only a single metallic-conductor layer is needed. The patent frames the invention as solving the yield and packing-density limits of alumina-substrate heads with discrete bonded heater and semiconductor elements.
• Claims potentially affected: Claim 1, element (A) — the requirement that the processed integrated circuit include "an active circuit … and a passive heating element controlled by said active circuit." HP '563 is the closest cited art on the monolithic integration of heater + drive circuitry concept. Even so, "controlled by" implies the heater is driven by the transistor; HP '563's emphasis is decoding logic plus diffused heaters, so this is at most a § 102 element-level reference, not an anticipation of claim 1 as a whole.

(ii) US 3,889,358 — Siemens Aktiengesellschaft

• Citation: US 3,889,358, "Process for the production of high value ohmic load resistors and MOS transistors having a low starting voltage," Siemens Aktiengesellschaft (inventor Hartwig Bierhenke). Appl. 05/397,402; issued 1975‑06‑17.
• § 102 category: § 102(b).
• Description: A process, on a common n‑silicon substrate, in which a single ion-implantation step simultaneously (a) forms the ohmic load resistor and (b) implants the channel region to lower the FET starting voltage. Source and drain are diffused p‑regions; a thick SiO₂ layer is opened over the channel and resistor regions; boron is implanted; aluminum contacts are then deposited. Result: enhancement-mode FET with ~500 mV threshold and a 500 kΩ–1 MΩ load resistor.
• Claims potentially affected: Claim 1, element (A) — specifically the step of forming a doped resistor region in the wafer surface together with (or in the same process as) the transistor's source/drain, which the specification of '875 expressly claims as "preferred" (doped region 22 "preferably formed with the source-drain doped regions 14 and 16"). The reference is not a thermal-head reference and does not touch the wafer-sandwich, alignment, isolation-etch, or dicing steps (C–H), so it cannot anticipate claim 1 as a whole; it is material only as to the co-fabrication of an active device and a resistor.

(iii) US 4,110,598 — Texas Instruments Incorporated ← strongest reference

• Citation: US 4,110,598, "Thermal printhead assembly," Texas Instruments Inc. (Cochran et al.). Filed 1975‑09‑02; issued 1978‑08‑29.
• § 102 category: § 102(b).
• Description: A thermal printhead assembly and connection scheme. The relevant manufacturing disclosure is detailed: a slice (20) of semiconductor mesas is mounted on wafer-receiving members (32) by an adhesive layer (36) — preferably a heat-conductive cured epoxy. The slice is then ground and/or etched until its thickness is reduced to about 0.002 inches; the thinned upper surface is coated with photoresist, exposed through a mask, developed, and etched to electrically isolate each semiconductor mesa; a second photoresist step then etches border "valleys (38)" to divide the slice into a plurality of individual wafers (40), each secured to a receiving member by a portion of the adhesive layer. The slice is aligned with the receiving members before the adhesive is cured.
• Claims potentially affected: Claim 1, elements (D), (E), (G), (H) and Claim 2. TI '598 discloses, in substance: (a) adhesive bonding of a processed semiconductor slice to a support member; (b) thinning the slice after bonding; (c) photolithographic masking + etching to isolate individual semiconductor mesas; and (d) etch-separation into individual chips. These map closely onto "positioning the first surface opposing," "forming a layer of adhesive … forming a wafer sandwich," "photoshaping … to produce an isolated circuit wafer section," and "slicing the wafer sandwich into integrated circuit chips," and onto claim 2's "thinning the circuit wafer … to reduce the thickness of the wafer segments."
  • Gap: TI '598 does not disclose element (F) — the back-side, through-the-thinned-wafer opening etched to expose a buried alignment mark used for front-to-back registration (its alignment is coarse, physical alignment of the slice to the receiving members before bonding). Nor does it disclose element (B) — a contamination barrier (moat/nitride) surrounding the active circuit. Because claim 1 requires both of those, TI '598 does not anticipate claim 1 as a whole; it is, however, the citation that comes closest and would be the centerpiece of any obviousness challenge against claims 1–2.

(iv) US 4,134,125 — Bell Telephone Laboratories, Incorporated

• Citation: US 4,134,125, "Passivation of metallized semiconductor substrates," Bell Telephone Laboratories, Inc. Filed 1977‑07‑20; issued 1979‑01‑09.
• § 102 category: § 102(b).
• Description: Addresses cracking of passivation layers over aluminum metallization. A thin amorphous-silicon layer (~500–1500 Å, plasma-deposited) is deposited over the metallized substrate, followed by a passivating layer of silicon nitride or silicon dioxide. The amorphous Si stabilizes the overlying passivation layer, reduces cracking, and — critically — remains intact beneath cracks so that cracks do not propagate down to the aluminum metallization or the semiconductor surface. Explicitly framed as "protection from the ambient without the need for hermetic packaging."
• Claims potentially affected: Claim 3 — "placing a layer of material, which provides a barrier to environmental contaminants, over the surface of the circuit wafer." The '875 specification's triple passivation stack (SiO₂ 36 / SiN 38 / SiO₂ 40) that "provides a barrier to the migration of sodium and other environmental contaminants" is squarely in the same field, and Bell '125 supplies the SiN-over-metal barrier-layer teaching. It does not disclose the moat/support-wafer/alignment/etch steps, so it cannot anticipate claim 1 or claim 6 independently; it is material to claim 3 (and, as a secondary matter, supplies context for the nitride barrier of claim 6).

(v) US 4,266,334 — RCA Corporation

• Citation: US 4,266,334, "Manufacture of thinned substrate imagers," RCA Corporation. Filed 1979‑07‑25; issued 1981‑05‑12.
• § 102 category: § 102(b).
• Description: A method of manufacturing thinned-substrate imagers — i.e., bonding a processed device wafer to a support and thinning the device wafer (classically to reduce carrier diffusion/blooming and to reach a target thickness) for imaging (CCD-type) devices. ⚠️ Limitation: I was unable to retrieve the full text of US 4,266,334 in this session; the description above rests on the title and the classification context supplied in the citation list, not on quoted column text. I flag this rather than fabricate specifics.
• Claims potentially affected: Claim 2 ("thinning the circuit wafer … to reduce the thickness of the wafer segments") and, more generally, Claim 1 element (D)/(E) insofar as '334 uses a support/handle wafer bonded to the processed device wafer prior to thinning. RCA '334 is the "thinned-substrate manufacturing" reference and is best read as supporting the thinning step.

3. Summary table

4. Family-cited references (foreign prosecution — not on the U.S. face)

Google Patents' "Family Cites Families" list for the '875 family identifies nine references cited during prosecution of the foreign family members (CA 1,205,575; EP 0,129,914; JP S60‑52046; DE 34 669 52). These were not cited against the U.S. case but are the closest "extra" art to note:

• GB 1,235,197 — Texas Instruments Inc., "Manufacture of circuit element arrays" (pub. 1971‑06‑09).
• US 3,769,562 — Texas Instruments Inc., "Double isolation for electronic devices" (1973‑10‑30) — relevant to claim 6's isolation/barrier concept.
• JPS 50‑1872 B1; JPS 52‑83070 (Seiko Instr. & Electronics, "Production of semiconductor device," 1977‑07‑11); JPS 53‑87163 (Hitachi, 1978‑08‑01); JPS 54‑59083 (Sumitomo Electric, "Double-sided pattern forming method for semiconductor wafer," 1979‑05‑12); JPS 57‑17158 (Fujitsu, 1982‑01‑28); JPS 57‑45254 (NTT, "Automatic detector for amount of silicon wafer worked," 1982‑03‑15); JPS 58‑93345 (NEC, 1983‑06‑03).

⚠️ Caveat: the JPS publications are only ~1982 for the most recent (JPS 57‑17158, JPS 57‑45254), i.e., within one year of the 1983‑06‑27 filing for some and just over a year for others — their § 102(b) vs. § 102(a) status depends on their exact publication dates, and I did not retrieve full texts. Treat the JPS list as leads for foreign-opposition context, not as confirmed § 102(b) art.

5. Assessment — what the prior art does and does not reach

No single cited reference appears to anticipate claim 1 as a whole. The reason the '875 patent issued over these five references is the same reason I flag it here: claim 1 requires the conjunction of (a) a monolithic heater + active driver (HP '563, partially), (b) a contaminant barrier surrounding the active circuit (not shown by any cited reference; closest family art is TI '562), (c) adhesive wafer-sandwich bonding (TI '598), (d) back-side alignment through a thinned wafer (only '875 teaches using a relief image in the adhesive layer — element F), and (e) etch-defined thermally isolated segments over the heater (TI '598 discloses mesa isolation, but not over a resistor/driver pair in a thermal-printhead context). The novelty of '875 lies principally in (c)+(d)+(e) in combination.

Rank of relevance to the '875 claims:

1. US 4,110,598 (TI) — strongest; directly implicates claims 1 (elements D/E/G/H) and 2.
2. US 4,266,334 (RCA) — implicates claim 2 (thinning) and the support-wafer bonding concept of claim 1.
3. US 4,134,125 (Bell Labs) — implicates claim 3 (passivation/barrier layer).
4. US 3,852,563 (HP) — implicates claim 1 (A) (integrated heater + active circuit).
5. US 3,889,358 (Siemens) — implicates claim 1 (A) (resistor co-formed with source/drain). Weakest of the five; it is a speculative § 102/§ 103 citation.

Secondary note for the independent-claim analysis: the heart of any validity challenge to claim 1 would be the combination of TI '598 (bonding, thinning, mesa isolation, dicing) + HP '563 (monolithic heater/driver head) + Bell '125 (SiN barrier) + the family-cited TI '562 (double isolation) to reach the moat/barrier element — i.e., this is really a § 103 combination case, not a § 102 anticipation case, for claim 1. Claims 2 and 3 are the most exposed to genuine § 102 argument, since TI '598 alone discloses post-bond thinning and Bell '125 alone discloses the contaminant-barrier layer.

I'll ground this obviousness analysis in the actual cited references. Let me pull details on the five references cited on the face of US 4,472,875 plus the family-cited art.

Let me pin down the remaining cited references.

Let me nail down two more references — the Siemens resistor/transistor patent and the TI array-fabrication family citation.

Obviousness Analysis — U.S. Pat. No. 4,472,875 under 35 U.S.C. § 103

Scope note: This analysis builds on the claim-1 element breakdown and prior-art list already generated. I did not repeat that material. The evidentiary universe is the prior-art section of the Google Patents record (https://patents.google.com/patent/US4472875/en): the five examiner-cited U.S. references, the nine "Family Cites Families" references, and the forward citations. Where I rely on material outside that section, I flag it as extra-record.

Caveat on dates. The system date is 2026-10-01; the task block says April 26, 2026. This is immaterial to a § 103 analysis of a patent that lapsed in 1992. No contradiction was found with the previously generated sections.

1. The hypothetical person having ordinary skill in the art (PHOSITA), as of June 27, 1983

For this art, a PHOSITA would be a worker with a B.S. in electrical engineering, materials science, or physics, plus roughly 3–5 years of hands-on MOS wafer-fab experience, and working knowledge of: MOS transistor and diffused-resistor formation; field-oxide/recessed-oxide isolation and silicon-nitride masking; photolithographic masking and alignment; anisotropic (KOH) etching of ⟨100⟩ silicon; and wafer bonding/thinning. This is a mature, well-populated, and highly predictable art as of 1983 — a point that matters under KSR Int'l v. Teleflex, 550 U.S. 398 (2007).

2. Element-by-element mapping of claim 1 to the art of record

Result of the mapping: every limitation of claim 1 except the specific mechanism of step (F)/(G) — etching through the thinned wafer to expose the alignment mark's relief image in the adhesive — is disclosed or plainly suggested by references already on the face of the patent.

3. The principal § 103 combinations

Combination A (strongest): US4110598 + US4266334 + US3852563

This is a three-reference combination, all in the same field (thermal print heads / thinned-wafer processing), all cited by the examiner.

• US4110598 supplies the core process skeleton: adhesive-bond the processed slice circuit-side-down onto a carrier → thin the exposed back → photomask and etch from the back to isolate mesas → mask/etch valleys to singulate the chips while the adhesive holds them.
• US4266334 supplies the wafer-level (rather than slice-level) version: a full processed wafer, adhesive + support plate, vacuum-assisted void-free bonding, thinning to a few microns, and dicing the completed sandwich.
• US3852563 supplies the reason to put the driver and heater on one body ("Very low" assembly yield, "cannot be used for high density printing" with discrete bonded parts) and the mesa-isolation concept.

Motivation: HP '563 articulates the exact problem the '875 patent's Background identifies — difficulty and expense of registering a discrete heat-transfer element to a heating element. TI '598 and RCA '334 supply the known fix (bond the wafer to a support, thin it, and pattern it from the back while it is held rigid). A PHOSITA seeking a high-density, monolithic thermal print head in 1983 had every reason to put these together, and RCA '334 expressly assures the worker that the sandwich survives probing, sawing, and handling — i.e., reasonable expectation of success.

Combination B: US3852563 + US3889358 + US4266334 + US4134125

Adds Siemens '358 to supply the "passive element controlled by the active element formed in the same diffusion step" teaching of step (A), and Bell '125 for step (B)/claim 3 (nitride-over-metallization contaminant barrier). This combination is broader and would support rejections of claims 1 and 3 together.

Combination C (for the back-side alignment element of step (F)/(G))

Neither TI '598 nor RCA '334, on the excerpts available, expressly describes etching an opening to expose a buried alignment mark. A rejection on step (F)/(G) would have to be built from either:

1. Family-cited art on double-sided registration — JPS5459083 (Sumitomo, "Double-sided pattern forming method for semiconductor wafer") is directly on point by title; JPS5745254 (NTT, "Automatic detector for amount of silicon wafer worked") shows thickness control of the thinned wafer, which is the quantity that governs such alignment. (I could not retrieve the full text of either; my mapping rests on their translated titles, and I flag that as an evidentiary gap.)
2. KSR "finite number of identified, predictable solutions." Once a bonded, thinned wafer must be patterned from its back side, the alignment options are a short, closed list: IR through-wafer viewing, viewing front-side marks through thinned silicon, double-sided exposure, or etching windows to expose the marks. Choosing one of them is a design choice with predictable results.
3. Extra-record evidence (not cited in '875, so usable only as background): the discussion in JPS6193782A of alignment symbols etched on the gate side and observed through a thinned substrate (https://patents.google.com/patent/JPS6193782A/en) shows through-wafer alignment to etch-formed markers was known.

4. Why the combination motivation is unusually easy to establish here

1. Same field, same problem. Every primary reference addresses thermal print heads or semiconductor-wafer handling for imaging/printing arrays. There is no field-crossing to justify.
2. The patent's own Background concedes the problem and the general approach. The '875 specification states the prior-art alignment of heat-conductive material to the heating element "has been particularly difficult; and thus, the fabrication of such integrated circuits has been expensive." A stated problem plus known solutions is the paradigm KSR case.
3. Predictable results. Bond → thin → pattern → dice is a mechanical sequence; the references report the expected outcomes (survivability, thickness uniformity, singulation), and '875 reports nothing unexpected beyond that.
4. Sibling-application evidence. Three Teletype applications sharing the June 27, 1983 priority date — US 4,472,875, US 4,468,857, and US 4,485,553 — plus EP0129915B1 and EP0132614B1 claim closely related variants of the same disclosure. A family of same-day variations on one process is consistent with routine optimization rather than a single non-obvious insight.

5. Dependent claims

No dependent claim adds a step that either (a) lacks reference support, or (b) is not squarely within the routine skill level.

6. The best rebuttals a patentee would raise — and the answers

Rebuttal 1 — "No reference teaches etching through the wafer to expose the alignment mark as a relief image in the adhesive."
This is the strongest argument on the record as presented. It attacks only step (F)/(G), leaving steps (A)–(E) and (H) conceded. It would fail if the examiner or challenger produces the double-sided-registration art (JPS5459083 is the file's own lead) or persuades on KSR's finite-set rationale. It also invites an inherency counter: if the adhesive necessarily conforms to the alignment mark when the wafers are pressed together — the spec presents 34a as simply "the relief images in the adhesive 58 of the patterns 34 as shown in the adhesive 58" — then the patentee may have discovered a property of the prior-art bonding step rather than added an inventive step. Titanium Metals Corp. v. Banner, 778 F.2d 775 (Fed. Cir. 1985), and its progeny cut against claiming the discovery of a latent property of a known process.

Rebuttal 2 — "RCA '334 bonds the support to the back surface after thinning; '875 bonds to the front circuit surface before thinning. Opposite orientation."
Factually correct as to RCA, but this is exactly why TI '598 is the better primary reference: TI '598 forms the adhesive on the lower surface of the slice, mounts it, and then thins and patterns the upper (back) surface — the same orientation as '875. The patentee cannot use the RCA orientation to distinguish claim 1 while ignoring TI '598.

Rebuttal 3 — "TI '598 mounts on discrete 'wafer receiving members,' not a 'support wafer.'"
A claim-differentiation argument, but a weak one: the recited function (rigid carrier for a thinned wafer during back-side patterning and singulation) is identical, and the '875 support wafer differs only in bearing its own oxide/nitride/oxide layers — a step (C) the claim does not meaningfully limit beyond "preparing."

Rebuttal 4 — Long-felt need / unexpected result.
The Background's "particularly difficult … expensive" language supplies the need, but the record contains no objective evidence of nexus, commercial success, copying, or failure of others. As a practical matter there can be none: the patent lapsed September 27, 1992 for failure to pay maintenance fees (per the Google Patents legal-events table). An assertion of long-felt need without evidence is entitled to little weight.

7. Bottom line

• Claims 1, 2, 3, 5, and 6 would, on this record, support a strong prima facie § 103 case built on US4110598 (primary) + US4266334 + US3852563, with US3889358 and US4134125 supplying the resistor/driver-in-one-body and contaminant-barrier elements. Claim 4 is vulnerable as a routine choice of known material orientation.
• The case is not airtight. One limitation — photoshaping an opening through the circuit wafer to expose indicia corresponding to the alignment pattern and patterning therefrom — is not expressly taught by the five examiner-cited references. A challenger must close that gap with either the double-sided-registration art in the file's own family-citations list (JPS5459083 most directly) or a KSR finite-set/design-choice rationale. My assessment is that the gap is closable, but it is the pivot point of any real contest.
• The combination is not a hindsight construction: HP '563, TI '598, RCA '334, Siemens '358, and Bell '125 were all before the examiner, in the same or directly adjacent fields, and each was cited for a reason connected to the recited steps. That significantly reduces the usual hindsight objection.
• This is an analyst's assessment, not a legal opinion. A definitive conclusion would require full-text claim-construction of "photoshapsing/photoshaping," "isolated circuit wafer section," and "support wafer," plus the complete specifications of TI '598, RCA '334, and the Japanese family references, which I could not retrieve in full. In litigation, invalidity would also have to be proven by clear and convincing evidence — and with the patent lapsed and expired, no live controversy exists.