Invalidity dossier

US 10648879

Capacitive pressure sensor

Current assignee: Individual

Added 9/24/2026, 3:26:04 PM

At a glanceNo PTAB challengesNo litigation on fileSemiconductor (T)

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Patent summary

Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.

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Let me check litigation, PTAB, and CAFC records specifically.

Let me check for any 2026 Federal Circuit activity involving the owner/related entities.

US 10,648,879 B2 — Summary

Important framing / uncertainty note: I retrieved the authoritative full text and bibliographic record (Google Patents, corroborated by Justia Patents). I did not find any CAFC 2026 docket entry, district-court case, or PTAB/IPR proceeding naming this specific patent — searches for 10648879 in litigation/appeal contexts returned zero relevant hits. Treat the "no litigation found" statement as a negative search result, not proof of non-existence. Also note this record was fetched on 2026-09-24 and my tool budget was exhausted before I could run additional PTAB/Docket Alarm queries.

Bibliographic data

Field Value
Patent number US 10,648,879 B2
Title Capacitive pressure sensor
Application no. US 15/439,674
Filing date 2017-02-22
Priority date 2016-02-22 (provisional 62/298,235, "Unique Design and Fabrication Sequence of Making Low Cost Capacitive Pressure Sensor with Higher Performance")
Issue date 2020-05-12
Pre-grant publication US 2017/0241855 A1 (2017-08-24)
Inventors Kathirgamasundaram Sooriakumar; Anu Austin; Ian Rose Bihag; Dieter Naegele-Preissmann
Original assignee Individual (no corporate assignee at grant)
Recorded assignments Innogrity Pte Ltd (2022-12-19) → Darcet (Suzhou) Co., Ltd (2023-03-15) → Sooriakumar, Kathirgamasundaram (2025-11-18)
Legal status Active; adjusted expiration 2038-01-24
Claim count 8

Assignee caveat: the assignment chain is taken verbatim from the record. Because there have been three recorded reassignments (including a 2025 transfer back to an individual inventor), I would not treat any single entity as the confirmed current owner without a fresh USPTO Assignment Database check. Google's own notice states its assignee list "may be inaccurate."

Abstract (as issued)

Aspects of the disclosure provide a capacitive pressure sensor including a first substrate having a first surface and a second surface, a movable plate at a bottom of a first cavity recessed into the substrate from the first surface, and a second substrate bonded to the first substrate over the first surface. A second cavity is formed between the movable plate and the second surface. The second substrate includes a fixed plate disposed over the movable plate to form a capacitor. The second substrate further includes a third cavity between a surface of the fixed plate opposite to the movable plate and a surface of the second substrate opposite to the first substrate.

Independent claims in plain language

Claim 1 (sensor) — the only true independent claim. A capacitive pressure sensor with two semiconductor substrates and a movable plate (diaphragm). The movable plate sits between a first cavity recessed into the first substrate and a second cavity recessed into the first substrate and second substrate — i.e., it is buried/recessed rather than formed on a bonding surface. The plate has a top surface and moves perpendicular to it under pressure. The second substrate is bonded to the first and carries a fixed plate that sits over a third cavity recessed into the second substrate and under the movable plate, the pair forming the sensing capacitor. The closing limitation is a structural-property limitation: both substrates are semiconductor substrates, and the first substrate "consists a single continuous semiconductor structure." That last clause (drafted with non-standard grammar) is significant — it appears to be the point of novelty over prior recessed-diaphragm designs that build up deposited layers, and it is the limitation most likely to be litigated if anyone construes the claim.

Claim 7 (package). A capacitive pressure sensor package comprising the claim-1 sensor, a cap enclosing the sensor and having an opening above it, and a package substrate — with the second substrate attached to the package substrate. Although it references claim 1, it is written in independent-claim form and adds the packaging environment as its own subject matter.

(Claim 8 is a further independent-style limitation but is drafted as a dependent claim: the sensor enclosed in a housing with an opening, where the movable plate's top surface is fluidically connected to the housing exterior. I flag this because it is arguably an independent claim in substance while formally depending from claim 1.)

Dependent claims

  • Claim 2 — Via hole through the first substrate to the movable plate (opening at the first surface), plus an isolation wall surrounding the via hole and an isolation layer between the movable plate and that surface; wall + layer form an isolation well around the via.
  • Claim 3 — Fixed plate has a contoured surface facing the movable plate, corresponding to the movable plate's deflection contour (non-parallel-plate gap).
  • Claim 4 — Movable plate itself is contoured, concaving away from the fixed plate.
  • Claim 5 — Movable plate includes a spring structure near its edge to reduce stress on the plate.
  • Claim 6 — An isolation layer at the bonding interface between the two substrates.

Technical thrust and prosecution context

The specification positions the invention against two problems: residual stress/warping in conventional SOI-based designs where the diaphragm is trapped at the bond interface (its FIG. 4), and stiction from wet-etch sacrificial-layer release in surface-micromachined designs (its FIG. 5/6). By recessing the diaphragm inside a cavity, the design avoids both, permits non-polysilicon diaphragm materials (silicon carbide is expressly named), and allows cheaper prime-grade or test-grade wafers instead of SOI wafers. The disclosure also claims SNR above −70 dB enabled by the isolation-layer structure. Prosecution history shows a non-final action, a final rejection, a response after final, then allowance — consistent with the claims being narrowed to the structural limitations now recited.

Family / related filings (for context)

  • Continuation of this case: US 16/844,684 → US 11,193,843 B2
  • Sibling applications from the same 2016-02-22 priority: US 15/439,659 → US 10,488,288 B2; US 16/662,543 → US 11,156,519 B2
  • The family is cited by CN 112153544 A (capacitance microphone), and the inventors have a related later Innogrity filing, US 11,523,224 B2 (capacitive microphone SNR), plus US 2022/0212920 A1 (liquid-resistant air inlet).

Bottom line on your specific request: no CAFC 2026 docket activity concerning US 10,648,879 was located; the patent is recorded as active with a 2038-01-24 adjusted expiration and a non-corporate current owner of record.

Generated 9/29/2026, 11:02:54 PM

Cases on file (0)

Specific litigation cases in our database that name US patent 10648879. The free-form analysis below may also discuss cases beyond this list.

No cases on file mention this patent. Upload a CSV or add a case manually in Admin → Manage litigation cases.

Litigation summary

Past and pending lawsuits — plaintiffs, defendants, jurisdictions, outcomes, and notable rulings.

✓ Generated

I'll research litigation involving US patent 10648879.

Let me search litigation-specific sources.

Let me search more targeted litigation databases.

Litigation Search Results for US Patent 10,648,879

Based on my searches, I found no known litigation involving US Patent 10,648,879.

I want to be precise and honest about what I checked and what I did and did not find. Below is my search methodology and findings.

Searches performed

  • General web searches for "US patent 10648879 litigation / lawsuit / infringement"
  • Search of Unified Patents litigation and reexamination resources (including their portal and "News & Views" feed)
  • Searches for the current/prior owners as litigation plaintiffs (Innogrity Pte Ltd; DARCET (SUZHOU) CO., LTD; individual inventor Kathirgamasundaram Sooriakumar)

Every result returned only patent-document pages (Google Patents, Justia Patents, and USPTO PTAB petition papers for unrelated patents). None of the searches surfaced a district court docket, ITC filing, PTAB proceeding, or CAFC appeal naming this patent.

What I could NOT verify

I could not confirm the absence of litigation from authoritative docket sources with the tools/queries available here. Specifically:

  • No docket was located on CourtListener/RECAP, Docket Alarm, Justia Dockets, or PACER for "10,648,879."
  • No ITC Section 337 investigation appears to reference this patent.
  • No IPR/PGR/CBM or reexamination appears to reference this patent (Unified Patents' public coverage did not list it).

Because litigation-database coverage can be incomplete (especially for recently filed or settled cases), the correct statement is: no litigation asserting US 10,648,879 was found in the sources searched — not that none exists as a matter of certainty.

Important distinction — related family patents

Do not confuse the '879 patent with its family members, which share the same priority date (2016-02-22) and title ("Capacitive pressure sensor"):

These are separate patents. A search hit on any of these numbers is not a hit on 10,648,879.

Relevant ownership chain (for litigation-mapping purposes)

Per the Google Patents assignment record (no auto-correction applied):

  • 2022-12-19 — assigned to INNOGRITY PTE LTD (Singapore) from inventors Sooriakumar, Austin, Bihag, Naegele-Preissmann
  • 2023-03-15 — assigned to DARCET (SUZHOU) CO., LTD from Innogrity Pte Ltd
  • 2025-11-18 — assigned back to SOORIAKUMAR, KATHIRGAMASUNDARAM from Darcet (Suzhou) Co., Ltd

Note: Innogrity Pte Ltd is the assignee of a different patent (US 11,523,224 B2) that cites this family — relevant context if you are tracking the entity's enforcement activity.

Recommendation

To confirm definitively, run direct docket queries you can access with a full subscription:

  • PACER / CourtListener-RECAP: search the patent number "10,648,879" across all district courts
  • Unified Patents Portal: https://portal.unifiedpatents.com/litigation and the patent-page lookup for 10648879
  • USPTO PTAB: search the Patent Trial and Appeal Board docket for "10,648,879"
  • ITC EDIS: search Section 337 investigations for the patent number

If you can pull those specific dockets, I can help analyze the pleadings, case numbers, filing dates, and status.

Bottom line: No litigation involving US Patent 10,648,879 was located in my searches; I cannot confirm a formal case list (plaintiff, defendant, jurisdiction, case number, filing date, outcome) because no such case was found. If you have a specific docket number or plaintiff in mind, I can attempt to verify it against the record.

Generated 9/29/2026, 11:02:51 PM

Proceedings on file (0)

All PTAB activity →

AIA trial proceedings (IPR / PGR / CBM) filed at the USPTO Patent Trial and Appeal Board against this patent. Sourced from the USPTO Open Data Portal and refreshed every six hours; each proceeding number deep-links to the PTAB E2E docket.

No PTAB proceedings on file. This patent has not been challenged via IPR, PGR, or CBM. The absence is itself a signal — well-asserted patents eventually attract IPRs. The LLM analysis below may surface filings the ODP feed hasn’t indexed yet.

PTAB challenges

AIA trial proceedings at the USPTO Patent Trial and Appeal Board — IPR, PGR, and CBM. Petitioners, judge panels, claim-level invalidation outcomes from Final Written Decisions, and Federal Circuit appeals. The single most important defensive datapoint after litigation history.

✓ Generated

PTAB / AIA Trial Proceedings — US Patent 10,648,879

Bottom line up front: The canonical source for this task — the USPTO Open Data Portal "PTAB proceedings on file" block provided in the prompt — returns no AIA trial proceedings (no IPR, PGR, or CBM) against US 10,648,879. My independent web searches (Google Patents litigation/PTAB linkage, PTAB petition document repositories, and docket aggregators) surfaced no proceeding numbers I could tie to this patent, so I am not going to invent any. Per the operating rule for this task ("the default should be 'no PTAB activity on file'"), I am reporting the absence as the finding, with the caveat below.

Proceedings overview

Total proceedings: 0. There are no active IPRs, no claims invalidated, none sustained, none settled, and no institution denials — because no AIA trial petition appears to have ever been filed against US 10,648,879. The defensive posture this gives a defendant is the opposite of "hardened": the claims are completely untested at the Board. All eight issued claims (1–8) stand exactly as granted on 2020-05-12, including the broad independent claim 1 and dependent claims 2–8. There is no final written decision, no estoppel, and no PTAB record to cite for or against validity.

Flag / caveat: The ODP ingest may lag recent filings, and PTAB E2E is the definitive record. I could not retrieve any IPR/PGR matching "10648879" or its family members (US 10,488,288; US 11,156,519; US 11,193,843) in the searches I was able to run. If you are deciding whether to file, verify directly on PTAB E2E / PTAB Center and in the USPTO Patent Trial and Appeal Board Decisions database before relying on this. I am reporting "no activity found," not "activity is impossible."

(No proceedings to enumerate)

There are no proceeding sections to populate. For completeness, the only third-party activity on the public record for this disclosure is a forward citation: CN 112153544 A (AAC Technologies / 瑞声新能源发展(常州)有限公司科教城分公司), "Capacitance microphone and manufacturing method thereof," published 2020-12-29. That is a patent citation, not a PTAB proceeding, and does not affect the analysis above.

Strategic summary

Claim status across 10,648,879. All claims are UNTESTED before the PTAB: claims 1–8 are neither canceled nor confirmed by any final written decision. Claim 1 recites a two-substrate capacitive sensor in which the movable plate sits between a first cavity and a second cavity recessed into the first and second substrates, the second substrate carries a fixed plate over a third cavity, both substrates are semiconductor substrates, and "the first substrate consists a single continuous semiconductor structure." Dependent claims 2–8 add the via hole/isolation wall/isolation well (claim 2), a contoured fixed plate (claim 3), a contoured movable plate (claim 4), a spring structure (claim 5), a bonding-interface isolation layer (claim 6), a capped package (claim 7), and a housing with an opening fluidically connecting the movable plate's top surface to the exterior (claim 8). None of these has been adjudicated by the Board.

Estoppel landscape. Because no IPR was instituted, § 315(e)(2) estoppel does not attach to anyone. A defendant today faces no estoppel bar from prior PTAB activity on this patent and is free to raise any § 102/§ 103 ground in district court and/or in a fresh IPR — subject only to the normal § 315(b) one-year bar running from service of an infringement complaint, and § 325(e) if a PGR had occurred (none did). The practical consequence: there is no "second-bite" penalty and no PTAB record the patent owner can point to as validating the claims. The flip side is that there is also no Ali v. Federal Circuit-type surviving-claim precedent to exploit, and no petitioner has yet stress-tested the art. The prior art cited on the face of the patent (e.g., US 2009/0166772, US 2009/0218642, US 2011/0075865, US 2011/0204745, US 2011/0308324, US 9,170,164, and US 2016/0207756) plus the family's own prior patent US 9,170,164 (Naegele-Preissmann) are the natural starting points, but note that several of these were already before the examiner, which cuts against an easy § 102/§ 103 win on the same references.

Pattern signals. (1) No repeat-petitioner pattern — there is no petitioner at all, so none of the classic multi-IPR-filer signals apply. (2) No defensive aggregator in the chain. The assignment history shows a small-entity/individual ownership path: original assignee Individual → INNOGRITY PTE LTD (2022-12-19) → DARCET (SUZHOU) CO., LTD (2023-03-15) → reassigned back to inventor KATHIRGAMASUNDARAM SOORIAKUMAR (2025-11-18). No Unified Patents, RPX, or other aggregator appears as a real party in interest on the record I can see. (3) No CAFC appeal — with no FWD, there is nothing to appeal. (4) The sibling applications in the same family (US 10,488,288; US 11,156,519; US 11,193,843, all filed 2017-02-22 off the same 2016-02-22 priority) were also not, so far as I could verify, the subject of any PTAB proceeding — meaning the entire family is PTAB-virgin. That is unusual for a family this size and suggests the portfolio has not (yet) been heavily asserted in campaigns that typically draw IPRs.

Recommended next steps

  • If you are a defendant being asserted this patent: do not assume the patent is "hardened" — it isn't tested at all. There is no FWD to cite and no canceled claim to point to, so your invalidity case must be built from scratch (district court § 282 defense, and/or your own IPR). The absence of prior PTAB activity means you may be the first to construe these claims, which is both an opportunity (no adverse claim-construction precedent) and a risk (you are paying to create the record).
  • Before relying on the zero-count finding: confirm on PTAB E2E (search by patent number 10,648,879) and the USPTO PTAB Decisions database, and run the same check against the three family members (10,488,288; 11,156,519; 11,193,843). If a recently filed petition exists, it may not yet be in ODP.
  • If a petition is later filed: the key milestones to diarize are the § 314(b) institution deadline (6 months from the petition's filing/receipt date), the § 316(a)(11) 12-month clock from institution to FWD, the patent owner's § 316(a)(8) response and any § 316(a)(9) motion to amend, and the request for oral hearing. There is no current trial-stage track to track because no trial has been instituted.
  • Watch the § 315(b) clock. If an infringement complaint has been served on you or your privies more than one year ago, you are time-barred from filing an IPR on this patent — verify service dates before budgeting for a PTAB petition.

Sources consulted: the structured ODP "PTAB proceedings on file" block (canonical, returned empty); Google Patents record for US 10,648,879 B2 (assignment history, family, citations); web searches for IPR/PGR filings and litigation tied to the patent and its family. No PTAB FWD, institution decision, or CAFC opinion exists to link because none was found. If you need a definitive negative, pull the PTAB E2E docket directly — that is the only authoritative confirmation.

Generated 9/29/2026, 11:03:09 PM

Ownership chain (3)

Asserters network →

Structured records extracted from the assignment-history narrative below. Each entity links to its full ownership-network profile.

  1. ? · recorded 2022-12-19 · Assignment

    NAEGELE-PREISSMANN, Dieter; SOORIAKUMAR, KATHIRGAMASUNDARAM; AUSTIN, Anu; BIHAG, Ian RoseINNOGRITY PTE LTD

    consolidation of inventor rights

  2. ? · recorded 2023-03-15 · Assignment

    INNOGRITY PTE LTDDARCET (SUZHOU) CO., LTD

    sale/transfer

  3. ? · recorded 2025-11-18 · Assignment

    DARCET (SUZHOU) CO., LTDSOORIAKUMAR, KATHIRGAMASUNDARAM

    reversion to inventor

Assignment history

Inventors, original assignee, and the chain of ownership recorded with the USPTO — including the correspondent attorney who recorded each assignment, since shell-LLC chains often share one repeat-player attorney even when the entity names look unrelated. Surfaces NPE / patent-troll patterns: shell-entity transfers, known asserters in the chain, repeat correspondent fingerprints, pre-litigation assignments, and bankruptcy fire-sales.

✓ Generated

I'll research the assignment record for US 10,648,879, starting with what the patent record itself shows and then probing USPTO Assignment Center.

Assignment Record — US 10,648,879 B2 ("Capacitive pressure sensor")

Data-quality caveat up front. I could not retrieve the Assignment Center reel/frame numbers or the correspondent-of-record fields for this patent with the tools available. Repeated queries against assignmentcenter.uspto.gov / assignment.uspto.gov returned only patent-document pages (Google Patents, Justia) and unrelated PTAB/trademark assignment abstracts. I have not fabricated reel/frame values. What follows is reconstructed from the patent's own legal-events record (as fetched from Google Patents, which mirrors the post-issuance reassignment entries) and is labeled accordingly. Where a field is truncated in the source, I say so rather than guess.

Important cross-reference flag: per the previously generated litigation summary, no litigation asserting this patent was located. That finding drives the verdict below and is consistent with everything in the assignment record.


Inventors

# Name Employer at filing
1 Kathirgamasundaram Sooriakumar Not determinable from the record
2 Anu Austin Not determinable from the record
3 Ian Rose Bihag Not determinable from the record
4 Dieter Naegele-Preissmann Not determinable from the record

Pattern notes (evidence-based, no speculation):

  • No corporate assignee at filing. Google Patents lists both "Original Assignee: Individual" and "Current Assignee: Individual" (with the standard disclaimer that listed assignees "may be inaccurate"). All four inventors held legal title personally from the 2017-02-22 filing through 2022 — a ~5.7-year gap before the first recorded assignment. That is unusual for a funded corporate filer and is the single most notable ownership fact here.
  • Not the "inventors depart within 12 months" pattern. The fire-sale precondition described in the brief (all inventors leaving the original assignee quickly) is not visible here, because there was no original corporate assignee for them to leave.
  • Inventor overlap with prior art in the same field. Co-inventor Dieter Naegele-Preissmann is the named owner of US 9,170,164 B2 ("Capacitive pressure sensor and a method of fabricating the same," priority 2012-02-03), one of the seven references cited against this patent. This is a same-field, same-name inventor/owner record, not an assignment link to the '879 patent.
  • Minor anomaly worth a direct look-up: the Google Patents legal events show 2019-03-14 — FEPP, "ENTITY STATUS SET TO UNDISCOUNTED… ENTITY STATUS OF PATENT OWNER: LARGE ENTITY." An application held by individual inventors would normally be small/micro-entity. I flag this as an anomaly to verify against PEDS/ODP, not as a finding — it could reflect an unrecorded license/obligation or a filing-agent default.

Original assignee

  • Entity named on the issued patent: none — individual inventors. US 10,648,879 B2 issued 2020-05-12 to the four named inventors as individuals (assignee field: "Individual").
  • Product embodying the claims: Not determinable. No corporate assignee, no SEC registrant, and no product literature is attached to the patent record. The spec describes a wafer-level MEMS capacitive pressure sensor with a recessed diaphragm, a bottom-mount and top-mount variant, and process flows (FIGS. 16A–17B) using prime/test-grade wafers rather than SOI — a design/manufacturing disclosure, not a product identification.
  • Primary line of business: N/A (individuals).
  • Current status: The current recorded owner is an individual (Kathirgamasundaram Sooriakumar) per the 2025-11-18 entry below. There is no operating company, no acquirer, and no bankruptcy estate on the face of the record.

Family context (for cross-checking, not a substitute): the same priority date (2016-02-22) and title attach to three sibling patents — US 10,488,288 B2 (app. 15/439,659), US 11,156,519 B2 (app. 16/662,543), and US 11,193,843 B2 (app. 16/844,684, a continuation of the '879 patent). All four applications show the same "Individual" original-assignee posture. Assignment Center queries on any single number will under-report the family; pull the family together before drawing conclusions.


Assignment timeline

Three post-issuance conveyances are recorded. There are no recorded security agreements, mergers, changes of name, licenses, or releases in the '879 chain — every entry is a straight conveyance of assignor's interest.

  • 2022-10-20 → 2022-10-22 (executed) / recorded 2022-12-19 — Reel/Frame not retrieved (source text truncated as "REEL/FRAME:0…")

    • Conveyance: Assignment of assignors' interest
    • Assignor(s): NAEGELE-PREISSMANN, Dieter; SOORIAKUMAR, KATHIRGAMASUNDARAM; AUSTIN, Anu; BIHAG, Ian Rose (all four named inventors)
    • Assignee: INNOGRITY PTE LTD (Singapore)
    • Correspondent: not retrieved — required field, could not be confirmed. This is the highest-value missing data point in the whole chain (see Signal 3).
    • Context: consolidation of individual inventor rights into a single holding entity — the first time the patent left inventor hands, ~6.8 years post-filing and ~2.6 years post-issuance.
  • (execution date not stated in source) / recorded 2023-03-15 — Reel/Frame not retrieved

    • Conveyance: Assignment of assignor's interest
    • Assignor: INNOGRITY PTE LTD
    • Assignee: DARCET (SUZHOU) CO., LTD (People's Republic of China)
    • Correspondent: not retrieved
    • Context: sale/transfer to a China-based counterparty only ~86 days after the prior recording — the fastest link in the chain.
  • (execution date not stated in source) / recorded 2025-11-18 — Reel/Frame not retrieved

    • Conveyance: Assignment of assignor's interest
    • Assignor: DARCET (SUZHOU) CO., LTD
    • Assignee: SOORIAKUMAR, KATHIRGAMASUNDARAM (a named inventor, back in personal ownership)
    • Correspondent: not retrieved
    • Context: reversion to the originating inventor — the chain inverts rather than terminating at a licensing entity.

Verify at: https://assignmentcenter.uspto.gov/ (patent-number search for 10648879), legacy mirror https://assignment.uspto.gov/patent/index.html. Request the "Assignment Abstract of Title" PDF, which prints reel/frame, conveyance, execution date, and correspondent name + address — the four fields I could not pull here.


Timeline diagram

timeline
    title Ownership of US 10648879
    2016 : Priority application filed
    2017 : Non-provisional filed by inventors as individuals
    2020 : Patent issued to individual inventors
    2022 : Inventors assign to Innogrity Pte Ltd
         : Executed October 2022
         : Recorded December 2022
    2023 : Innogrity assigns to Darcet Suzhou Co Ltd
    2025 : Darcet assigns back to inventor Sooriakumar

NPE / troll-pattern signals

1. Shell-entity transfer — unclear.
The patent did move from individuals to a Singapore private limited company (INNOGRITY PTE LTD, recorded 2022-12-19) and then to a Chinese company (DARCET (SUZHOU) CO., LTD, recorded 2023-03-15). But none of the stated tells is evidenced: no "IP / Patents / Licensing / Holdings / Ventures" suffix, no registered-agent address on record, no single-member DE/TX LLC structure, and no product-absence evidence I could verify. Naming alone is not a finding — this is unclear pending the correspondent address on the 2022-12-19 and 2023-03-15 recordings.

2. Known asserter in the chain — not present.
Neither Innogrity Pte Ltd nor Darcet (Suzhou) Co., Ltd matches Acacia, Marathon Patent Group, Intellectual Ventures, IPNav, Wi-LAN, Mosaid/Conversant, Vringo, Pendrell, Innovatio, MPHJ, Lumen View, Round Rock, Document Generation Corp, or Spangenberg-entity rosters as surfaced by Unified Patents/RPX in the searches run for the litigation summary. No appearance on a high-frequency-plaintiff list was found. (Note: Innogrity is the assignee of US 11,523,224 B2, a capacitive-microphone patent that itself cites this family — an entity to keep on the watch list, but owning a citing patent is not assertion evidence.)

3. Repeat correspondent across the chain — unclear (highest-value gap).
No correspondent data could be retrieved for any of the three recordings in this chain. I therefore cannot test the core signal — whether one attorney/firm filed all three recordings. Given the three recordings are only ~3 years apart and involve a Singapore entity and a Suzhou entity, a single recurring filer is plausible and would be materially probative; it is simply not established here. This is the first field to pull.

4. Cascading transfers — present (weak, one leg).
Innogrity → Darcet moved through two recorded transfers in ~86 days (recorded 2022-12-19 → recorded 2023-03-15), well inside the <24-month threshold. The third leg (Darcet → Sooriakumar, 2025-11-18) is ~2.7 years later and points backward to an inventor, which is the opposite of the classic cascading-LLC pattern. One fast flip + one reversion = a weak, ambiguous cascade rather than a chained-shell arrangement.

5. Pre-litigation transfer — not present.
No infringement suit naming US 10,648,879 was located (per the litigation summary), so there is no first-suit date for a transfer to precede. Notably, the chain reverses course in 2025 rather than concentrating for assertion.

6. Bankruptcy fire-sale — not present.
No Chapter 7/11, no bankruptcy estate, and no judicial sale appears anywhere in the record. The assignors are individuals and two private foreign companies; nothing in the legal events indicates insolvency proceedings.

7. Privateering — unclear.
A transfer to a Singapore holding company that is not a known operating sensor maker could in principle be privateering on behalf of an unnamed backer, but there is no SEC filing, no Patent Progress/EFF coverage, and no assertion to support it. Raising the flag without evidence would violate the stated constraint.

8. Defensive aggregator (anti-NPE) — not present.
The chain does not terminate at RPX, AST, LOT Network, Unified Patents, or OIN. It terminates at a named human inventor.


Verdict

Insufficient data.

The record shows three post-issuance conveyances, but none of the decisive NPE markers can be carried: the known-asserter signal is absent, no litigation asserting the patent was located, there is no defensive aggregator termination, and the two fields that would convert a suggestive transfer pattern into a finding — correspondent of record and reel/frame — could not be retrieved for any of the three recordings. What can be said with evidence is narrower: the patent left individual inventors in December 2022 (recorded), reached DARCET (SUZHOU) CO., LTD in March 2023, and reverted to inventor SOORIAKUMAR in November 2025 — a developer → holding company → foreign counterparty → original inventor sequence that is equally consistent with a technology/M&A transaction as with assertion-driven ownership, and is therefore not classifiable as NPE on this record. To move off "insufficient data," pull the Assignment Abstract of Title PDF for patent 10648879 (and its three siblings) at https://assignmentcenter.uspto.gov/ and supply the correspondent name/firm and reel/frame for entries dated 2022-12-19, 2023-03-15, and 2025-11-18; if a single filer recurs across those three, Signal 3 converts to present and the verdict shifts to NPE — moderate confidence.

Generated 9/29/2026, 11:03:39 PM

Prior art

Earlier patents, publications, and products that may anticipate or render the claims unpatentable.

✓ Generated

I'll research the USPTO record for US 10,648,879 and each of its cited patent references. Let me run targeted searches.

Now let me research the remaining cited references.

Prior-Art Analysis — US 10,648,879 B2 ("Capacitive Pressure Sensor")

Builds on the earlier litigation section. That section found no litigation asserting the '879 patent and mapped the ownership chain (Innogrity Pte Ltd → DARCET (Suzhou) → Sooriakumar). This section does not repeat those findings.


1. Patent identification (USPTO / Google Patents record)

Field Value (no auto-correction applied)
Patent number US 10,648,879 B2
Title Capacitive pressure sensor
Application no. 15/439,674
Filed 2017-02-22
Priority 2016-02-22 (provisional 62/298,235)
Granted / published 2020-05-12
Inventors Kathirgamasundaram Sooriakumar; Anu Austin; Ian Rose Bihag; Dieter Naegele-Preissmann
Original assignee Individual
Claims 8 (1 independent sensor claim; 2–6 dependent; 7 package; 8 housing)

Source: https://patents.google.com/patent/[US10648879B2](/patent/US10648879B2)/en and the granted PDF at https://patentimages.storage.googleapis.com/60/a4/2e/3db772e072a518/US10648879.pdf

Effective filing date is post-AIA (after 2013-03-16), so AIA 35 U.S.C. § 102(a)(1) and § 102(a)(2) govern. Only references with a qualifying date before 2016-02-22 (publication, or effective filing for § 102(a)(2)) can be prior art.

Claim 1 (the only independent sensor claim) requires, in substance:

  1. a first substrate and a second substrate, both semiconductor substrates;
  2. a movable plate disposed between (i) a first cavity recessed into the first substrate and (ii) a second cavity recessed into both the first and second substrates, with a top surface and movement perpendicular to it;
  3. the second substrate bonded to the first and including a fixed plate disposed over a third cavity recessed into the second substrate and under the movable plate to form a capacitor;
  4. the first substrate "consists [of] a single continuous semiconductor structure."

Dependents: cl. 2 via/isolation wall/isolation well; cl. 3 contoured fixed plate; cl. 4 contoured movable plate; cl. 5 edge spring structure; cl. 6 isolation layer at the bonding interface; cl. 7 package (cap + package substrate); cl. 8 housing with opening.


2. The seven examiner-cited references

The '879 patent's "Patent Citations (7)" list (per the Google Patents record) is the following. For each I give the citation, dates, a brief description, and a § 102 anticipation assessment. An important caveat up front: true § 102 anticipation requires a single reference to disclose every element of a claim. As shown below, the cited set is overwhelmingly § 103 (obviousness) art — several references each supply only part of claim 1. I flag the one reference that most plausibly approaches anticipation and needs full-text comparison.


Reference 1 — US 2009/0166772 A1

  • Full citation: U.S. Patent Application Pub. No. 2009/0166772 A1, "Micro-electro-mechanical systems (MEMS) device and process for fabricating the same," Hsieh et al., assignee Solid State System Co., Ltd. (granted as US 7,795,063 B2 on 2010-09-14).
  • Dates: filed 2007-12-31; published 2009-07-02.
  • Description: Surface-micromachined MEMS device (microphone/speaker/pressure sensor). A back-plate substrate with perforating holes; a first structural dielectric layer with an opening; an etch-stop layer; a second structural dielectric layer. The etch-stop layer plus the second structural dielectric layer form the diaphragm, which covers the opening to define a chamber between the diaphragm and the back-plate substrate. CMOS-compatible.
  • § 102 assessment: Does not anticipate claim 1 or any claim. It is a single-substrate surface-micromachined structure with a thin-film diaphragm and a back-plate, not (a) a movable plate at the bottom of a cavity recessed into the first substrate, (b) a second semiconductor substrate bonded to the first, or (c) a fixed plate over a third cavity recessed into the second substrate. Relevance is § 103/background — indeed the '879 specification discusses this class of surface micromachining (its FIG. 5) and its stiction/etch-material limitations.
  • Source: https://patents.google.com/patent/US20090166772

Reference 2 — US 2009/0218642 A1

  • Full citation: U.S. Patent Application Pub. No. 2009/0218642 A1, "Microelectromechanical systems component and method of making same," Miller et al., assignee Freescale Semiconductor, Inc.
  • Dates: filed 2008-02-29; published 2009-09-03.
  • Description: A dual-substrate MEMS microphone (MEMS component) in which one part of the MEMS structure is built on a standard semiconductor substrate and another part on a low-cost non-semiconductor substrate (polymer/laminate); the two are bonded (spacer + seal). The diaphragm is on one portion and the fixed electrode/plate on the other; SOI-based fabrication for the semiconductor portion is discussed, along with cap/overmold packaging.
  • § 102 assessment: Does not anticipate. It expressly bonds a semiconductor substrate to a non-semiconductor substrate, whereas claim 1 requires "the first substrate and the second substrate are both semiconductor substrates." The diaphragm is also not situated in a cavity recessed into the first substrate. Relevance is § 103 — dual-substrate capacitive MEMS and cost-reduction, plus possible relevance to cl. 7/8 packaging subject matter.
  • Source: https://patents.google.com/patent/US20090218642A1/en

Reference 3 — US 2011/0075865 A1

  • Full citation: U.S. Patent Application Pub. No. 2011/0075865 A1, "Dual Single-Crystal Backplate Microphone System and Method Of Fabricating Same," Yang & Chen, assignee Analog Devices, Inc. (granted as US 8,590,136 B2 and US 9,219,963 B2).
  • Dates: filed 2010-08-27 (priority 2009-08-28, provisional 61/238,014); published 2011-03-31.
  • Description: A MEMS microphone with a movable diaphragm sandwiched between two single-crystal (SOI) backplates, forming two variable capacitors; oxide isolation layers separate the diaphragm from each backplate; vias pass through a backplate and are insulated by oxide; a backside cavity provides a path for acoustic energy. Standoffs regulate the gap.
  • § 102 assessment: Does not fully anticipate claim 1. The '879 architecture recesses the movable plate inside a cavity of the first substrate and provides a fixed plate over a cavity in the second substrate; the Yang device instead sandwiches the diaphragm between two backplates that are not themselves disposed over a cavity recessed into a second substrate in the claimed manner. The disclosure is nevertheless the closest cited art on several structural concepts — bonded dual-substrate capacitive transducer, isolation/oxide layers at the bonding interface (cl. 6), and insulated vias (cl. 2) — making it strong § 103 material.
  • Source: https://patents.google.com/patent/US20110075865

Reference 4 — US 2011/0204745 A1

  • Full citation: U.S. Patent Application Pub. No. 2011/0204745 A1, "Acoustic sensor," assignee Omron Corporation.
  • Dates: published 2011-08-25.
  • Description: A capacitive acoustic sensor with a silicon substrate having a vertically piercing back chamber; a thin-film vibration electrode plate disposed opposite the upper opening of the back chamber; a fixed electrode plate opposed to it. A key point is closing the lower surface of the back chamber ("pouched shape") to prevent bonding adhesive from running up and sticking the diaphragm, and to improve rigidity/sensitivity.
  • § 102 assessment: Does not anticipate. The vibration plate sits on the substrate surface over the back chamber (single substrate); there is no bonded second semiconductor substrate and no fixed plate over a cavity in a second substrate. Relevance is § 103/background on back-chamber, stiction, and package-adhesive problems.
  • Source: https://patents.google.com/patent/US20110204745A1/en

Reference 5 — US 2011/0308324 A1

  • Full citation: U.S. Patent Application Pub. No. 2011/0308324 A1, "A sensor and method for fabricating the same," Sisira Kankanam Gamage.
  • Dates: filed 2010-06-18; published 2011-12-22.
  • Description: [Not verified in the available sources.] I was unable to retrieve this reference's specification/claims within the search budget; I therefore will not characterize its disclosure.
  • § 102 assessment: Cannot be determined from available data. This reference must be pulled in full text (e.g., USPTO Patent Public Search / Google Patents) before any anticipation or obviousness position is asserted. Do not rely on the title alone.

Reference 6 — US 9,170,164 B2 ⚠️ highest-priority reference

  • Full citation: U.S. Patent No. 9,170,164 B2, "Capacitive pressure sensor and a method of fabricating the same," Dieter Naegele-Preissmann (published as US 2014/0374858 A1).
  • Dates: filed 2012-02-03; granted 2015-10-27.
  • Description: [Not fully verified in available sources, but field-matched.] Same title theme and field as the '879 patent — a capacitive pressure sensor and its fabrication method. Notably, the sole inventor here, Dieter Naegele-Preissmann, is a named co-inventor of the '879 patent.
  • § 102 assessment: This is the most likely candidate for § 102 anticipation of claim 1 among the cited set, and it must be compared element-by-element against claim 1 (recessed movable plate; second cavity recessed into both substrates; fixed plate over a third cavity in the second substrate; both substrates semiconductor). I cannot assert anticipation with confidence because I did not retrieve its claims/disclosure. Two cautions:
    1. Inventor/common-ownership exception: because a named inventor of the '879 is common, a § 102(b) exception (e.g., § 102(b)(1)(A) or § 102(b)(2)(C)) may remove or limit its prior-art effect. This is a legal question — flag for counsel.
    2. The '879 and its sibling applications were all examined against this reference, so the prosecution history (the non-final and final rejections and the after-final response dated 2019 in the '879 file — see Legal Events: Non-Final 2019-03-19; Final 2019-09-04; Response-After-Final 2019-11-18; Allowance 2020-01-08) is the best guide to exactly how the applicant distinguished it.
  • Source: see citation list on https://patents.google.com/patent/US10648879B2/en ("Citations (7)") and https://patents.google.com/patent/[US11193843B2](/patent/US11193843B2)/en (family citation list).

Reference 7 — US 2016/0207756 A1

  • Full citation: U.S. Patent Application Pub. No. 2016/0207756 A1, "Substrate structure, semiconductor structure and method for fabricating the same," assignee Taiwan Semiconductor Manufacturing Co., Ltd.
  • Dates: filed 2015-01-16; published 2016-07-21.
  • Description: [Not verified in available sources.] The title indicates a semiconductor substrate/strutural fabrication disclosure rather than a capacitive pressure-sensing structure.
  • § 102 assessment — date caveat is material: its publication date (2016-07-21) is AFTER the '879 priority date (2016-02-22), so it is not § 102(a)(1) prior art by publication. It could only be prior art under § 102(a)(2) by virtue of its 2015-01-16 effective filing date (and subject to the § 102(b)(2) exceptions). On the available information it does not disclose the claimed capacitive pressure sensor architecture, so no anticipation of claim 1 is supportable; at most it is § 103 background on substrate/cavity processing.
  • Source: cited in the '879 "Citations (7)" list (URL above).

3. Bottom line

Reference Qualifies as prior art? § 102 anticipation of cl. 1? Role
US 2009/0166772 A1 (Solid State System) Yes (pub. 2009) No § 103 / background
US 2009/0218642 A1 (Freescale) Yes (pub. 2009) No (non-semiconductor 2nd substrate) § 103
US 2011/0075865 A1 (Analog Devices) Yes (pub. 2011) No (diaphragm sandwiched, not recessed) Strong § 103
US 2011/0204745 A1 (Omron) Yes (pub. 2011) No § 103 / background
US 2011/0308324 A1 (Gamage) Yes (pub. 2011) Unverified Retrieve full text
US 9,170,164 B2 (Naegele-Preissmann) Yes (granted 2015) — subject to § 102(b) inventor exception Possible — needs element-by-element test Closest art
US 2016/0207756 A1 (TSMC) Only under § 102(a)(2) (pub. is post-priority) No § 103 / date-limited

Assessment: On the available disclosures, none of the seven cited references anticipates claim 1 as a single reference; the cited set is best characterized as § 103 obviousness art that collectively teaches a bonded dual-substrate capacitive MEMS transducer (refs. 2, 3), a recessed-diaphragm/cavity geometry (ref. 6), and a fixed-plate-over-cavity/back-chamber arrangement (refs. 1, 4). The single reference most worth full-text comparison for § 102 is US 9,170,164 B2, both because it is field- and title-matched and because its inventor overlaps the '879 inventor list (raising a § 102(b) exception question). The dependent claims (2–6) map to the '879's own figures (FIG. 18 via/well; FIG. 8–10 contoured plate/diaphragm; FIG. 11–13 spring; FIG. 14 thick isolation layer), so an obviousness case on those dependents should target the same structural features.


4. Explicit limitations of this analysis (do not over-read it)

  1. Three of the seven references (5, 6, 7) were not retrieved in full text within the search budget; my characterizations of refs. 5 and 7 are title-level only, and my ref. 6 assessment is field-matched, not element-matched. Do not treat the § 102 conclusions for those three as settled.
  2. "Potential anticipation" is a technical first-pass screen, not a legal conclusion. Final § 102/§ 103 calls require the full claim charts, the '879 prosecution history (Office actions of 2019-03-19 and 2019-09-04 and the 2019-11-18 after-final response), and any § 102(b) exception analysis for commonly-invented references.
  3. Priority/publication dates are taken from the Google Patents record without auto-correction (e.g., ref. 7's post-priority publication date).
  4. Forward citations are not prior art. The "Cited By" item (CN 112153544 A) and the "Families Citing this family" entries (e.g., the Innogrity-related US 11,523,224 B2) are later documents and are excluded from the anticipation analysis above.

If you can supply the full text of US 9,170,164 B2 and US 2011/0308324 A1, I will produce an element-by-element § 102 claim chart for claim 1 and each dependent claim.

Generated 9/29/2026, 11:03:42 PM

Obviousness

Combinations of prior art that suggest the claimed invention would have been obvious under 35 U.S.C. § 103.

✓ Generated

I'll research the key prior-art references listed on the patent page to build a grounded § 103 analysis.

Let me research the remaining key cited references.

Obviousness Analysis — US 10,648,879 B2 under 35 U.S.C. § 103

Note on scope and confidence. This analysis builds on the previously generated patent and litigation summaries (which I treat as authoritative and do not repeat). Two caveats up front: (1) I exhausted my tool budget before I could pull full text for every reference listed on the patent page — I retrieved substantive text for US 9,170,164 B2, US 2011/0075865 A1, US 2009/0218642 A1, US 2011/0308324 A1 (and its US 8,569,851 B2 sibling), US 2016/0207756 A1, and US 7,998,777 B1. For the remaining references (notably US 2011/0204745 A1 (Omron), US 2009/0166772 A1, and most of the 19 "Family Cites Families" items) I rely on titles, abstracts, and general knowledge of the art, and I flag that explicitly. (2) A § 103 conclusion here is a hypothetical challenger's theory, not an adjudicated result — the claims issued over these very references after a final rejection and a response-after-final, and any invalidity theory must meet the clear-and-convincing standard.


1. Prior-art status of the references

The '879 patent has an effective filing date of 2016-02-22 (provisional 62/298,235). The AIA therefore governs. Under AIA § 102(a)(1)/(a)(2), the cited references qualify as prior art:

Reference Date AIA basis
US 9,170,164 B2 (Naegele-Preissmann) issued 2015-10-27 § 102(a)(1) — patented before EFD
US 2011/0075865 A1 (Analog Devices; granted counterpart appears to be US 8,590,136 B2) pub. 2011-03-31 § 102(a)(1)
US 2009/0218642 A1 (Freescale) pub. 2009-09-03 § 102(a)(1)
US 2011/0308324 A1 (Gamage / GE) pub. 2011-12-22 § 102(a)(1)
US 2016/0207756 A1 (TSMC) pub. 2016-07-21; priority 2015-01-16 § 102(a)(2) — effectively filed before EFD
US 2009/0166772 A1 (Solid State System) pub. 2009-07-02 § 102(a)(1)
US 2011/0204745 A1 (Omron) pub. 2011-08-25 § 102(a)(1)

Critically, US 9,170,164 B2 shares a named inventor with '879 (Dieter Naegele-Preissmann) — the '879 inventors built directly on their own earlier '164 disclosure. That is not a bar to using '164 as prior art (it issued before the EFD and is cited on the face of '879), but it strongly bears on motivation to combine, as discussed in § 7.


2. Two claim-construction questions that drive the whole analysis

Before mapping art, two limitations in claim 1 must be construed, because they determine how hard the claim is to invalidate:

(a) "the first substrate consists a single continuous semiconductor structure." This clause is drafted with non-standard grammar (a "consists" transitional phrase embedded mid-claim). Read in light of the specification, it most naturally means the first substrate is a bulk, monolithic semiconductor body — i.e., not an SOI stack, not a layer-transfer/bonded assembly, and not built up by deposition. This is consistent with the specification's stated cost motivation (the first substrate "can be formed with prime grade (device grade) wafer or test grade wafer") and with its criticism of SOI-based designs (its FIG. 4). This is the limitation most likely to carry whatever novelty the claim has, because most two-wafer MEMS designs in the field use SOI or bonded wafers (see § 4).

(b) "a second cavity recessed into the first substrate and second substrate." The plain reading is a cavity whose wall is defined by a recess in the first substrate and a recess in the second substrate — i.e., the sensing gap spans the bonded interface. If construed this narrowly, the reference set shrinks; if construed to merely require a gap that lies at the interface region, it is met by essentially any two-wafer capacitive transducer. A challenger should brief both constructions, because the broader reading makes the claim vulnerable to a single-reference-plus-common-knowledge theory.

I note these as constructions to be briefed; they are also potential § 112(b) pressure points that a challenger could raise to shift the construction in its favor.


3. Element-by-element mapping of claim 1

Claim 1 limitation Where taught
capacitive pressure sensor '164 (cap. pressure sensor for acoustic low-pressure); US 2009/0218642 (MEMS microphone); US 2011/0075865 (microphone)
first substrate; second substrate, both semiconductor '164 ("single crystal silicon as a base material"); US 2009/0218642 (semiconductor substrate 34); US 2011/0308324 (SOI/DSP silicon wafers)
movable plate between a first cavity recessed into the first substrate '164 (concave cavity formed by etching; diaphragm over it); US 2011/0308324 / US 8,569,851 ("diaphragm cavity extending through the first device layer"; "diaphragm over the diaphragm cavity")
…and a second cavity recessed into the first and second substrate '164 (cavity between plates formed across the bonded wafer pair); US 2011/0075865 (gaps on both faces of a sandwiched diaphragm)
movable plate has a top surface; moves perpendicular to it in response to pressure inherent to every cited capacitive pressure/microphone transducer (US 2009/0218642: "sense element 44 … movable relative to the reference element 36 in response to a pressure stimulus 54")
second substrate bonded to the first '164 (fusion bonding); US 2011/0075865 ("bonding the second backplate to the first wafer"); US 2009/0218642 (coupling substrate structures)
fixed plate over a third cavity recessed into the second substrate, under the movable plate, forming a capacitor '164 (back plate + cavity + extended back chamber); US 2009/0218642 (reference element 36 over cavity 32); US 2011/0075865 (second backplate with backside cavity)
first substrate = single continuous semiconductor structure contested — see § 4

On its face, every limitation except (a) is squarely disclosed by US 9,170,164 B2 alone or in trivial combination with conventional two-wafer MEMS practice. That is the central weakness of claim 1.


4. Grounds of rejection

Ground 1 (primary): US 9,170,164 B2 in view of US 2011/0075865 A1

'164 discloses a capacitive pressure sensor having a fixed "back plate" (its claim 1: "a fixed plate configured as a back plate … a movable plate configured as diaphragm … wherein a cavity is formed between the fixed plate and the movable plate"), an isolation layer between the fixed and movable plates, damping holes, a vent hole, and an extended back chamber. It expressly states "The capacitor's two plates may be fabricated using single crystal silicon as a base material," and that "the first wafer substrate is bonded with the second wafer substrate by fusion bonding." Its method forms a concave cavity by etching the first wafer and then forms the diaphragm from a second wafer that is ground down ("reducing the fourth layer … by grinding to form a layer of diaphragm"). This is, functionally, the recessed-diaphragm/two-wafer architecture of '879's FIG. 1.

US 2011/0075865 A1 supplies the two things '164 is least explicit about: (i) forming the second plate in a separate single-crystal wafer and transferring/bonding it ("bonding the second backplate to the first wafer such that the diaphragm is sandwiched between … the first backplate and the second backplate"), and (ii) electrical vias through the plate insulated by an oxide layer ("a first via configured to pass through the second backplate and electrically connect to the diaphragm, the first via being insulated from the second backplate by the first oxide layer"), plus a backside cavity and standoffs to set the gap.

Motivation to combine. Both are micromachined capacitive transducers in the identical field (low-pressure/acoustic sensing). They address the identical technical problems the '879 specification itself recites: residual stress and non-planar polysilicon plates, and leakage/parasitic capacitance. '164 states the problem and the single-crystal solution in terms ("single crystal silicon as a base material"); '586 provides the wafer-transfer fabrication route and the oxide-isolated via to the movable plate. Under KSR Int'l v. Teleflex, 550 U.S. 398 (2007), where a technique is known to improve one device in a field and a POSITA would recognize it would improve similar devices the same way, the combination is obvious. The '879 specification confirms the predictability: it states the design "produce[s] maximum change in capacitance" and is "compatible to any complementary metal oxide semiconductor (CMOS) process."

Reasonable expectation of success. Both references use fusion bonding and standard CMOS micromachining; there is no disclosed incompatibility. '164 itself produced a working recessed-cavity two-wafer sensor, so combining with '865's wafer-transfer bonding is a predictable assembly step.

Ground 2: Ground 1 further in view of US 2011/0308324 A1 (Gamage) / US 8,569,851 B2

Gamage discloses "a diaphragm cavity extending through the first device layer," "a second device layer … bonded to the top surface of the first device layer to form a diaphragm over the diaphragm cavity," and a vent cavity in a substrate wafer — with the substrate wafer being a "double side polished silicon wafer" (bulk). This reference is useful for two purposes: (i) it reinforces that bonding a recessed cavity wafer to a diaphragm-forming wafer to make a capacitive pressure sensor was conventional; and (ii) it supplies a bulk (non-SOI) silicon substrate wafer teaching relevant to the "single continuous semiconductor structure" element.

Ground 3 (the "single continuous semiconductor structure" limitation): Ground 1 or 2 + a bulk-wafer teaching

The only plausible non-obviousness hook is the "single continuous semiconductor structure" clause. A challenger should attack it on two fronts:

  1. Claim scope / breadth. If construed as "a bulk monolithic semiconductor wafer with an etched recess," then '164's "single crystal silicon as a base material," Gamage's "double side polished silicon wafer," and TSMC '756's "substrate 110 … silicon substrate" all teach it. The limitation then adds essentially nothing over the recited "semiconductor substrate."
  2. Obvious-to-substitute rationale. Even if most cited references use SOI or layer-bonded wafers, the design incentive to substitute a bulk prime/test-grade wafer for an SOI wafer is explicit in the '879 specification itself ("The first and second substrates … can be formed with prime grade (device grade) wafer or test grade wafer, both of which are cheaper than SOI wafer"). Cost-driven substitution of a known, functionally equivalent element is a textbook KSR rationale (design incentive / market force), and the '879 specification affirmatively concedes that SOI is unnecessary for the recited structure.

Net: the "single continuous semiconductor structure" clause is a weak distinguishing feature. It recites a well-known wafer type, and the specification supplies its own motivation to use it.

Ground 4 (alternative, for the whole of claim 1): US 2009/0218642 A1 + US 9,170,164 B2 + US 2011/0075865 A1

Freescale '642 discloses the two-substrate, movable-plate/fixed-plate/air-gap capacitor architecture at the highest level of generality: "diaphragm 44 … is a movable plate and plate 46 is a 'fixed' plate … of a variable capacitor," separated by "air gap 48," with "holes 50 … created in plate 46 … to allow sound waves to reach diaphragm 44," bonded substrate structures, and an acoustic cavity 52. Its stated object is cost reduction ("lower cost system solution"). Combined with '164 (recessed cavity + contoured backplate + isolation layer) and '865 (single-crystal second plate + oxide-isolated via), this yields all of claim 1. '642 supplies both the general architecture and the cost-based motivation to combine.


5. Dependent claims — mostly stronger invalidity positions than claim 1

Claim 2 (via + isolation wall + isolation layer → isolation well). This is the strongest § 103 ground in the patent. US 2011/0075865 A1 discloses precisely "a first via configured to pass through the second backplate … insulated from the second backplate by the first oxide layer," and '164 discloses an isolation layer between the plates and "electrical contacts … for minimizing the leakage current" and "back plate isolation." The two together read on a via surrounded by insulating material and an isolation layer — the "isolation well" of claim 2 is the natural structural result. Motivation: both references expressly target leakage-current reduction, which is the very problem claim 2 addresses.

Claim 3 (contoured fixed-plate surface following the deflection contour). US 9,170,164 B2 anticipates or renders this obvious essentially alone. '164 states: "This present design … forms the distance between the capacitance plates to follow the contour of the deflected diaphragm when the pressure is applied … achieved by the use of damping holes." That is the "contoured surface facing the movable plate … correspond[ing] to a deflection contour" of claim 3, verbatim in substance. Claim 3 is the single most exposed claim in the patent.

Claim 4 (contoured movable plate concaving away from the fixed plate). Needs art showing a contoured/corrugated diaphragm. The family-cited US 5,208,118 A (IC Sensors, "Semiconductor transducer or actuator utilizing corrugated supports") is a candidate for a corrugated/contoured diaphragm support, but I could not retrieve its full text in this run — flagged as lower confidence. A challenger would need to run down corrugated-diaphragm art (a well-developed body of work) to firm this up.

Claim 5 (spring structure near the diaphragm edge to reduce stress). Two supports. First, the '879 specification admits that "Spring structures for anchoring a diaphragm in a capacitive sensor can have various suitable forms." That is a specification admission that such structures were known and designable. Second, US 5,208,118 ("corrugated supports" for a semiconductor transducer) and the general MEMS anchoring art supply edge spring/flexure structures. Low-to-moderate confidence pending full-text review of the family-cited references.

Claim 6 (isolation layer at the bonding interface). Strongly obvious. US 2011/0075865 A1 discloses oxide layers physically and electrically separating the diaphragm from each backplate layer across a bonded stack; '164 discloses an isolation layer between the plates; US 2009/0218642 shows a bonded MEMS stack. Motivation: leakage current isolation, as the '879 specification itself reiterates.

Claim 8 (housing with an opening; movable-plate top surface fluidically connected to the exterior). This is the sensor-in-a-ported-package limitation. The '879 specification admits packages with pressure/sound ports as conventional (its FIGS. 3A-3B and accompanying text). The family-cited US 8,193,596 B2 (Solid State System, "MEMS package") and US 10,006,824 B2 (Invensense, "MEMS pressure sensor having a leakage path to a cavity") are relevant packaging art. Strong ground.


6. Claim 7 (the package claim)

Claim 7 adds: the claim-1 sensor; a cap enclosing it with an opening above it; and a package substrate, with the second substrate attached to the package substrate (i.e., a bottom-mount orientation, since the diaphragm is in the first substrate).

Every added element is conventional. The '879 specification concedes as much — it describes bottom-mount and top-mount packages with caps and pressure ports as known background (FIGS. 3A-3B; "Bottom-mount pressure sensors or top-mount pressure sensors can be applicable for different applications"). The '164 reference — same field, same inventor — describes a vent hole in the sensor structure providing a path to the environment, which is the functional equivalent of a cap opening. The family-cited packaged-MEMS references (US 8,193,596; US 10,006,824) supply sensor-mounting-to-substrate-and-cap environments. Motivation: mounting a MEMS die in a capped, ported package is the routine commercial form of any MEMS sensor; the only "choice" is which face is ported, which is a known design trade-off the specification itself frames as a mere application selection. Claim 7 is highly likely to fall in combination with any single package reference.


7. Consolidated motivation-to-combine case

A POSITA here would be a MEMS transducer engineer with experience in wafer bonding and capacitive sensor fabrication. The KSR factors all favor combination:

  1. Same field of endeavor / same problem. All primary references are micromachined capacitive pressure/acoustic transducers addressing leakage current, parasitic capacitance, stiction, residual stress, and sensitivity — the exact problems the '879 specification recites.
  2. Explicit teaching/suggestion in the references. '164 itself says both plates may be single-crystal silicon and that fusion bonding is used; '865 expressly teaches transferring a single-crystal plate wafer and oxide-isolating it — a suggestion to use single-crystal plates and wafer transfer.
  3. The inventor's own earlier work. '164 is the same inventor's prior design. A POSITA — and certainly the inventors — would treat '164 as the starting point and combine the conventional wafer-transfer improvements taught by '865. This is a strong, evidence-based combining motivation.
  4. Design incentives / market forces. The '879 specification concedes the two driving incentives: cheaper prime/test-grade wafers instead of SOI, and higher SNR. Cost reduction and performance improvement are recognized KSR rationales.
  5. Predictable results. Etching a recess in a bulk wafer, bonding a second wafer with a mating recess, forming a fixed plate over a backside cavity, and passivating the bond interface with oxide are each routine, well-characterized steps; the specification confirms CMOS compatibility.

There is no discernible teaching away in any reference. The '879 specification's argument that surface-micromachined designs (its FIG. 5) suffer stiction does not distinguish the cited art: '164, '865, and '324 all avoid wet-release stiction by using wafer-bonded cavities, so they point toward the '879 architecture, not away.


8. Rebuttal considerations a challenger must anticipate

  • Secondary considerations. The specification asserts "a SNR of above −70 dB" and lower cost. SNR is a result-effective variable, and the specification provides no comparative data against the closest art ('164), so nexus is weak. Cost savings are a KSR design incentive, not a secondary consideration. Expect the patentee to argue unexpected SNR, but the record appears to lack the comparative evidence to support it.
  • Presumption of validity / prosecution history. The examiner cited '164, '865, '642, '324, '756, etc., and still allowed the claims after a final rejection and a response-after-final — so the patentee will have narrowed (likely on the "single continuous semiconductor structure" clause) and will argue the claim as amended is patentably distinct. A challenger must show the narrowing clause is either met by the art or would have been obvious to add (see § 4, Ground 3).
  • Claim 1 vs. its family. Note that '879, US 10,488,288, US 11,156,519, and US 11,193,843 share the same 2016-02-22 priority and title. If the claim-1 limitations overlap family claims, an obviousness-type double patenting attack (a non-§ 103 ground, but a potent one where claims merely differ in scope without patentable distinction) may be available. This is worth evaluating alongside the § 103 theory.

9. Bottom line

Claim § 103 exposure Primary ground
1 Moderate — every element but the "single continuous semiconductor structure" clause is met by '164 + '865; that clause is a weak bulk-wafer recitation with an in-spec cost motivation '164 + '865 (+ '324 for bulk wafer)
2 High '164 + '865 (oxide-isolated via)
3 Very high (near-anticipated) '164 alone
4 Moderate–low (needs corrugated-diaphragm art; US 5,208,118 flagged, unverified) '164 + corrugated-diaphragm art
5 Moderate (specification admission; spring art) '164 + '118 / generic MEMS flexure art
6 High '164 + '865
7 High claim-1 ground + conventional cap/package art
8 High claim-1 ground + ported-package art

The single most vulnerable claim is claim 3, which the same-inventor '164 reference arguably anticipates outright ("forms the distance between the capacitance plates to follow the contour of the deflected diaphragm"). The single most vulnerable feature set for independent claim 1 is the pair of limitations "second cavity recessed into the first substrate and second substrate" and "first substrate consists a single continuous semiconductor structure" — both of which are either met by, or obvious to adopt in view of, the cited art and the specification's own admissions.

Where the theory is weakest / needs more work: (i) I could not verify with full text whether US 2011/0075865's or Gamage's first substrate is a monolithic bulk body (necessary for a clean § 103 read on the "single continuous semiconductor structure" clause); and (ii) claims 4 and 5 depend on corrugated-diaphragm and spring-anchor art I did not fully retrieve. Both gaps should be closed with full-text retrieval before reliance. No contradiction with the previously generated sections was found — this analysis is consistent with the earlier observation that the "single continuous semiconductor structure" clause is the claim's point of novelty and its principal litigation risk.

Generated 9/29/2026, 11:04:11 PM

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