Invalidity dossier

US 9077653

Added 9/23/2026, 5:30:15 PM

At a glanceNo PTAB challengesNo litigation on file

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Patent summary

Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.

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Patent Overview: US 9,077,653 B2

Title: Interconnect system and method for ethernet networks

Patent number: US 9,077,653 B2
Application number: US 14/167,441
Publication (grant): July 7, 2015
Filing date: January 29, 2014
Priority date (stated as an assumption): February 18, 1997
Inventor: Stuart B. Berman
Original assignee: Emulex Corp
Current assignee (listed): Avago Technologies International Sales Pte Ltd
Legal status: Expired – Fee Related; adjusted expiration listed as 2017-02-20

Plain-language scope (from the supplied excerpt): The patent concerns an interconnect system and method for Ethernet networks. The excerpt's prior-art keywords—port, route, data, fabric, frame—indicate subject matter directed to routing data frames between ports across a fabric. Classifications listed include packet switching elements and peripheral/input-output ports (H04L49/00, H04L49/30); routing and path finding, including route fault recovery and address table lookup/filtering (H04L45/28, H04L45/74, H04L45/745); traffic control including flow control, congestion control, QoS/priority-aware handling, and buffer-occupancy-based flow control (H04L47/10, H04L47/24, H04L47/30, H04L47/805); Ethernet-adapted switches (H04L49/35, H04L49/356); and fault recovery in optical transmission systems (H04B10/03).

What the excerpt does not establish: The supplied text omits the abstract, specification, drawings, and the full text of the claims. It therefore does not establish the claimed invention's precise scope, the number or content of claims, the specific technical problems addressed, or the embodiments disclosed. It also does not substantiate the 1997 priority date (expressly labeled an assumption), the reason for the 2017 adjusted-expiration entry, or the accuracy of the listed assignees. The granted date and later reassignment/security-interest entries are recorded events in the source, not legal conclusions. No prior-art comparison or validity assessment is made here.

Source: https://patents.google.com/patent/US9077653/en

Generated 10/1/2026, 9:43:33 PM

Cases on file (0)

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Litigation summary

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Proceedings on file (0)

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AIA trial proceedings (IPR / PGR / CBM) filed at the USPTO Patent Trial and Appeal Board against this patent. Sourced from the USPTO Open Data Portal and refreshed every six hours; each proceeding number deep-links to the PTAB E2E docket.

No PTAB proceedings on file. This patent has not been challenged via IPR, PGR, or CBM. The absence is itself a signal — well-asserted patents eventually attract IPRs. The LLM analysis below may surface filings the ODP feed hasn’t indexed yet.

PTAB challenges

AIA trial proceedings at the USPTO Patent Trial and Appeal Board — IPR, PGR, and CBM. Petitioners, judge panels, claim-level invalidation outcomes from Final Written Decisions, and Federal Circuit appeals. The single most important defensive datapoint after litigation history.

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Assignment history

Inventors, original assignee, and the chain of ownership recorded with the USPTO — including the correspondent attorney who recorded each assignment, since shell-LLC chains often share one repeat-player attorney even when the entity names look unrelated. Surfaces NPE / patent-troll patterns: shell-entity transfers, known asserters in the chain, repeat correspondent fingerprints, pre-litigation assignments, and bankruptcy fire-sales.

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Prior art

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Obviousness

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Extensions

Patent term adjustments, term extensions, continuations, divisionals, family members, and expiration dates.

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Derivative works

Defensive disclosure: derivative variations of each claim designed to render future incremental improvements obvious or non-novel.

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