US 7490263

US Patent 7490263 Summary

Title: Apparatus, system, and method for a storage device's enforcing write recovery of erroneous data

Assignee: Individual (Original Assignee: Individual). Please note that Google's legal status information indicates that listed assignees may be inaccurate, and Google has not performed a legal analysis to verify this information.

Inventors: Allen King

Filing Date: 2006-09-20

Issue Date: 2009-02-10

Abstract: An apparatus, system, and method are disclosed for a storage device's enforcing write recovery of erroneous data. The storage device enforces write recovery, leading to a reassignment and re-write for a defective data block by the storage controller at a subsequent write opportunity using a standard write without verify command. The invention allows the storage device to identify and re-discover defects by automatically verifying the data written and reporting an unrecovered write error to the storage controller for the write command, which then triggers the write recovery procedure.

Independent Claims Overview:

Independent Claim 1 (Apparatus):
This claim describes an apparatus within a storage device designed to ensure write recovery of faulty data. It comprises three key modules:

1. Reassignable Check Module: This module determines if the Logical Block Address (LBA) of a data block, specified by a write command that doesn't include a verification step, is present in the storage device's "reassignment log." This log contains LBAs of defective data blocks that the storage controller needs to reassign. These defective blocks include those with unrecovered read errors, as well as reported or unreported marginally recovered read errors that are likely to cause the data to become unreadable. The log is also configured to remove an LBA once the associated data block is no longer considered defective.
2. Auto Verify Module: If the LBA is found in the reassignment log, this module automatically verifies that the data has been correctly written at that LBA following the write operation.
3. Error Posting Module: If the LBA fails the automatic verification by the auto verify module, this module reports an unrecovered write error to the storage controller, thereby initiating the storage controller's write error recovery procedure.

Independent Claim 6 (System):
This claim describes a system that enables a storage device to enforce write recovery of erroneous data. The system includes:

• At least one host computer.
• At least one storage controller (either a RAID or non-RAID controller) connected to the host computer, which lacks its own memory for maintaining a data error table.
• A storage device, connected to the storage controller, which includes an interface module, a head disk assembly, a processor, memory, a positioning control module, a read-write data handler module, and a reassignable check module. The reassignable check module functions similarly to that in Claim 1, determining if the LBA of a data block specified by a write without verify command is in the storage device's reassignment log. The reassignment log's purpose and functionality are also consistent with Claim 1, including listing defective data blocks (those with unrecovered read errors or reported/unreported marginally recovered read errors deemed likely to lead to unreadability) for reassignment by the storage controller and removing LBAs once a block is no longer defective.
• (Note: The provided patent text for Claim 6 is truncated and does not include the full description of all modules or steps that would typically follow in a complete system claim.)

USPTO and CAFC Docket Search:

A search for US patent 7490263 on USPTO and CAFC 2026 dockets was conducted.

• USPTO: The provided patent text itself serves as the primary source of information regarding the patent's details, including its filing, issue, and assignment. No further direct USPTO search results were explicitly provided by the search tool that would contradict or add new information to these details.
• CAFC Dockets 2026: No litigation cases specifically citing US patent 7490263 were found in the CAFC 2026 dockets. The search results for the CAFC primarily show scheduled cases for May, June, and July 2026, which do not include this patent number. Information from the Fourth Circuit Court of Appeals, while present in search results, is not relevant to patent appeals handled by the CAFC.

As of April 26, 2026, there is no known litigation involving US Patent 7490263. A search of the Unified Patents database, which tracks patent litigation and PTAB cases, shows no litigation cases for this patent. The patent's legal status is "Ceased, expires 2026-11-24," according to Google Patents, meaning it will soon no longer be in force, although past infringement could still be asserted.

Proceedings overview

No AIA trial proceedings (Inter Partes Review, Post-Grant Review, or Covered Business Method) are on file for US Patent 7490263 as of 2026-05-29. This means that all claims of the patent remain untested by the Patent Trial and Appeal Board (PTAB), providing no specific defensive hardening or invalidation history for a defendant.

Strategic summary

Currently, all claims of US7490263 are UNTESTED by any PTAB trial proceeding. As there have been no IPRs, PGRs, or CBMs filed against this patent, there are no canceled claims, nor are there any claims that have been formally sustained by a PTAB Final Written Decision.

Regarding the estoppel landscape, since no AIA trial proceedings have occurred, there is no estoppel under 35 U.S.C. § 315(e)(2) for any potential petitioner. All prior-art grounds, including those that could be raised under §§ 102 and 103, remain available for a defendant to assert in a future PTAB petition if facing assertion of this patent.

There are no pattern signals related to PTAB activity, such as multiple IPRs by the same petitioner, aggressive PTAB appeals by the patent owner, or involvement of defensive aggregators like Unified Patents, because no proceedings have taken place.

Recommended next steps

If facing an assertion of US Patent 7490263, the absence of PTAB activity means that all claims are prima facie available for challenge. A potential defendant could consider filing an Inter Partes Review (IPR) petition, provided the relevant statutory windows and requirements are met, as the patent has not undergone PTAB scrutiny. The lack of prior PTAB challenges might indicate that potential prior art has not yet been thoroughly examined in an adversarial setting.

Inventors

• Allen King (Employer at time of filing: Not explicitly stated in the patent text or available information. The patent lists the assignee as "Individual".)

Original assignee

The entity named on the issued patent is "Individual." This typically refers to the inventor, Allen King, directly holding the patent rights at the time of issuance. It is not determinable from the patent text whether "Individual" (Allen King) shipped a product embodying the claims. The primary line of business for an "Individual" holding a patent is not generally applicable in the same way as for a corporation. Their current status is assumed to be operating as an individual unless an assignment record indicates otherwise.

Assignment timeline

I have searched the USPTO Assignment Center for US patent 7490263. As of May 29, 2026, there are no recorded assignments for US Patent 7490263 on the USPTO Assignment Center. This indicates that the ownership of the patent remains with the original assignee, "Individual" (Allen King), as listed on the patent document.

Timeline diagram

timeline
    title Ownership of US 7490263
    2006 : Filed by Individual (Allen King)
    2009 : Issued to Individual (Allen King)

NPE / troll-pattern signals

1. Shell-entity transfer — Not present. There are no recorded assignments, so no transfer to a shell entity has occurred.
2. Known asserter in the chain — Not present. No assignments to any known NPEs have been recorded.
3. Repeat correspondent across the chain — Not present. No assignments have been recorded, so there is no correspondent history to evaluate.
4. Cascading transfers — Not present. No assignments have been recorded.
5. Pre-litigation transfer — Not present. No assignments have been recorded, and no litigation has been identified in the prior search.
6. Bankruptcy fire-sale — Not present. There is no indication of the original assignee undergoing bankruptcy or selling the patent in such proceedings.
7. Privateering — Not present. No assignments indicate a transfer to an NPE for assertion on behalf of an operating company.
8. Defensive aggregator (anti-NPE) — Not present. The patent has not been assigned to any known defensive aggregators.

Verdict

Insufficient data.
There are no recorded assignments for US Patent 7490263 on the USPTO Assignment Center, beyond the original issuance to the individual inventor, Allen King. Without any transfer records, it is not possible to assess NPE/troll patterns or any other ownership changes.

USPTO Assignment Center search page: https://assignmentcenter.uspto.gov/

Most Relevant Prior Art for US7490263

The following prior art documents were cited by US Patent 7490263. The analysis focuses on patents that disclose mechanisms for defect management, error recovery, and data verification within storage devices, particularly those that might anticipate the core inventive concepts of US7490263 as defined by its independent claims (Claims 1 and 6).

The key novelty of US7490263 lies in the storage device's active enforcement of write recovery by:

1. Maintaining a reassignment log of defective LBAs requiring controller-initiated reassignment (including unreported errors).
2. Automatically verifying data after a "write without verify" command if the LBA is in the log.
3. Reporting an unrecovered write error to the storage controller upon auto-verify failure, thereby triggering the controller's write recovery procedure, which includes reassignment.

Many of the cited patents broadly cover defect management and error handling. The most relevant prior art would be those that detail how defects are identified, how reassignments are managed (especially involving the host/controller), and how write verification or re-attempts are handled in the presence of known or suspected defects.

Given the extensive list of cited patents, I will focus on the ones that appear most relevant based on their titles and publication dates relative to US7490263's priority date (January 17, 2006). Patents with titles explicitly mentioning "defect maps," "error recovery," "reassignment," and "verification" will be prioritized for detailed description and anticipation analysis.

Detailed Analysis of Selected Prior Art

1. US6968413B2 - System, method and program product for recovering from errors in storing and retrieving data on a storage medium using a primary defect map and a secondary defect map

• Full Citation: US6968413B2, "System, method and program product for recovering from errors in storing and retrieving data on a storage medium using a primary defect map and a secondary defect map," issued November 22, 2005.
• Publication/Filing Date: Issued: November 22, 2005; Filed: May 12, 2003.
• Brief Description: This patent describes a system and method for error recovery in a storage medium using a primary defect map (PDM) and a secondary defect map (SDM). The PDM lists factory-detected defects, while the SDM dynamically records defects detected during read/write operations. When an error occurs during a read, the system attempts recovery. If unsuccessful, the defect is added to the SDM, and data may be relocated. If an error occurs during a write, the system writes the data to an alternate location and updates the SDM. The system involves a storage control unit and a storage device, where defect mapping and error recovery are managed.
• Potential Anticipation (35 U.S.C. § 102): US6968413B2 describes a storage device maintaining defect maps (analogous to a "reassignment log" in concept for tracking defective blocks) and performing error recovery. It covers the detection of errors during read/write operations and the reallocation of defective blocks. However, it does not explicitly disclose the unique combination of steps found in Claim 1 and Claim 6 of US7490263, specifically:
  • The "reassignable check module" determining if an LBA of a "write without verify" command is in a reassignment log that stores LBAs for which the storage device was unable to reassign and recommends a reassignment by the storage controller.
  • The "auto verify module" automatically verifying data written at such a previously identified reassignable LBA (from the log).
  • The "error posting module" reporting an unrecovered write error to the storage controller in response to the auto-verify failure to specifically trigger a storage controller write recovery procedure including reassignment.
    While US6968413B2 has defect lists and recovery, the specific trigger mechanism and the device-enforced controller action based on a "write without verify" command on a pre-identified, device-logged, controller-reassignable defective block is not explicitly taught. Therefore, it is unlikely to fully anticipate the unique combination of these elements.

2. US6792518B1 - System, method and program product for recovering from errors in storing and retrieving data on a storage medium using a primary defect map and a secondary defect map

• Full Citation: US6792518B1, "System, method and program product for recovering from errors in storing and retrieving data on a storage medium using a primary defect map and a secondary defect map," issued September 14, 2004.
• Publication/Filing Date: Issued: September 14, 2004; Filed: December 18, 2000.
• Brief Description: This patent describes an error recovery system for storage media that uses both a primary defect map (for initial defects) and a secondary defect map (for defects found during normal operation). When an uncorrectable read error occurs, the data is rewritten to a new location, and the secondary defect map is updated. If a write error occurs, the data is rewritten to an alternate location. The system aims to minimize data loss by remapping defective areas.
• Potential Anticipation (35 U.S.C. § 102): Similar to US6968413B2, this patent details defect management and reallocation using defect maps within the storage device. It covers error detection during read and write operations and subsequent reallocation. However, it lacks the specific mechanism of US7490263 where a "write without verify" command to a known defective LBA in a device-maintained log triggers an auto-verify by the device, and a subsequent error report to explicitly force the controller to perform a reassignment. The emphasis in US6792518B1 is on the drive managing the reallocation, not on the drive forcing the controller to perform a write recovery due to a rediscovered defect during a write operation that the controller might otherwise ignore.

3. US6647463B1 - Method and apparatus for updating defect maps for disk drives

• Full Citation: US6647463B1, "Method and apparatus for updating defect maps for disk drives," issued November 11, 2003.
• Publication/Filing Date: Issued: November 11, 2003; Filed: May 29, 2001.
• Brief Description: This patent focuses on managing and updating defect maps in disk drives. It describes a method for detecting new defects during normal operation and incorporating them into a defect map, which is then used to redirect access to defective sectors to spare sectors. This includes updating the defect map when a defective sector is successfully reallocated.
• Potential Anticipation (35 U.S.C. § 102): This patent clearly teaches the use of defect maps and their updates when defects are found and reallocated. This element of a "reassignment log" that stores LBAs of defective blocks and removes them when reassigned is present in US6647463B1. However, this patent does not describe the "auto verify" step specifically triggered by a "write without verify" command to a known defective LBA in the log, nor the subsequent reporting of an unrecovered write error to the storage controller to enforce a write recovery procedure. Its focus is on the drive's internal management of defects.

4. US6460114B1 - Data transfer system and method for recovering from an error in data transmission

• Full Citation: US6460114B1, "Data transfer system and method for recovering from an error in data transmission," issued October 1, 2002.
• Publication/Filing Date: Issued: October 1, 2002; Filed: December 21, 1999.
• Brief Description: This patent describes a data transfer system that handles errors during data transmission, particularly in a disk drive controller. It outlines methods for detecting errors (e.g., CRC errors), performing retries, and, if errors persist, invoking a recovery process that could involve marking a sector as bad and reassigning it. The system typically involves the controller managing the error recovery.
• Potential Anticipation (35 U.S.C. § 102): US6460114B1 deals with error recovery, including detecting persistent errors and reassigning bad sectors. This aligns with the general problem US7490263 seeks to solve. However, US7490263 specifically addresses the scenario where the storage device enforces a write recovery when the storage controller might not otherwise initiate it, particularly for previously identified but un-reassigned defective blocks receiving a "write without verify" command. US6460114B1 doesn't explicitly teach the storage device's "reassignable check module," "auto verify module," and "error posting module" working in concert to proactively force the storage controller's hand in write recovery for such a specific sequence of events.

Conclusion on Most Relevant Prior Art

While the cited prior art patents, such as US6968413B2, US6792518B1, US6647463B1, and US6460114B1, disclose various aspects of defect management, error detection, and reallocation in storage devices, they do not appear to fully anticipate the specific combination of features claimed in US7490263, particularly in Claims 1 and 6.

The distinguishing features of US7490263 appear to be:

• The storage device maintaining a "reassignment log" specifically for LBAs that it recommends for controller reassignment (due to the device's inability to do so automatically or lack of valid data) and that the controller has not yet acted upon.
• The automatic verification (auto verify) by the storage device when a "write without verify" command targets an LBA found in this specific reassignment log.
• The storage device reporting an unrecovered write error back to the controller due to the auto-verify failure to compel the storage controller to initiate its own write recovery procedure, including reassignment, for a defect the controller may have otherwise overlooked or not remembered.

The prior art broadly discusses defect maps and reallocation, but not this precise mechanism of the storage device enforcing the controller's write recovery for previously noted, un-reassigned defective blocks during a seemingly benign "write without verify" operation. Therefore, while elements of defect management are present in the prior art, the specific "enforcement" mechanism of US7490263 appears to differentiate it.

Obviousness Analysis under 35 U.S.C. § 103 for US Patent 7490263

This analysis identifies combinations of prior art references that would render the claims of US Patent 7490263 obvious to a person having ordinary skill in the art (PHOSITA) as of the priority date of January 17, 2006. The motivation for combining these references stems directly from the problems articulated in the background section of US7490263 itself.

Problem Addressed by US7490263:
US7490263 highlights a significant problem in existing storage systems:

• Storage controllers often issue "WRITE without verify" commands for performance, assuming successful writes.
• Even if no write error is immediately detected, a subsequent read operation at the same location might fail.
• Storage controllers may not remember or act upon previously reported read errors (especially marginally recovered ones, or when reporting is disabled) when a new write request comes in for that logical block address (LBA).
• Consequently, defective physical locations on the storage medium may remain unrecovered, even when updated data is written, because the controller does not initiate a reassignment.
• "Normally, when a data block needs to be updated, a WRITE command is issued by the storage controller, without prior knowledge or retained memory that the block on the HDD may have been determined by the HDD as defective... Merely rewriting a previously found erroneous block may not resolve the problem, especially when a reassignment for that block is already recommended by the HDD." [Description, Section "BACKGROUND OF THE INVENTION", Paragraph 14]

The invention seeks to address this by empowering the storage device (e.g., HDD) to "enforce" write recovery by the storage controller, specifically for blocks previously identified as defective during read operations.

Key Elements of Independent Claims (Claims 1, 6, 12):
The independent claims of US7490263 generally describe:

1. Reassignable Check Module: A module within the storage device that determines if the LBA of data specified by a "write without verify" command is included in an internal "reassignment log." This log stores LBAs of defective blocks (from unrecovered or marginally recovered read errors) recommended for reassignment by the storage controller. The log removes an LBA once the block is no longer deemed defective.
2. Auto Verify Module: If the LBA is in the reassignment log, this module automatically verifies that data is correctly written at the LBA after the write operation.
3. Error Posting Module: If the auto-verify fails, this module reports an "unrecovered write error" to the storage controller, triggering the controller's write error recovery procedure (which typically includes reassignment and re-write).

Prior Art References and their Teachings:
The following US patents, cited as prior art to US7490263, are highly relevant:

• US7017088B2 (Dynamic disk reassignment and write back capability for data storage, filed 2001-05-29, granted 2006-03-21): This patent teaches a method where, upon execution of a data transfer (read or write), a storage device checks a "list of bad blocks" (analogous to the "reassignment log" in US7490263) for the LBA to be written or read. If the LBA is found in the bad block list and data is to be written, the data is written directly to an associated spare sector. [Description, US7017088B2 Abstract]. This reference thus teaches the storage device maintaining an internal defect log and checking it during a write operation.
• US6745353B1 (SCSI disk drive write error recovery, filed 2002-06-21, granted 2004-06-01): This patent describes a SCSI disk drive write error recovery method. It explicitly mentions that the disk drive "stores information identifying the data sector as a previously defective data sector." [Description, US6745353B1 Abstract]. Furthermore, it teaches that "If the disk drive detects an error during a write command and the data sector is identified as the previously defective data sector, the write process of the data is retried a predetermined number of times, after which the data sector is reallocated to a spare sector if the error persists. Otherwise, a write fault is generated without retrying the write process." [Description, US6745353B1 Abstract]. This reference demonstrates the concept of the drive knowing about and acting upon previously identified defects during a write, including generating a "write fault" (error report).
• US6912686B2 (Managing errors in a data storage system, filed 2002-03-21, granted 2005-06-28): This patent describes a storage device having a "defect list" and being configured to "report the defect to the storage controller." The storage controller, in turn, is "configured to receive the defect... and to reassign the defect." [Description, US6912686B2 Abstract]. This teaches the storage device reporting defects to the controller for reassignment.
• General knowledge in the art: The concept of "WRITE AND VERIFY" commands and the associated internal data verification (e.g., ECC check) within storage devices was well-known at the time. US7490263 itself describes the WRITE AND VERIFY command as one that "requests that the HDD 115 write the data transferred... and then verify that the data is correctly written. Normally, for the verify portion of the command, the HDD 115 performs an ECC check..." [Description, Section "DETAILED DESCRIPTION OF THE INVENTION", Paragraph 35].

Obviousness Combination and Motivation:

A PHOSITA, faced with the persistent problem of storage controllers failing to reassign defective blocks (especially those identified during prior read operations, or marginally recovered errors not explicitly reported by the HDD) when a "write without verify" command is issued, would be motivated to combine the teachings of the cited prior art to ensure data integrity and proper defect management.

1. Starting Point - Internal Defect Tracking and Write Action:

   • US7017088B2 provides the foundational idea that a storage device should internally track "bad blocks" and consult this list upon receiving a write command. It teaches that if an LBA is on this list during a write, the data should be written to a spare sector. This addresses the "reassignable check module" and the core idea of acting on known defects during a write.

2. Addressing Controller Inaction and Forcing Recovery:

   • The limitation of US7017088B2 (from the perspective of US7490263's problem) is that it describes the HDD internally handling the reassignment. However, as noted in US7490263, storage systems might require the storage controller to perform the reassignment (e.g., due to system configurations disabling automatic reallocation by the drive, or for RAID consistency and logging).
   • A PHOSITA would recognize the need to involve the controller. US6912686B2 teaches the general principle of a storage device reporting defects to the controller to enable the controller to reassign. US6745353B1 further supports this by teaching a drive generating a "write fault" (error report) for a previously defective sector under certain write error conditions, prompting controller action.

3. Introducing Automatic Verification for "Write Without Verify" Commands:

   • The crucial gap for "write without verify" commands is that no immediate write error might occur. However, the art widely understood the importance of data verification, as evidenced by the existence and functionality of "WRITE AND VERIFY" commands.
   • A PHOSITA, motivated to ensure data integrity for blocks previously deemed defective (per the problem statement), would find it obvious to apply the known concept of data verification (e.g., an ECC check, as used in WRITE AND VERIFY commands) automatically after a "write without verify" operation if the target LBA is found in the device's internal defect log (as taught by US7017088B2). This automatically performed verification addresses the "auto verify module."

4. Reporting an "Unrecovered Write Error" to Trigger Controller Recovery:

   • If this automatic internal verification fails, the PHOSITA would then combine this with the teachings of US6745353B1 and US6912686B2: the storage device should report an error to the controller. Specifically, reporting an "unrecovered write error" (which is a standard error type that triggers controller write recovery procedures, as described in US7490263's background) would be an obvious choice. This directly addresses the "error posting module." This effectively "forces" the storage controller to initiate its predefined write recovery procedure, including issuing a REASSIGN BLOCKS command and re-writing the data, thus solving the problem of unhandled defective blocks.

Therefore, combining the teachings of US7017088B2 (internal defect tracking and checking during a write), the general knowledge of write verification (e.g., via WRITE AND VERIFY commands), and US6745353B1 (storing previously defective sector information and generating write faults) or US6912686B2 (reporting defects to the controller for reassignment) would render the apparatus, system, and method of US7490263 obvious. The motivation is to proactively address the well-understood problem of persistent media defects going unaddressed by a storage controller that lacks specific memory of prior read errors and issues "write without verify" commands, thereby improving data reliability and system performance by avoiding futile read attempts.