Invalidity dossier

US 7263457

System and method for operating components of an integrated circuit at independent frequencies and/or voltages

Current assignee: MediaTek Inc

Added 9/23/2026, 10:22:51 PM

At a glanceNo PTAB challengesNo litigation on file

Active provider: DeepSeek · deepseek-flash

Patent summary

Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.

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Patent Overview — US7263457B2

Title: System and method for operating components of an integrated circuit at independent frequencies and/or voltages

Patent number / application: US7263457B2; Application US11/325,054

Inventors: Scott A. White, William A. Hughes, Philip E. Madrid

Original assignee: Advanced Micro Devices, Inc. (current assignee listed as MediaTek Inc.)

Dates: Priority/filing date 2006-01-03; publication date 2007-08-28; anticipated expiration 2026-01-03 (status listed as "Expired - Lifetime")

Purpose: The invention addresses power and thermal management in integrated circuits. The excerpt notes that conventional ICs commonly connect internal supply lines so cores operate at a common voltage, and that temperature sensors are typically located off-chip, requiring conservative package-temperature estimates that may trigger unnecessary system shutdowns or nuisance trip-point warnings.

Plain-language scope: According to the excerpt, a processor or other IC may include multiple logic cores, each configurable to operate at frequencies and voltages independently of the others. Each core may run at a particular voltage and frequency regardless of whether other cores run at the same values. Operating voltage and frequency may be adjusted for power management and temperature management—for example, lowering frequency and/or voltage on one or more cores to save power or to reduce heat when a current temperature approaches a predetermined maximum operating temperature. The IC may also include bridging, routing, or common logic (e.g., a Northbridge) with separate interfaces to route communication between multiple logic cores and external subsystems. Such common bridge logic may communicate with each logic core using a different voltage level and/or clock frequency, may itself operate at voltages and frequencies independent of the cores, and adjusting its voltages/frequencies may be part of changing core operating characteristics.

The excerpt also relates to classifications G06F1/32 and G06F1/324 (power saving by lowering clock frequency) and G06F1/3296 (power saving by lowering supply or operating voltage).

Source: https://patents.google.com/patent/[US7263457](/patent/US7263457)/en

What the excerpt does not establish: It does not provide the full claims, detailed embodiments, or all figures; it does not establish validity, enforceability, or the precise scope of any claim. Ongoing text was noted as omitted.

Generated 10/1/2026, 9:33:29 PM

Cases on file (0)

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Litigation summary

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Proceedings on file (0)

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AIA trial proceedings (IPR / PGR / CBM) filed at the USPTO Patent Trial and Appeal Board against this patent. Sourced from the USPTO Open Data Portal and refreshed every six hours; each proceeding number deep-links to the PTAB E2E docket.

No PTAB proceedings on file. This patent has not been challenged via IPR, PGR, or CBM. The absence is itself a signal — well-asserted patents eventually attract IPRs. The LLM analysis below may surface filings the ODP feed hasn’t indexed yet.

PTAB challenges

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Assignment history

Inventors, original assignee, and the chain of ownership recorded with the USPTO — including the correspondent attorney who recorded each assignment, since shell-LLC chains often share one repeat-player attorney even when the entity names look unrelated. Surfaces NPE / patent-troll patterns: shell-entity transfers, known asserters in the chain, repeat correspondent fingerprints, pre-litigation assignments, and bankruptcy fire-sales.

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Prior art

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Obviousness

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Extensions

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Derivative works

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