Invalidity dossier
US 7061414
Optical digital-to-analog converter
Current assignee: Nokia of America Corp
Added 9/23/2026, 11:00:45 PM
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Patent summary
Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.
Patent Overview — US 7,061,414 B2
Title: Optical digital-to-analog converter
Patent number: US 7,061,414 B2 (application US 10/771,089; preprint publication US 2005/0168364 A1)
Inventors: Young-Kai Chen, Andreas Leven, Kun-Yii Tu
Original assignee: Lucent Technologies Inc. (current assignee listed as Nokia of America Corp)
Dates: Filed 2004-02-03; priority 2004-02-03; granted/published 2006-06-13; anticipated expiration 2024-02-03; status "Expired – Lifetime"
Purpose: The invention relates to optical waveform generation, specifically converting digital signals into analog optical signals. Digital-to-analog converters are described as key elements in electronic and photonic signal processing and data transmission, where digital data must be converted to analog form for processing and/or transmission. Stated advantages of optical implementation include high-speed clocking and signal sampling, wide bandwidth, and light-weight components; a high-speed arbitrary analog waveform generator can be built from a very high-speed D/A converter.
Plain-language scope (from the excerpt): A continuous-wave (or pulsed) laser signal is split into a plurality (N, at least two; typically four to eight) of mutually coherent optical beams, preferably by a multimode interference (MMI) coupler. Each beam is phase-shift modulated by bits (control signals) of a digital data sequence, using direct or external phase-shift modulation (e.g., Mach-Zehnder), in InP, GaAs, or LiNbO3. The phase-shifted beams are recombined in an optical combiner (e.g., MMI coupler) and detected by a linear photodiode, producing a photocurrent whose level depends on the applied control voltages, yielding up to 2^N output current levels and thus an analog signal. Variants add a processor (FIG. 2) or a pulsed laser with clock/memory aligned to the data repetition rate (FIG. 3) for a substantially jitter-free output; a fourth embodiment is mentioned but its details are not in the excerpt.
Source: https://patents.google.com/patent/US7061414/en
Not established by this excerpt: the full text of the claims and their exact scope; the fourth embodiment's details; the omitted portions of the description; and any litigation, ownership transfer, validity, or prior-art matters (not researched per instruction).
Generated 10/1/2026, 9:33:01 PM
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Assignment history
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Prior art
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