US 6859891

Patent Overview — US6859891B2

Title: Apparatus and method for shadowing processor information

Patent number: US6859891B2
Application number: US09/410,606
Inventor(s): David Alan Edwards; Margaret Rose Gearty; Bernard Ramanadin; Anthony Willis Rich
Assignee (as listed): STMICROELECTRONICS Ltd (original and current assignee per the supplied page)
Priority/filing date: 1999-10-01
Publication of US20030115506A1: 2003-06-19
Grant/publication date: 2005-02-22
Anticipated expiration: 2019-10-01; status: Expired – Lifetime

Purpose
The invention relates generally to debugging processors and, more specifically, to shadowing processor information for debugging purposes. The text describes debugging System-on-chip (SOC) devices where internal module communications are hard to access, and where conventional approaches (intrusive register/memory monitoring, debug code on the target processor, in-circuit emulators, logic state analyzers) can disturb memory accesses, slow or pause the processor, consume system bus bandwidth, or yield skewed/missing information. The described approach aims to let the processor provide trace-relevant information non-intrusively, without disturbing memory accesses or the execution pipeline, and at a rate matching the processor's internal clock.

Plain-language scope
A processor and debug circuit on one integrated circuit are coupled by a system bus and a dedicated communication link. The processor transmits bit values representing processor operation states—e.g., operand address, instruction address, instruction value, performance status—and program counter information (including at the pipeline writeback stage), plus branch-type and validity status, address/data/process-identifier information, and match states for instructions or accessed memory addresses. Program counter information may be stored in a (possibly memory-mapped) register in the debug unit, and increment signals may be sent instead of the full counter to minimize communication lines. The debug circuit may shadow processor information (including process identification), provide stall control, and send control signals such as suspend, resume fetch, reset, and exception indication.

What the excerpt does not establish
The supplied excerpt is partial and omits much of the specification and the full claim set. It does not establish claim scope, complete figures/embodiments, or the full list of references cited. Classification and legal-status entries are expressly assumptions/not legal conclusions and should not be treated as definitive. Not researched per instructions: litigation, ownership transfers, validity, prior art.

Source: https://patents.google.com/patent/[US6859891](/patent/US6859891)/en