US 6853385

Here's a concise summary of US patent 6853385:

Title: Video, audio and graphics decode, composite and display system
Original Assignee: Broadcom Corp
Current Assignee: Avago Technologies International Sales Pte Ltd
Inventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Xiaodong Xie, Greg A. Kranawetter, Vivian Hsiun, Francis Cheung, Sandeep Bhatia, Ramanujan Valmiki, Sathish Kumar
Filing Date: August 18, 2000
Issue Date: February 8, 2005
Abstract: A system is disclosed for processing and displaying video, audio, and graphics data. The system includes an integrated circuit that accepts MPEG Transport streams, decodes video and audio, and composites graphics into blended graphics. It supports various features like parallel graphics window compositing, efficient memory usage with a single-port RAM operating like a dual-port RAM, and reduced memory for HDTV signals. The system also handles in-band and out-of-band Transport streams concurrently, can display picture-in-picture (PIP) format video, and supports both SDTV and HDTV color spaces with conversion capabilities. Hardware, firmware, and software are efficiently combined, with hardware handling high-throughput functions like motion compensation, and firmware/software managing more complex logic and higher-level functions. The design aims for minimum total system cost through integration, efficient memory use, and optimized CPU utilization.

Plain-Language Overview of Independent Claims:

• Independent Claim 1: This claim describes a system, likely implemented on an integrated circuit, that combines video and graphics for display. Key components include a video decoder for processing various video signals, a graphics converter for transforming raw graphics data into a displayable format (such as YUValpha), a graphics blender that merges multiple graphics windows, and a video compositor that blends the combined graphics with video and background color to produce a final output signal. The system utilizes memory to store graphics data, and a window controller manages the graphics display by processing window descriptors that define how graphics windows are displayed, including their depth order on the screen.
• Independent Claim 15: This claim outlines a method for displaying video and graphics. The method involves processing graphics images organized into windows, obtaining descriptive data for these windows (window descriptors), and sorting this data based on the windows' depth order on the display. Graphics images are then retrieved from memory, and subsequently blended using associated alpha values. The method includes converting raw graphics data into a YUValpha format and blending multiple graphics windows to create a single blended graphics output. Finally, this blended graphics output is composited with video data to generate the displayed image.
• Independent Claim 22: This claim focuses on a system for displaying video and graphics data using an integrated circuit. The system comprises an input for receiving video signals and an output for providing a video output signal. It features a video decoder, a memory controller for managing data transfer to and from memory (which is a unified synchronous dynamic random access memory, or SDRAM), a window controller, a display engine, and a video compositor. The system is designed to display graphics, pass-through video, scaled video, or combinations thereof, with the video decoder digitizing and processing analog input video into YUV component signals.

CAFC 2026 Dockets:
A search of CAFC 2026 dockets for US patent 6853385B1 did not return any specific results, indicating no active cases for this patent in the CAFC dockets for the year 2026 based on the performed search.

I have conducted a search for known litigation involving US patent 6853385. Based on the available information from the search, there is no known litigation specifically naming US patent 6853385.

Proceedings overview

There are no AIA trial proceedings on file for US patent 6853385 as of the most recent ingest from the USPTO ODP API, nor could any be found through web searches. Therefore, for a defendant, the patent is untested at the PTAB.

Strategic summary

As no PTAB proceedings were found for US patent 6853385, all claims of the patent remain untested in the context of an AIA trial. This means there is no established precedent from the PTAB or the Federal Circuit regarding the validity of any specific claim under §§ 102, 103, or 112.

The estoppel landscape is entirely open. Since no IPRs, PGRs, or CBMs have been filed or concluded, a potential petitioner is not barred by 35 U.S.C. § 315(e)(2) from raising any prior art ground that could reasonably have been raised. This offers significant flexibility for a defendant to challenge the patent's validity using any available prior art in a new PTAB proceeding.

The absence of PTAB activity could signal several things: either the patent has not been extensively asserted, previous assertions settled before PTAB challenges were filed, or potential challengers have opted for district court litigation or other resolution methods. There is no pattern of petitioner activity, patent owner's PTAB appeal aggressiveness, or involvement by defensive aggregators like Unified Patents.

Recommended next steps

Since no PTAB activity exists for US patent 6853385, a defendant facing assertion of this patent should consider the following:

• Conduct a thorough prior art search: With no claims having been tested or invalidated at the PTAB, a strong prior art search is crucial to identify potential grounds for an IPR or other invalidity challenge.
• Evaluate IPR feasibility: If strong prior art is found, consider filing an IPR petition. The absence of previous PTAB challenges means the path is clear for new arguments against the claims.
• Monitor for future filings: Keep an eye on the USPTO PTAB E2E system for any newly filed petitions against this patent, as these could impact the patent's claims and the estoppel landscape.

Inventors

• Alexander G. MacInnis: Presumed Broadcom Corp.
• Chengfuh Jeffrey Tang: Presumed Broadcom Corp.
• Xiaodong Xie: Presumed Broadcom Corp.
• Greg A. Kranawetter: Presumed Broadcom Corp.
• Vivian Hsiun: Presumed Broadcom Corp.
• Francis Cheung: Presumed Broadcom Corp.
• Sandeep Bhatia: Presumed Broadcom Corp.
• Ramanujan Valmiki: Presumed Broadcom Corp.
• Sathish Kumar: Presumed Broadcom Corp.

All inventors are presumed to have been employed by Broadcom Corporation at the time of filing, which is the original assignee. There are no indications of unusual patterns, such as inventors departing within 12 months of filing.

Original assignee

Broadcom Corp (Original Assignee listed as "Broadcom Corp", later referred to as "BROADCOM CORPORATION" in assignment records).
Broadcom Corporation was a major designer and manufacturer of semiconductor devices for broadband communication, including components for set-top boxes, digital TVs, and networking equipment. They shipped products embodying the claims of US6853385.
Broadcom Corporation was acquired by Avago Technologies in 2016, and the combined company later rebranded as Broadcom Inc. It is currently an operating company.

Assignment timeline

• 2001-03-13 (executed) / recorded 2001-03-27 — Reel 035251/0212

  • Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST
  • Assignor: BHATIA, SANDEEP; KUMAR, SATHISH; VALMIKI, RAMANUJAN; CHEUNG, FRANCIS; HSIUN, VIVIAN; KRANAWETTER, GREG A.; MACINNIS, ALEXANDER G.; TANG, CHENGFUH JEFFREY; XIE, XIAODONG (Inventors)
  • Assignee: BROADCOM CORPORATION
  • Correspondent: BROADCOM CORPORATION, C/O KILPATRICK STOCKTON LLP, 1100 PEACHTREE STREET, SUITE 2800, ATLANTA, GEORGIA 30309-4530
  • Context: Initial assignment of patent rights from the inventors to the employing entity, Broadcom Corporation.

• 2016-02-11 (executed) / recorded 2016-02-23 — Reel 037060/0698

  • Conveyance: PATENT SECURITY AGREEMENT
  • Assignor: BROADCOM CORPORATION
  • Assignee: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
  • Correspondent: King & Spalding LLP, 1180 Peachtree Street NE, Atlanta, GA 30309. This correspondent appears multiple times in this chain.
  • Context: Broadcom Corporation pledged the patent as collateral in a financing agreement.

• 2017-02-03 (executed) / recorded 2017-02-16 — Reel 038084/0594

  • Conveyance: TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS
  • Assignor: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
  • Assignee: BROADCOM CORPORATION
  • Correspondent: King & Spalding LLP, 1180 Peachtree Street NE, Atlanta, GA 30309. This correspondent appears multiple times in this chain.
  • Context: Bank of America released its security interest, returning full rights to Broadcom Corporation.

• 2017-02-01 (executed) / recorded 2017-02-16 — Reel 038084/0597

  • Conveyance: ASSIGNMENT OF ASSIGNOR'S INTEREST
  • Assignor: BROADCOM CORPORATION
  • Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
  • Correspondent: King & Spalding LLP, 1180 Peachtree Street NE, Atlanta, GA 30309. This correspondent appears multiple times in this chain.
  • Context: Assignment of patent rights from Broadcom Corporation to an Avago Technologies intellectual property holding entity, following the acquisition of Broadcom by Avago Technologies.

• 2018-09-28 (executed) / recorded 2018-10-04 — Reel 047196/0097

  • Conveyance: MERGER
  • Assignor: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
  • Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
  • Correspondent: KIRKLAND & ELLIS LLP, 601 LEXINGTON AVENUE, NEW YORK, NEW YORK 10022. This correspondent appears multiple times in this chain.
  • Context: Internal corporate reorganization where Avago Technologies General IP (Singapore) Pte. Ltd. merged into another Avago Technologies entity.

• 2017-02-01 (executed) / recorded 2019-03-06 — Reel 048408/0762

  • Conveyance: CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0097. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER.
  • Assignor: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
  • Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
  • Correspondent: Kirkland & Ellis LLP, 601 Lexington Avenue, New York, New York 10022. This correspondent appears multiple times in this chain.
  • Context: Corrective recording to update the execution date of the previously recorded merger, confirming the transfer to Avago Technologies International Sales Pte. Limited.

Timeline diagram

timeline
    title Ownership of US 6853385
    2001 : Inventors to Broadcom Corp
    2005 : Patent Issued
    2016 : Security agreement with Bank of America
    2017 : Security interest released
         : Assigned to Avago General IP
         : Corrective merger (executed date)
    2018 : Merged to Avago Intl Sales
    2019 : Corrective assignment (recorded)
    2020 : Patent Expired

NPE / troll-pattern signals

1. Shell-entity transfer — Unclear. The transfers from Broadcom Corporation to Avago Technologies General IP (Singapore) Pte. Ltd. and then to Avago Technologies International Sales Pte. Limited involve entities with names (e.g., "IP," "International Sales Pte. Limited") that can suggest shell companies. However, these entities are part of Broadcom Inc., a large operating semiconductor company, following its acquisition by Avago Technologies. Such structures are common for multinational operating companies for tax and intellectual property management rather than solely for assertion by a non-practicing entity.
2. Known asserter in the chain — Not present. None of the assignees in the chain (Broadcom Corporation, Bank of America, Avago Technologies General IP (Singapore) Pte. Ltd., Avago Technologies International Sales Pte. Limited) are identified as known patent asserters or NPEs from public lists.
3. Repeat correspondent across the chain — Present.
   • King & Spalding LLP (1180 Peachtree Street NE, Atlanta, GA 30309) appears as the correspondent for three consecutive recordings: Reel 037060/0698 (executed 2016-02-11), Reel 038084/0594 (executed 2017-02-03), and Reel 038084/0597 (executed 2017-02-01).
   • Kirkland & Ellis LLP (601 Lexington Avenue, New York, New York 10022) appears as the correspondent for two consecutive recordings: Reel 047196/0097 (executed 2018-09-28) and Reel 048408/0762 (executed 2017-02-01).
     The recurrence of these firms is noted, but within the context of related transactions (financing, M&A IP transfer, and internal corporate restructuring) for a large operating company.
4. Cascading transfers — Not present. While there were two transfers involving Avago entities within 17 months (Reel 047196/0097 on 2018-10-04 and Reel 048408/0762 on 2019-03-06), these represent a single internal corporate merger and a subsequent corrective filing, not a rapid succession of transfers through multiple, distinct shell LLCs.
5. Pre-litigation transfer — Unclear. The patent expired on 2020-04-02. The latest assignment was recorded on 2019-03-06. Without access to litigation records, it's not possible to definitively state whether this transfer occurred within six months of any potential infringement suit. However, given the patent's expiration, the window for such a pattern is very narrow.
6. Bankruptcy fire-sale — Not present. Broadcom Corporation was acquired by Avago Technologies, not subject to a bankruptcy sale. The security agreement with Bank of America was a standard financing arrangement.
7. Privateering — Not present. There is no evidence in the assignment records or public information to suggest that the patent was transferred to an NPE to assert on behalf of an operating company against competitors.
8. Defensive aggregator (anti-NPE) — Not present. The chain does not terminate at a known defensive aggregator.

Verdict

Insufficient data.
While the assignment chain shows transfers to IP holding entities and repeat correspondents, these occurred within the context of a major operating company's (Broadcom Inc., formed from Avago's acquisition of Broadcom) corporate restructuring and IP management, not to known NPEs. The patent has also expired (2020-04-02), making active assertion unlikely. Without litigation data, a definitive pre-litigation transfer cannot be confirmed.

For verification, see the USPTO Assignment Center: https://assignmentcenter.uspto.gov/

To identify the most relevant prior art for US patent 6853385, I have examined the "Patent Citations" section of the Google Patents entry for US6853385B1. Due to the extensive number of cited patents (over 60), I will provide a detailed analysis for a representative subset of the earliest-cited patents, as these often present the most significant prior art under 35 U.S.C. § 102. I will analyze the first ten patents from the cited list.

The US patent 6853385 describes a video, audio, and graphics decode, composite, and display system, particularly focusing on efficient memory usage, parallel graphics compositing, handling of various video and graphics formats (including HDTV and SDTV), and synchronization. Key aspects include a unified memory architecture (SDRAM), hardware/firmware/software partitioning for efficiency, and specialized display pipelines for video and graphics.

Here are the analyses for the selected prior art patents:

Prior Art Analysis for US Patent 6853385

1. US4027330A

• Full Citation: US4027330A, "Television receiver having picture-in-picture capability", published May 31, 1977.
• Publication/Filing Date: Published: May 31, 1977; Filed: May 2, 1975.
• Brief Description: This patent describes a television receiver capable of displaying a main picture and a smaller, auxiliary picture (picture-in-picture, or PIP) simultaneously. It involves circuitry for processing two video signals and combining them for display.
• Potential Anticipated Claim(s) under 35 U.S.C. § 102: Potentially anticipates claims related to the display of multiple video streams, specifically the "picture-in-picture (PIP) format" as mentioned in the specification of US6853385B1. For example, the statement "the system may display MPEG video in two simultaneous in-band streams in picture-in-picture (PIP) format" from US6853385B1's specification. While US4027330A doesn't specify MPEG video, the core concept of displaying two simultaneous video streams in PIP format is present.

2. US4097893A

• Full Citation: US4097893A, "Digital image processing system and method", published June 27, 1978.
• Publication/Filing Date: Published: June 27, 1978; Filed: October 29, 1976.
• Brief Description: This patent details a digital image processing system and method for manipulating and displaying digital images. It likely involves converting image data, storing it, and then displaying it, which are fundamental to digital display systems.
• Potential Anticipated Claim(s) under 35 U.S.C. § 102: This patent generally anticipates broad concepts related to "processing and displaying video and graphics" as mentioned in the "Definitions" section of US68533385B1. Depending on its specific disclosures, it could anticipate claims related to converting raw graphics data into a suitable format for display, as described in US6853385B1's specification, for example, the graphics converter block 90.

3. US4130836A

• Full Citation: US4130836A, "System for displaying video and graphics data", published December 19, 1978.
• Publication/Filing Date: Published: December 19, 1978; Filed: June 1, 1977.
• Brief Description: This patent describes a system designed to display both video and graphics data, likely involving mechanisms to combine or overlay these different data types for presentation on a screen.
• Potential Anticipated Claim(s) under 35 U.S.C. § 102: Potentially anticipates claims related to compositing or blending graphics and video data for display. US6853385B1's "video compositor 60 receives one or more types of data, such as blended graphics data, video window data, passthrough video data and background color data, and produces a blended video output." This general functionality could be anticipated by US4130836A.

4. US4270146A

• Full Citation: US4270146A, "Video display system with programmable character and graphics generation", published May 26, 1981.
• Publication/Filing Date: Published: May 26, 1981; Filed: June 29, 1979.
• Brief Description: This patent describes a video display system that can generate and display both characters (text) and graphics in a programmable manner, indicating flexibility in display content.
• Potential Anticipated Claim(s) under 35 U.S.C. § 102: Potentially anticipates claims related to the display of varied graphics content, such as "anti-aliased text and graphics, patterns, GIF images, JPEG images, live video from MPEG or analog video, three dimensional graphics, cursors or pointers, control panels, menus, tickers, or any other content" as broadly described in US6853385B1 regarding logical windows. The programmable generation of graphics and characters is a foundational aspect.

5. US4290082A

• Full Citation: US4290082A, "Video display apparatus for superimposing graphics on video images", published September 15, 1981.
• Publication/Filing Date: Published: September 15, 1981; Filed: February 14, 1979.
• Brief Description: This patent discloses a video display apparatus specifically designed to overlay or superimpose graphics onto existing video images. This is a core function of many modern display systems.
• Potential Anticipated Claim(s) under 35 U.S.C. § 102: Directly relevant to the "compositing of graphics into blended graphics" and "blending graphics, video and background color" as described in US6853385B1. Claims related to the video compositor (e.g., video compositor 60) and its ability to blend graphics and video could be anticipated by the general concept of superimposing graphics on video.

6. US4295166A

• Full Citation: US4295166A, "Digital video display system with improved image data access", published October 13, 1981.
• Publication/Filing Date: Published: October 13, 1981; Filed: February 14, 1979.
• Brief Description: This patent focuses on improvements in accessing image data within a digital video display system, suggesting mechanisms for efficient memory access for display purposes.
• Potential Anticipated Claim(s) under 35 U.S.C. § 102: Potentially anticipates claims related to efficient memory access and management for display data. For instance, US6853385B1 details "the memory controller 54 preferably reads and writes video and graphics data to and from memory by using burst accesses with burst lengths that may be assigned to each task," and "the graphics display system memory 28 is preferably a unified synchronous dynamic random access memory (SDRAM) that is shared by the system, the CPU 22 and other peripheral components." While US4295166A likely predates SDRAM, the concept of "improved image data access" is relevant.

7. US4301476A

• Full Citation: US4301476A, "Color video display system", published November 17, 1981.
• Publication/Filing Date: Published: November 17, 1981; Filed: June 26, 1979.
• Brief Description: This patent describes a system for displaying color video, likely including details on color signal processing and display.
• Potential Anticipated Claim(s) under 35 U.S.C. § 102: Potentially anticipates claims broadly related to color display and color space conversion. US6853385B1 states, "the system preferably supports both SDTV and HDTV color spaces for both decode and display. The system may also provide conversion between them and conversion of those color spaces to RGB color space." While US4301476A might not specify HDTV/SDTV or modern color spaces, the fundamental aspect of a "Color video display system" is broadly covered.

8. US4326217A

• Full Citation: US4326217A, "Video processing system for displaying mixed video and graphics", published April 20, 1982.
• Publication/Filing Date: Published: April 20, 1982; Filed: June 27, 1979.
• Brief Description: This patent concerns a video processing system specifically designed to handle and display a combination of video and graphics information.
• Potential Anticipated Claim(s) under 35 U.S.C. § 102: Similar to US4130836A and US4290082A, this patent potentially anticipates claims regarding the mixing and compositing of video and graphics. US6853385B1 states that the system "may display graphics, passthrough video, scaled video or a combination of the different types of video and graphics." The core concept of displaying mixed video and graphics is anticipated.

9. US4414571A

• Full Citation: US4414571A, "Digital image display system with character and graphics overlay capability", published November 8, 1983.
• Publication/Filing Date: Published: November 8, 1983; Filed: November 24, 1980.
• Brief Description: This patent describes a digital image display system that can overlay characters and graphics onto a base image, suggesting advanced compositing capabilities.
• Potential Anticipated Claim(s) under 35 U.S.C. § 102: Potentially anticipates claims related to the overlay and blending of graphics and video, particularly where "graphics windows may overlap or cover one another with arbitrary spatial relationships" as described in US6853385B1. Claims relating to the graphics blending block (e.g., graphics blending block 94) and the video compositor (video compositor 60) could be implicated.

10. US4449150A

• Full Citation: US4449150A, "Video signal processing apparatus for displaying an auxiliary picture in a main picture", published May 15, 1984.
• Publication/Filing Date: Published: May 15, 1984; Filed: December 11, 1981.
• Brief Description: This patent describes a video signal processing apparatus specifically for displaying an auxiliary picture within a main picture, essentially detailing Picture-in-Picture (PIP) functionality.
• Potential Anticipated Claim(s) under 35 U.S.C. § 102: Directly anticipates the capability of displaying "picture-in-picture (PIP) format" as described in US6853385B1, specifically the statement "the system may display MPEG video in two simultaneous in-band streams in picture-in-picture (PIP) format." The fundamental mechanism for creating a PIP display would be present in this earlier patent.

This analysis provides a representative overview of potential anticipation by some of the earliest cited prior art patents for US6853385B1. A full, comprehensive anticipation analysis would require a detailed claim-by-claim comparison of US6853385B1's claims against the entire disclosure of each prior art document.

I cannot perform an obviousness analysis of US patent 6853385 under 35 U.S.C. § 103, nor identify combinations of prior art references, because the provided patent text for US68533385B1 does not include a "Prior Art section" listing specific prior art documents or publications against which an obviousness argument could be made.

The "Prior art keywords" (video, graphics, data, window, blended) and "Prior art date" (1999-11-09) are descriptive metadata for the US6853385 patent itself, not a list of prior art references to be combined. Without specific prior art references, it is not possible to determine what combinations would render the claims obvious or to explain the motivation for such combinations.