Invalidity dossier
US 6823409
Coherency control module for maintaining cache coherency in a multi-processor-bus system
Current assignee: Valtrus Innovations Ltd.
Added 9/17/2026, 12:49:25 AM
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Patent summary
Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.
Patent Overview — US 6,823,409 B2
Title: Coherency control module for maintaining cache coherency in a multi-processor-bus system
Patent number / application: US 6,823,409 B2; Application US 09/965,894
Inventors: Phillip M. Jones; Paul B. Rawlins
Assignee of record in the excerpt: Original assignee Hewlett Packard Development Co LP; current assignee listed as Valtrus Innovations Ltd and Hewlett Packard Enterprise Development LP. The excerpt also shows assignment to Compaq Information Technologies Group, L.P. (2001) and later to Hewlett-Packard Development Company, L.P. (2004).
Dates: Priority/filing date 2001-09-28; publication of US 2003/0070016 A1 on 2003-04-10; patent publication date 2004-11-23. Status listed as expired – lifetime, with adjusted expiration 2022-11-16.
Purpose (from the text): The invention "relates generally to a multi-processor-bus memory system and, more particularly, to an efficient mechanism for filtering processor cache snoops in a multi-processor-bus-system." It addresses cache coherence, where separate processor caches sharing common memory must be kept coherent, and where a host controller "must maintain memory coherency throughout all the processor caches," requiring snoop cycles on non-originating buses.
Plain-language scope: The disclosed approach uses a snoop filter to minimize snoop cycles on other buses. To maintain efficiency, the snoop filter should allow data lookup from tag RAMs quickly enough to determine the proper snoop response on the processor bus within a minimal number of clock cycles. The figures described include an exemplary multi-processor-bus computer system (eight microprocessors in a split bus configuration), a snoop filter and a more detailed embodiment thereof, and a "two dimensional doubly linked list structure."
Source: https://patents.google.com/patent/US6823409/en
What the excerpt does not establish: It provides no claim text, so the precise claimed scope is not shown. It does not establish validity, enforceability, or the merits of any litigation. It gives no complete description of the linked-list structure, snoop-filter operation, or the omitted portions of the specification. Assignee and legal-status entries are expressly disclaimed as assumptions, not legal conclusions.
Generated 10/1/2026, 10:03:21 PM
Cases on file (1)
Group view →Specific litigation cases in our database that name US patent 6823409. The free-form analysis below may also discuss cases beyond this list.
Litigation summary
Past and pending lawsuits — plaintiffs, defendants, jurisdictions, outcomes, and notable rulings.
Proceedings on file (0)
All PTAB activity →AIA trial proceedings (IPR / PGR / CBM) filed at the USPTO Patent Trial and Appeal Board against this patent. Sourced from the USPTO Open Data Portal and refreshed every six hours; each proceeding number deep-links to the PTAB E2E docket.
Current assignee: Valtrus Innovations Ltd.
No PTAB proceedings on file. This patent has not been challenged via IPR, PGR, or CBM. The absence is itself a signal — well-asserted patents eventually attract IPRs. The LLM analysis below may surface filings the ODP feed hasn’t indexed yet.
PTAB challenges
AIA trial proceedings at the USPTO Patent Trial and Appeal Board — IPR, PGR, and CBM. Petitioners, judge panels, claim-level invalidation outcomes from Final Written Decisions, and Federal Circuit appeals. The single most important defensive datapoint after litigation history.
Assignment history
Inventors, original assignee, and the chain of ownership recorded with the USPTO — including the correspondent attorney who recorded each assignment, since shell-LLC chains often share one repeat-player attorney even when the entity names look unrelated. Surfaces NPE / patent-troll patterns: shell-entity transfers, known asserters in the chain, repeat correspondent fingerprints, pre-litigation assignments, and bankruptcy fire-sales.
Prior art
Earlier patents, publications, and products that may anticipate or render the claims unpatentable.
Obviousness
Combinations of prior art that suggest the claimed invention would have been obvious under 35 U.S.C. § 103.
Extensions
Patent term adjustments, term extensions, continuations, divisionals, family members, and expiration dates.
Derivative works
Defensive disclosure: derivative variations of each claim designed to render future incremental improvements obvious or non-novel.
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This patent in court (1)
1 tracked lawsuit name US 6823409.