Invalidity dossier
US 6565175
Integrated printhead
Current assignee: SICPA Holding SA
Added 9/23/2026, 8:48:38 PM
Active provider: DeepSeek · deepseek-flash
Patent summary
Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.
Patent Overview — US 6,565,175 B1
Title: Integrated printhead
Patent number: US 6,565,175 B1
Inventors: Alessandro Scardovi; Renato Conta
Original assignee: Olivetti Tecnost SpA (current assignee listed as SICPA Holding SA)
Key dates: Priority date 1999-07-12; filing date 2000-06-30; publication/grant date 2003-05-20; legal status listed as "Expired - Lifetime," with anticipated expiration 2020-06-30.
Purpose: The patent addresses an integrated thermal ink jet head of the IDH (Integrated Drive Head) type, in which thermal resistors are selectively activated to emit ink droplets through corresponding nozzles. The stated object is to overcome technical problems of known 3-D-addressed heads, including unreliable high-current flat-cable contacts, over-sized external switches, and critical ground-conductor layout with high parasitic resistances and variable voltage drops. The invention seeks an innovative layout retaining the advantages of 3-D addressing while being easy to produce and reliable.
Plain-language scope: Per the supplied definitions, the integrated printhead comprises an array of groups of ink jet elements in M rows and L columns, each group having a single row and column address. First addressing means P_J select one of the M rows; second addressing means X_K select one of the L columns; and third addressing means A_I select one ink jet element within each group. The printhead is characterized by logic means associated with each group and with the second addressing means X_K, activatable by logic signals to select one of the L columns. The head may be driven via four-dimensional (4-D) addressing. In an embodiment, an integrated circuit (e.g., NMOS or bipolar) includes a predefined number of nozzles (for example 624), contacts for connecting to an external control circuit, activating groups (for example 24 pairs, M), and an equivalent number of SW AND transistors each associated with one activating group. Each activating group has N array transistors and N thermal resistors.
Source: https://patents.google.com/patent/US6565175/en
What the excerpt does not establish: The supplied text is excerpted and omits portions of the description and the full claims; therefore the complete claimed scope, all embodiments, and the full specification are not established. It provides no information on prosecution history, litigation, validity, or the content of cited prior art beyond U.S. Pat. No. 5,644,342. Legal status and assignee listings are explicitly stated in the source as assumptions, not legal conclusions. No independent verification of dates or ownership transfers was performed.
Generated 10/1/2026, 9:41:09 PM
Cases on file (0)
Specific litigation cases in our database that name US patent 6565175. The free-form analysis below may also discuss cases beyond this list.
No cases on file mention this patent. Upload a CSV or add a case manually in Admin → Manage litigation cases.
Litigation summary
Past and pending lawsuits — plaintiffs, defendants, jurisdictions, outcomes, and notable rulings.
Proceedings on file (0)
All PTAB activity →AIA trial proceedings (IPR / PGR / CBM) filed at the USPTO Patent Trial and Appeal Board against this patent. Sourced from the USPTO Open Data Portal and refreshed every six hours; each proceeding number deep-links to the PTAB E2E docket.
No PTAB proceedings on file. This patent has not been challenged via IPR, PGR, or CBM. The absence is itself a signal — well-asserted patents eventually attract IPRs. The LLM analysis below may surface filings the ODP feed hasn’t indexed yet.
PTAB challenges
AIA trial proceedings at the USPTO Patent Trial and Appeal Board — IPR, PGR, and CBM. Petitioners, judge panels, claim-level invalidation outcomes from Final Written Decisions, and Federal Circuit appeals. The single most important defensive datapoint after litigation history.
Assignment history
Inventors, original assignee, and the chain of ownership recorded with the USPTO — including the correspondent attorney who recorded each assignment, since shell-LLC chains often share one repeat-player attorney even when the entity names look unrelated. Surfaces NPE / patent-troll patterns: shell-entity transfers, known asserters in the chain, repeat correspondent fingerprints, pre-litigation assignments, and bankruptcy fire-sales.
Prior art
Earlier patents, publications, and products that may anticipate or render the claims unpatentable.
Obviousness
Combinations of prior art that suggest the claimed invention would have been obvious under 35 U.S.C. § 103.
Extensions
Patent term adjustments, term extensions, continuations, divisionals, family members, and expiration dates.
Derivative works
Defensive disclosure: derivative variations of each claim designed to render future incremental improvements obvious or non-novel.