US 6345336

Patent Overview — US 6,345,336 B1

Title: Instruction cache memory includes a clock gate circuit for selectively supplying a clock signal to tag RAM to reduce power consumption

Patent number: US 6,345,336 B1
Inventor: Masafumi Takahashi
Original assignee: Toshiba Corp.; current assignee listed as Microsoft Technology Licensing LLC
Priority date: 1999-01-06; filed: 2000-01-06; granted/published: 2002-02-05
Status (per source): Expired – Lifetime; anticipated expiration 2020-01-06
Application number: US 09/478,827

Purpose. The patent addresses power consumption in instruction cache memories. In the conventional direct-mapping cache described (FIG. 7), both the data RAM and the tag RAM operate on every access, so the cache "occupied a large part of hardware and consumed large power." The stated object is to alleviate operation of the tag RAM to reduce its power consumption.

Plain-language scope. The disclosed instruction cache memory comprises: a data RAM with multiple cache lines storing words at consecutive memory addresses and outputting read-out data in response to a processor access address; a tag RAM storing tag addresses per cache line and outputting a tag signal; a hit/miss judging circuit comparing the tag signal with the access address to produce a hit/miss signal; and a clock gate circuit that supplies a clock signal to the tag RAM only when the cache line to be read changes, and/or when a branch instruction is detected in the processor, otherwise stopping clock supply to the tag RAM. The text also describes an n-bit address/m-bit data embodiment with specified bit fields (q−1:0 to the data RAM; q−1:p to the tag RAM; n−1:q compared as high-order bits), and an x-way set-associative variant built from x basic units with corresponding bit ranges.

Source: https://patents.google.com/patent/US6345336/en

What the excerpt does not establish. The supplied text is explicitly marked as excerpted, with omitted material. It does not provide the full claims, complete figure descriptions, or detailed embodiments. It also does not establish the legal status/scope conclusions, claim construction, validity, enforceability, or prior-art effect—these are not analyzed here.