Invalidity dossier
US 5805500
Circuit and method for generating a read reference signal for nonvolatile memory cells
Current assignee: STMicroelectronics SRL
Added 9/23/2026, 6:18:45 PM
Active provider: DeepSeek · deepseek-flash
Patent summary
Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.
Patent Overview — US5805500A
Title: Circuit and method for generating a read reference signal for nonvolatile memory cells
Assignee/Applicant of record: Original assignee SGS Thomson Microelectronics SRL; later assignments listed to STMicroelectronics SRL and Micron Technology Inc. (per the supplied excerpt's assignment entries).
Key dates: Priority/filing date 1997-06-18 (application US08/877,921); granted and published 1998-09-08; anticipated expiration 2017-06-18; listed status "Expired - Lifetime."
Inventors: Giovanni Campardo, Rino Micheloni, Marco Maccarrone.
Purpose: To generate a read reference signal for nonvolatile memory cells enabling fast, correct sensing across the full range of supply voltages. The circuit compares current through a cell being read against a reference current from a reference cell; written cells have threshold voltages above the read voltage and conduct no current, while erased cells conduct. Constraints noted: threshold voltage of the most erased cells should be above zero, worst erased about 2.5 V, with example values V_TC = 2.5 V, V_TW = 4.5 V, V_TR = 1.25 V.
Plain-language scope (from supplied text): A read circuit has an array branch with the cell to be read and a reference branch with a reference cell, coupled through a current/voltage converter using a current mirror (a diode-connected PMOS load on the array side, a PMOS load on the reference side; current imposed by the memory cell and mirrored to the reference branch). The reference characteristic is described as having a first slope when the read voltage is between a third and fourth value, and a steeper second slope above the fourth value. Additional excerpted matter covers generating the reference characteristic (FIGS. 4a–4c), reference-cell arrangements (e.g., a small 8×8 array with innermost cells, set during EWS testing), and an adaptive equalizing network for nodes 16 and 17.
Not established by this excerpt: The full claims, complete description, drawings/figures, exact assignee chain (only assignment entries appear), any litigation, validity, or prior-art analysis. Text is excerpted from the source; the source indicates omitted text.
Source: https://patents.google.com/patent/[US5805500](/patent/US5805500)/en (fetched 2026-09-23)
Generated 10/1/2026, 9:42:51 PM
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Assignment history
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Prior art
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