Invalidity dossier

US 5644342

Addressing system for an integrated printhead

Current assignee: Hewlett Packard Development Co LP

Added 9/24/2026, 12:51:02 AM

At a glanceNo PTAB challengesNo litigation on file

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Patent summary

Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.

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US 5,644,342 — "Addressing System for an Integrated Printhead"

  • Patent number: US 5,644,342 A
  • Inventor: Dimitri Argyres
  • Original assignee: Hewlett-Packard Co.; current assignee listed as Hewlett-Packard Development Co. LP
  • Priority date: 1993-03-31; application filed: 1995-01-30 (application no. US08/381,008); granted/published: 1997-07-01
  • Status listed: Expired – Lifetime (anticipated expiration 2014-07-01)
  • Source: https://patents.google.com/patent/US5644342/en

Purpose. The patent addresses thermal inkjet printing—specifically selecting heater resistors in an integrated printhead to eject ink. Conventional two-dimensional multiplexing drives one primitive select line and one address select line to activate a transistor in series with a heater resistor. The stated drawback: as nozzle count and print quality rise, interconnect pad count rises, increasing die and tape automated bonding (TAB) area, drive electronics, and printer flex cost, while reducing reliability and space for ESD protection.

Plain-language scope. The described integrated printhead has an M-row by N-column array of groups of ink jet elements, each group with a unique row and column address. A first addressing control (primitive selects) chooses one of M rows; a second (ground selects) chooses one of N columns; and a third dimension comes from address line selects coupled to elements within each group. One group is addressed by the first and second controls; individual heater-resistor/transistor pairs are selected via the address line selects, so fewer interconnect pads are needed. Embodiments add adjustment resistors between the addressing means to balance energy dissipated across groups, and a layout placing primitive-select and ground-select pads together centrally with heater-resistor/transistor pairs arranged peripherally.

What the excerpt does not establish. The supplied text is marked as an excerpt with omitted content; it provides no claims, no complete figure descriptions, and no prior-art discussion. It cannot support statements about claim scope, prosecution history, validity, infringement, or litigation—none of which were researched here.

Generated 10/1/2026, 9:31:43 PM

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Proceedings on file (0)

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PTAB challenges

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Assignment history

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Prior art

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Obviousness

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