US 11054243

I'll search for authoritative information on this patent number, including any CAFC litigation activity.

US 11,054,243 B2 — Verification Summary

Search scope note: I ran the USPTO/Google Patents full text, Justia, the Texas A&M institutional repository (OAKTrust), and targeted CAFC 2026 docket/opinion searches. The patent record is well corroborated. I found no CAFC docket or Federal Circuit proceeding involving US 11,054,243. Important caution: several 2026 Federal Circuit summaries and IPR documents refer to "the '542 patent," but those are different patents entirely (a surface-cleaning apparatus, an exercise machine, a voice-activity-detection patent). Do not conflate those with US 11,054,243 — the trailing "542" is a coincidental numbering collision.

Bibliographic Data

Minor identifier caveat: Google Patents and the assignment record render the second inventor's middle name as "Joseu" (Pacheco Barajas). The OCR of the front page of the granted patent PDF renders it "Oscar Joscu Pacheco Barajas." This appears to be an OCR artifact rather than a real discrepancy, but I am flagging it per the literal-interpretation rule rather than silently normalizing it.

Abstract (verbatim)

"A circuit for generating a swept source optical coherence tomography (SS-OCT) imaging calibration clock. The circuit comprises a first photodetector configured to convert an SS-OCT optical calibration signal to an SS-OCT electrical calibration signal, a first analog-to-digital converter (ADC) coupled to the first photodetector and configured to convert the SS-OCT electrical calibration signal to a sequence of SS-OCT calibration signal digital values, a processing unit coupled to the first ADC that, when initiated, is configured to demodulate the sequence of SS-OCT calibration signal digital values to obtain a sequence of SS-OCT wave number digital values, where each SS-OCT wave number digital value corresponds to one of the SS-OCT calibration signal digital values, and a level crossing sampler that is configured to track a wave number associated with the SS-OCT optical calibration signal and to generate an SS-OCT calibration clock pulse."

Independent Claims in Plain Language

Claim 1 — Calibration-clock circuit (core apparatus). A circuit that produces the timing/clock signal used to calibrate an SS-OCT system. A first photodetector turns the optical calibration signal (e.g., the Mach–Zehnder interferometer or "MZI" signal from the reference path) into an electrical signal. A first ADC digitizes it into a stream of calibration samples. A processing unit then demodulates those samples to compute the optical wavenumber k for each sample. A level crossing sampler tracks that wavenumber and fires an "SS-OCT calibration clock pulse" each time the wavenumber crosses a level; that pulse is what times the sampling of the interferometric (imaging) signal. The point of the invention is that sampling is triggered in the wavenumber domain (linear-in-k) rather than in time, which is what makes the subsequent inverse FFT accurate.

Claim 10 — Method counterpart. The method version of the same idea: (a) photodetector converts the optical calibration signal to electrical; (b) an ADC converts it to a sequence of digital calibration values; (c) a processing unit demodulates those to obtain a sequence of wavenumber digital values, each mapped to a calibration sample; and (d) when a wavenumber value matches one of a plurality of predefined wavenumber digital values, a calibration clock pulse is generated, and the interferometric optical signal is sampled based on that pulse.

Claim 14 — Full acquisition circuit (calibration clock + imaging channel). Takes the claim 1 circuit and adds the measurement side: a second photodetector converts the optical interferometric signal into an electrical interferometric signal, and a second ADC, clocked by the calibration clock pulse, samples and digitizes that signal in response to the pulse. The processing unit then processes the collection of interferometric samples into a light-reflection-coefficient value for a point on the imaging target (i.e., a depth reflectivity data point, from which the tomographic image is built).

Dependent claims 2–9 narrow claim 1 (InGaAs photodiode; Kalman filter, interpolated discrete Fourier transform, or square-law envelope demodulation; software/firmware/hardware level-crossing sampler; a DAC converting the wavenumber stream back to analog k(t); and a specific op-amp/comparator/asynchronous-accumulator/second-DAC level-crossing sampler architecture). Claims 15–20 narrow claim 14 (integrated-circuit implementation; both photodetectors being InGaAs; an asynchronous-to-synchronous converter between the second ADC and the processing unit; and the three demodulation options again).

Assessment / Uncertainty

• The bibliographic record, abstract, and claims are well corroborated across Google Patents, the granted-patent PDF (patentimages), Justia, the IEEE patent-citation page, and Texas A&M's OAKTrust record. Confidence is high on all fields above.
• No CAFC (or district court) litigation for this patent surfaced in my searches. That is a negative finding, not proof of absence — a full docket-level check (e.g., Docket Alarm / PACER / CourtListener APIs) would be needed to state non-litigation definitively.
• Claim 15's full text was truncated on the Google Patents page; the "integrated circuit" limitation is confirmed from the WO 2018/200712 A1 counterpart published claims. Worth verifying against the official USPTO PatentCenter image if this claim's exact wording matters.
• Google Patents' "Active" legal status and the 2038-06-09 adjusted expiration are explicitly flagged by Google as assumptions and not legal conclusions; I have not independently verified current maintenance-fee status.

I'll search litigation-focused sources for US 11,054,243.

Initial searches returned only coincidental number collisions. Let me query litigation-specific databases directly.

Litigation Search Report — US Patent No. 11,054,243

Bottom line: No litigation is known involving US 11,054,243. I found no district court complaint, no ITC Section 337 investigation, no PTAB post-grant proceeding (IPR/PGR/CBM), and no Federal Circuit appeal in which US 11,054,243 is the patent-in-suit or the patent challenged. Every search hit referencing the digits "11054243" or "'542" was a coincidental collision with a different identifier, which I document below so the negative finding is auditable.

Method / sources canvassed

I searched Google Patents, the granted-patent PDF (patentimages), Justia, CourtListener/recap, Unified Patents' public materials (insights/blog, PTAB filings), Docket Alarm-indexed PTAB dockets, the Stanford NPE Litigation Database, RPX litigation news, Texas state appellate dockets (search.txcourts.gov), and targeted CAFC opinion/docket queries. Caveat on completeness: I could not run a direct, patent-number-keyed query against Unified Patents' portal.unifiedpatents.com/litigation/caselist portal or against PACER/Docket Alarm's docket API in this session. Those are the definitive tools for a number-keyed negative. The conclusion below is therefore a well-supported negative finding from multiple corroborating public sources, not a certified absence — a PACER/Docket Alarm number-keyed check (e.g., "11,054,243" AND "16/497,036") should be run before relying on it in any formal opinion (e.g., freedom-to-operate or validity diligence).

Number-collision hits — expressly excluded

Per your instruction not to return results for similar numbers, I flag these as not US 11,054,243:

Why the negative finding is plausible

• The patent is university-owned. The assignee of record is The Texas A&M University System (assignment recorded Sept. 24, 2019). Universities typically do not assert SS-OCT instrumentation patents offensively; they monetize via exclusive licenses, and no licensee/patent-assertion entity holding US 11,054,243 surfaced.
• It is an apparatus/method patent in a niche instrumentation field (SS-OCT swept-source calibration), i.e., not the kind of NPE-favored software/finance patent that dominates the litigation dockets I sampled. No NPE database entry (Stanford NPE Litigation Database) tied to this number appeared.
• No post-grant challenge (IPR/PGR) appeared in PTAB-oriented results — consistent with a patent that has never been asserted; defendants rarely file IPRs against unasserted patents.

What would change this answer

If litigation exists, it would most likely be found in: (a) a PACER/Docket Alarm docket search keyed on "11,054,243" or application "16/497,036"; (b) a Unified Patents caselist query; (c) the USPTO PatentCenter "Litigation" / PTAB "Patent Docket" tabs for the patent; or (d) a Texas A&M System OGC record of a licensing dispute. None of those returned a hit here.

Consistency note with the prior section: This confirms the earlier "no CAFC docket or Federal Circuit proceeding" finding and extends it to district court, ITC, and PTAB — the prior section's caution about the "'542 patent" collision (there, the surface-cleaning apparatus, exercise machine, and voice-activity patents) is independently reproduced here, and I add the ST1 v. Samsung voice-activity appeal and the NOCO "11,584,243" exhibit as two more distinct collisions. No contradiction between sections.

I'll verify the structured-data negative finding against public PTAB/CAFC sources before reporting.

Let me run a few more targeted checks against litigation/PTAB trackers to harden (or break) the negative finding.

Proceedings overview

Total AIA trial proceedings on file for US 11,054,243: 0 — zero inter partes reviews, zero post-grant reviews, zero covered business method reviews, zero derivations. Breakdown by status is therefore uniformly zero (0 active / 0 claims invalidated / 0 claims sustained / 0 settled / 0 institution denials), and this is the canonical count from the structured "PTAB proceedings on file" block (USPTO Open Data Portal), which my independent web searches corroborated rather than contradicted.

Bottom-line defensive posture: This patent is untested, not hardened and not weakened. All 20 claims (independents 1, 10, 14; dependents 2–9, 11–13, 15–20) remain in their as-issued form — no claim has ever been canceled, narrowed by adverse judgment, or confirmed in an AIA trial. For a defendant, that cuts both ways: you inherit no free kill (there is no FWD canceling claim 1 that you can wave at the plaintiff), but you also inherit no estoppel — you are the first mover, and any § 102/§ 103 ground you can find is fresh. Contrast this with the "the patent has survived two IPRs and is hardened" scenario, which would make an IPR-based defense an uphill fight; here, the PTAB has never opined on this patent at all.

Because there are no proceedings, the per-proceeding template below has nothing to populate. I substitute a verification/exclusion record so the negative finding is auditable, then give the strategic picture.

(No proceedings to report — verification record)

• Type: N/A — no IPR, PGR, CBM, or derivation proceeding identified.
• Filed: N/A
• Status: No AIA trial on file (USPTO ODP structured data), corroborated by web search of PTAB/CAFC/litigation sources on 2026-09-22.
• Judge panel: N/A — no panel ever assigned.
• Petition grounds: N/A — no petition filed.
• Institution decision: N/A
• Final Written Decision: N/A — no § 318(a) FWD exists for this patent.
• Settlement / termination: N/A
• Appeal: N/A — no PTAB decision to appeal, so no CAFC docket exists (see the earlier Litigation Summary, which independently found no Federal Circuit proceeding involving this patent; that finding is consistent with, and explained by, this one).
• Defensive value: Neutral-to-favorable. The absence of any IPR means the art that would have been asserted by an earlier, better-funded challenger has not been road-mapped for you, and no petitioner has burned any ground. It also means there is no PTAB record to mine for claim-construction positions or admissions by the patent owner.

Number-collision audit (hits expressly excluded)

Every search hit carrying these digits was a coincidental collision. Flagging them so the negative is repeatable:

Strategic summary

Claim status. All of claims 1–20 of US 11,054,243 are UNTESTED at the PTAB. There are no canceled claims, no claims held unpatentable, no claims confirmed patentable, and no certificates issued under 35 U.S.C. § 318(b). Consequently there is no PTAB-narrowed claim set to work with — the claim language in the earlier summary (independent claims 1, 10, 14 and their dependents) is the operative scope, understood against the as-issued specification and the § 371 national-stage file history of PCT/US2018/029423.

Estoppel landscape — the key practical point. Because no petitioner exists, no § 315(e)(2) estoppel attaches to anyone on this patent. A defendant today may raise any § 102/§ 103 ground supported by patents and printed publications in an IPR (§ 311(b)) without inheriting anyone else's forfeitures. Two constraints are worth stating precisely:

1. IPR scope is statutory, not optional. IPRs are limited to grounds "that could be raised under section 102 or 103 and only on the basis of prior art consisting of patents or printed publications" (35 U.S.C. § 311(b)). A § 112 written-description/enablement or § 101 strategy cannot be run through IPR.
2. The PGR window is closed. The patent issued 2021-07-06; the § 321(c) nine-month post-grant window expired on or about 2022-04-06. Post-grant review — the only PTAB vehicle that reaches § 112 and § 101 — is therefore no longer available. Ex parte reexamination remains available (no estoppel, but again § 102/§ 103 on patents/printed publications only).

If you are not yet a defendant, note that an IPR petition is not time-barred (§ 315(b) is triggered by service of a complaint alleging infringement), but that clocks start the day you are served.

Pattern signals. None exist, because there is no proceeding. There is no repeat petitioner, no joinder, no General Plastic follow-on petition problem, and no defensive aggregator (Unified Patents or similar) in the chain — no Unified caselist or NPE-database entry tied to this number surfaced in either this analysis or the earlier Litigation Summary. The patent owner, The Texas A&M University System, has not been a PTAB respondent on this patent and has pursued no PTAB appeals. Contextually this fits the prior sections' finding of no district-court, ITC, or CAFC activity: an unasserted, university-owned SS-OCT instrumentation patent is exactly the profile that attracts few or no AIA challenges.

Discretionary-denial factors, should you file. With no parallel district-court case, the Fintiv factors (§ 314(a) discretionary denial) would generally weigh toward institution rather than denial. Advanced Bionics / § 325(d) is unknown: it depends on whether the closest calibration art was before the examiner during prosecution of the PCT national-stage application — worth pulling the file wrapper before drafting.

One caution on the patent owner's identity. The owner is a state university system, which occasionally invites a state-sovereign-immunity objection to PTAB jurisdiction. I am not asserting a settled rule here; the PTAB and Federal Circuit case law on state immunity in AIA trials has shifted and I have not verified the current authorities in this session. In any event, no immunity issue has ever been raised on this patent, because no petition has ever been filed. Flag it as a procedural risk to research, not as a known obstacle.

Recommended next steps

1. You have no FWD to cite. Since 0 proceedings exist, do not represent to a court or counterparty that any claim of US 11,054,243 has been invalidated, narrowed, or held valid — none has. Any statement to the contrary would be sanctionable.
2. Confirm the null result on the number-keyed sources before relying on it. The authoritative checks are the USPTO PTAB End-to-End system (https://ptacts.uspto.gov/ptacts/) and the USPTO PatentCenter "Patent Docket"/PTAB tab for application 16/497,036; also run a Unified Patents caselist query and a Docket Alarm/PACER search keyed on "11,054,243" and "16/497,036". My searches corroborate the structured data, but a number-keyed portal query is the certified form of the negative.
3. If you intend to challenge, act on the calendar. An IPR petition must be filed within one year of service of a complaint asserting this patent (§ 315(b)); and note that § 315(a)(1) bars an IPR if you first file a civil action seeking a declaratory judgment of invalidity. Because PGR expired 2022-04-06, § 112 and § 101 must be litigated in court (or pursued via reexamination only for § 102/§ 103 art).
4. Build the invalidity case from scratch. With no prior petitioner, there is no road map — mine the file wrapper of PCT/US2018/029423 / US 16/497,036 for the examiner's reasons for allowance and for any art cited against the MZI-calibration and level-crossing-sampler subject matter, then compare against SS-OCT k-clock/calibration literature (the patent itself names square-law envelope detection, Kalman filtering, and interpolated DFT as known demodulation techniques, which is a useful starting point for a § 103 motivation-to-combine narrative).
5. If PTAB activity does appear later, the milestones to watch are: filing → PO preliminary response (3 months) → institution decision (statutory 6 months from filing, § 314(b)) → PO response and petitioner reply → oral hearing → FWD within 12 months of institution (§ 316(a)(11), extendable to 18 months for good cause). None of those clocks is running today.

I'll research the assignment record for US 11,054,243, focusing on reel/frame data and correspondents.

Let me dig deeper into the assignment record specifics.

Let me try to pin down the specific reel/frame and check for any post-issuance transfers.

Ownership & Assignment Analysis — US Patent No. 11,054,243

Scope note: I canvassed Google Patents legal events, Justia, the Texas A&M OAKTrust institutional repository, the granted-patent PDF (patentimages), IEEE patent-citation pages, and targeted assignment/law-firm queries. One important limitation up front: the public web sources I could reach surfaced the existence and date of a recorded assignment but did not expose the reel/frame number or the assignment correspondent of record. The USPTO Assignment Center (https://assignmentcenter.uspto.gov/) and its legacy mirror (https://assignment.uspto.gov/patent/index.html) are the authoritative sources for those two fields, and I could not execute a number-keyed query against those databases in this session. I therefore flag reel/frame and correspondent as unverified rather than guessing. Everything else below is grounded in cited sources.

Inventors

Pattern assessment — no unusual inventor-departure signal. All three inventors were Texas A&M-affiliated at filing, and the record shows continued affiliation after filing: Zavareh presented the underlying work ("Flash OCT") at a Texas A&M AMSC seminar on 2018-09-10, roughly five months after the Apr. 25, 2018 filing. There is no evidence of all inventors departing the assignee within 12 months — the classic precursor to a portfolio fire-sale — and the assignment itself (inventors → university, recorded 2019-09-24) is the standard university-captures-rights instrument, not a departure event. The only commercialization-adjacent fact is Zavareh's Fall 2017 NSF I-Corps grant; that is an inventor-side de-risking signal, not an ownership transfer, and it does not appear in the recorded chain.

Original assignee

The Texas A&M University System, College Station, TX — named on the issued patent at (71) Applicant and (73) Assignee.

• Primary line of business: Public university system (land-grant, State of Texas). It is a research/education institution, not a commercial manufacturer.
• Does it ship a product embodying the claims? No. The claims cover an SS-OCT calibration-clock circuit / acquisition circuit (a mixed-signal electronic device). No Texas A&M commercial product practicing claims 1/10/14 surfaced. Monetization is via its tech-transfer/licensing arm (Texas A&M Innovation, the system's commercialization office — visible in the System's FY2025–FY2027 internal audit plan), i.e., licensing and spinouts rather than direct sales.
• Current status: Operating. The system is an active, solvent state entity; it is not an SEC registrant, so no 10-K/8-K is applicable. No bankruptcy, dissolution, acquisition, or reorganization of the assignee appears.

Assignment timeline

Only one recorded assignment is visible in the public record I could reach. It is the original inventor-to-university assignment, and — as of the sources canvassed — there are no post-issuance assignments of US 11,054,243. The chain therefore terminates at the original assignee.

• Executed date: not exposed in the sources reached / recorded 2019-09-24 — Reel not retrieved / Frame not retrieved
  • Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (see document for details)
  • Assignor: HOYOS, Sebastian; PACHECO BARAJAS, Oscar Joseu; ZAVAREH, Amir Tofighi
  • Assignee: THE TEXAS A&M UNIVERSITY SYSTEM
  • Correspondent: not confirmed. The prosecution firm of record for Texas A&M filings is Conley Rose, P.C. (Houston, TX — 777 North Eldridge Parkway / mailing 1001 McKinney St, Suite 1800), whose stated "representative clients" include Texas A&M, and whose practitioners Niraj P. Patel and Ryan D. Jenlink are each affiliated with ~165–173 Texas A&M System applications. That makes Conley Rose the likely recording correspondent, but this is a prosecution-counsel inference, not a verified assignment-correspondent-of-record fact — do not treat it as documented.
  • Context: Internal capture of rights — the standard university instrument by which named inventors assign their inventions to the institutional assignee ahead of/accompanying the U.S. national-stage entry (event date 2019-09-24 aligns with the § 371(c)(1),(2) date for application 16/497,036). Not a sale, securitization, or asserter transfer.

Sources for the single recording: Google Patents "Legal Events" (shows the 2019-09-24 reassignment entry, assignors Hoyos / Pacheco Barajas / Zavareh; conveyance text "ASSIGNMENT OF ASSIGNORS INTEREST"); OAKTrust and Justia both independently list The Texas A&M University System as assignee.

Timeline diagram

timeline
    title Ownership of US 11054243
    2017 : Provisional application filed
    2018 : PCT application filed
    2019 : Inventors assign rights to Texas AampM System
    2021 : Patent issued to Texas AampM System

Note: "Amp" is used above only because the ampersand breaks Mermaid parsing; the assignee's true legal name is "The Texas A&M University System."

NPE / troll-pattern signals

Cross-references with prior sections: This section is consistent with both the Patent Summary (assignee = The Texas A&M University System; assignment recorded 2019-09-24; assignors Hoyos / Pacheco Barajas / Zavareh) and the Litigation Summary (no litigation; the several "'542" and "11,054,243" hits are number collisions, not this patent). No contradiction to flag between sections.

Verdict

Insufficient data (only the original assignment).

Per the rubric, this verdict is the literal fit because the entire recorded chain consists of a single instrument — the inventor-to–Texas A&M University System "ASSIGNMENT OF ASSIGNORS INTEREST" recorded 2019-09-24 — and there are no post-issuance assignments at all. That is an affirmative finding, not an evidentiary gap in the ordinary sense: every one of the eight NPE/troll signals is "not present" (or unverifiable solely because there is only one link to test for recurrence). The patent is held by a solvent operating state university system that licenses via Texas A&M Innovation, has never been asserted in any forum I could identify, and has never been transferred to a licensing-only entity. There is no NPE pattern here; the only genuine data gaps are the reel/frame number and the assignment correspondent of record, both of which require a direct Assignment Center lookup.

Verify at: https://assignmentcenter.uspto.gov/ (search patent number 11,054,243 or application 16/497,036 to obtain the reel/frame, execution date, and correspondent for the 2019-09-24 recording, and to confirm no later assignments exist).

I'll search for the patent's citation record and prior art references.

Let me retrieve details on each cited reference and the PCT search report.

Prior-Art / Citation Analysis — US 11,054,243 B2

Patent analyzed: US 11,054,243 B2 — "Electronic device for automatic calibration of swept-source optical coherence tomography systems" (Hoyos et al.; The Texas A&M University System). Application 16/497,036; filed Apr. 25, 2018; priority to provisional 62/490,098 (Apr. 26, 2017); issued Jul. 6, 2021.

AIA note (governs the § 102 framework): The application was filed after Mar. 16, 2013, and claims priority to an Apr. 26, 2017 provisional. All prior-art analysis below therefore runs under AIA 35 U.S.C. § 102(a)(1) (patented, described in a printed publication, or in public use/on sale before the effective filing date) and § 102(a)(2) (U.S. patents, U.S. patent application publications, and PCT applications designating the U.S. that were "effectively filed" before the effective filing date), with the § 102(b)(1)/(b)(2) exceptions available. There is no § 102(e)/102(g) pre-AIA analysis applicable.

1. Scope and source of the citation record

The front page "(56) References Cited" block of US 11,054,243 B2 (verified against the granted-patent PDF at patentimages, and the Justia "Referenced Cited" reproduction at https://patents.justia.com/patent/[11054243](/patent/11054243)) lists:

• 6 U.S. patent application publications (no U.S. granted patents, and no foreign patent documents, are listed on the U.S. front page); and
• 7 "Other Publications" items (the NPL set), including the International Search Report for this application's own PCT.

Two framing cautions before the reference-by-reference treatment:

1. Citation ≠ anticipation. These references appear in the IDS/ISR material cited on the face of the patent. The patent issued with all 20 claims intact; the record I retrieved does not show any § 102/§ 103 rejection on these references. A reference listed on the face of a patent is evidence it was considered, not that it was found anticipatory.
2. Several of the "prior art" items are the inventors' own prior work (Zavareh / Barajas / Hoyos / Pacheco Barajas), which triggers the § 102(b)(1)(A) grace-period exception analysis set out in § 4 below — a point that materially changes the anticipation picture.

2. U.S. patent-application publications cited

The six U.S. publications, per the front page, are: 2008/0212075 A1 (Paulus et al.); 2011/0216325 A1 (Schmitt); 2012/0013914 A1 (Kemp et al.); 2013/0060131 A1 (Oghalai et al.); 2013/0182259 A1 (Brezinski et al.); 2016/0161466 A1 (Kuan Germano).

2.1 US 2008/0212075 A1 — Paulus et al. — "Short-wavelength coherence tomography"

Description: Short-wavelength (XUV / soft X-ray) coherence tomography using a femtosecond laser, beam-splitter, high-harmonic generator, sample holder, reference reflector, detector, and a processor that converts measured interference into a 3-D data set. The disclosure is directed to nanometer-scale axial resolution via EUV/X-ray illumination, not to wavenumber calibration, k-clocking, or swept-source timing.

Potentially anticipates: None of claims 1–20. Nothing in this reference addresses demodulation of an optical calibration signal to wavenumbers, level crossing, or calibration-clock generation — the core of every independent claim (1, 10, 14). Its only overlap with the '243 patent is generic OCT architecture (beam splitter, detector, processor). It is best characterized as same-assignee background art, not anticipation art. (Same assignee — Texas A&M — which also means it is common-ownership background, relevant to § 103 joint-research considerations rather than § 102.)

2.2 US 2011/0216325 A1 — Schmitt — "Methods and apparatus for swept-source optical coherence tomography"

Description (material to the '243 claims): The reference discloses an SS-OCT data-collection apparatus in which a sample clock generator is configured to clock an analog-to-digital converter, and that ADC is configured to sample interference signals at the output of the main interferometer. The sample clock generator expressly may include a Mach–Zehnder interferometer (also Michelson / Fabry–Perot / common-path), a photoreceiver, an automatic gain control amplifier, a frequency multiplier, a zero-crossing detector, and/or a clock switch. It further discloses an analog multiplier configured to perform a squaring function on an input interference signal — i.e., square-law envelope processing of the calibration/clock interference signal — and a digital control system that stabilizes the tuning element using control signals derived from the sample clock generator. (Verified against the FPO/patenthub reproductions of the '325 publication text and the EP 3785615 A1 publication-server text.)

Potentially anticipates — this is the strongest U.S. patent reference on the face of the '243 patent:

• Claim 1 — The MZI sample-clock interferometer + photoreceiver + ADC-clocked-by-sample-clock architecture maps onto the claimed first photodetector → first ADC → level-crossing/clock-pulse pipeline; the explicit "squaring function" analog multiplier is the same physical phenomenon as the "square law envelope detection" recited in claim 5, and the zero-crossing detector is the genus of the claimed "level crossing sampler." The open question for § 102 is whether the reference explicitly demodulates the digitized calibration signal into wavenumber values and clocks the interferometer ADC on wavenumber level crossings, or whether it does the clocking in the analog/optical domain (k-clock). If the latter, the reference is at most a § 103 combination, not anticipation.
• Claims 5 and 13 (square-law envelope detection) — direct structural/functional overlap via the recited analog squaring multiplier.
• Claims 7 and 17 (DAC producing an analog wavenumber/calibration profile signal) — the reference's driver/control-signal path from the digital control system is a close analogue; verify whether it is a DAC-generated calibration profile.
• Claims 10 and 14 — potentially, for the same reasons, if the reference's sample-clock generator is driven by a digitized-and-demodulated wavenumber rather than an optical k-clock etalon; and claim 14's second photodetector/second ADC clocked by the calibration clock is squarely within the reference's "ADC clocked by the sample clock generator" disclosure.
• Claims 2, 15, 16, 19 — the reference's photoreceiver + InGaAs-era 1300 nm SS-OCT context raises § 102/§ 103 questions on the InGaAs-photodiode and on-chip limitations, but I cannot confirm InGaAs specificity from the retrieved text.

2.3 US 2012/0013914 A1 — Kemp et al. — "Apparatus and methods for uniform frequency sample clocking"

Description (material to the '243 claims): Discloses a Uniform Frequency Sample Clock for an SS-OCT system. Critically, it describes "Pathway 1: Characterizing the Swept Laser Source" — creating a digital representation of the waveform based on characterization data and repeatedly outputting the characterization data for each subsequent optical trigger as the laser sweeps, and "Pathway 2: Auxiliary Wavemeter Coupled with an A/D and D/A Converter." It expressly discloses a D/A converter / arbitrary waveform generator in the clock path, a wavemeter (Mach–Zehnder, Michelson, or Fabry–Perot), and output of a clock that provides linear sampling in the wavenumber (k) domain, allowing direct Fourier transformation, i.e., sampling the OCT fringe data in the k-domain for real-time imaging. (Verified against the FPO/patenthub reproduction of the '914 publication and the US 9,310,182 B2 specification.)

Potentially anticipates:

• Claim 1 — "characterizing the swept laser source → digital representation of the waveform → D/A → k-clocked ADC" is a very close read on the claimed first-photodetector → first-ADC → processing-unit-demodulation → level-crossing-clock pipeline. The § 102 weakness for the reference is the same as for Schmitt: whether the disclosed pipeline digitizes and demodulates the MZI/wavemeter signal to recover wavenumber per sample (as claim 1 requires) or merely pre-characterizes the source and replays it.
• Claim 7 (DAC converting the sequence of wavenumber digital values into an analog wavenumber signal) — the reference's D/A converter / arbitrary waveform generator in the clock path is the closest cited disclosure of this element; strong § 102 candidate on claim 7 in combination with an independent claim it depends from.
• Claims 10 and 14 — potentially, on the same "wavenumber-domain (k-space) sampling of the fringe signal" rationale; claim 14's "second ADC samples the interferometric signal in response to the calibration clock pulse" is the definition of the reference's uniform-frequency sample clocking.
• Claim 15 (integrated-circuit/on-chip) and claim 17 — verify against the reference's hardware description; the reference is explicitly FPGA/processing-unit oriented, which bears on claim 15.

2.4 US 2013/0060131 A1 — Oghalai et al.

Description / caveat: My retrieval of the full text and assignee for this publication was truncated in this session; I can confirm the citation, inventor, and publication date as they appear on the '243 front page but I did not obtain its specification text, so I am not able to map it to specific claims with confidence. Based on the inventor (Oghalai, an otologic-OCT researcher) it is expected to be an OCT-imaging application rather than a k-clock/calibration application, but treat that expectation as unverified. Recommend pulling the document from PatentCenter/Google Patents before relying on it either way.

2.5 US 2013/0182259 A1 — Brezinski et al.

Description / caveat: Also truncated in this session; the citation, inventor, and date are confirmed from the '243 front page. Note the potentially significant link: Mark E. Brezinski is a named co-author of the Azimi / Liu / Brezinski NPL reference (J. Biomed. Opt. 2010) discussed in § 3.5 below, which is directed to real-time high-performance calibration of high-speed SS-OCT. If this '259 publication is a patent-side counterpart of that work, it could be materially more relevant to claims 10/12 (Fourier-transform/IpDFT calibration) than its generic listing suggests. Verify before relying.

2.6 US 2016/0161466 A1 — Kuan Germano

Description / caveat: The '243 front-page listing for this item carries the classification notation G01R 33/1269 and class 702/19 in the fetched PDF rendering. G01R 33/1269 is the magnetic-resonance classification area, which suggests a measurement/instrumentation disclosure rather than an SS-OCT calibration one — but I could not retrieve the specification text in this session and cannot exclude relevance. Because its publication date is inside the one-year window before the Apr. 26, 2017 priority date, if it survives the § 102(b)(1) analysis it could be § 102(a)(1) art; my working assessment is low anticipation risk pending verification.

3. "Other Publications" (NPL) cited

3.1 Zavareh et al., A novel continuous time ternary encoding based SS-OCT calibration, IEEE BioCAS 2016

Description / relevance: This is the single most technically on-point item on the face of the patent, and it is by the same three inventors (Zavareh, Barajas, Hoyos). It is the source of the "Continuous Time Ternary Encoding (CTTE)" sampler that the '243 specification expressly names — the '243 description states its level-crossing samplers may include "a Continuous Time Ternary Encoding Sampler." A CTTE sampler is a level-crossing/asynchronous sampler, which is the literal claim-1 "level crossing sampler."

Potentially anticipates: Claims 1, 6, 7, 8, 9, 10, and 14 are all potentially readable on this reference if it discloses (or renders obvious) the full pipeline: photodetection of an MZI calibration signal → ADC digitization → demodulation to a wavenumber sequence → level-crossing sampling → calibration clock pulse. The threshold question is whether the BioCAS paper discloses the demodulation-to-wavenumber (processing-unit) step of claim 1/claim 10, or only the CTTE level-crossing sampler end of it. Because the paper is short (pp. 5–8), the pipeline-as-a-whole is unlikely to be fully disclosed; the level-crossing sampler architecture of claims 8–9 is the element most at risk.

3.2 Zavareh, Barajas & Hoyos, An efficient estimation algorithm for the calibration of low-cost SS-OCT systems, IEEE ISBI 2017

Description / relevance: Directed to an estimation algorithm for calibrating low-cost SS-OCT systems — i.e., the demodulation/estimation half of the claimed pipeline. Mapping to the claim set, this is the citation most likely to bear on:

• Claim 10 (method of demodulating the calibration digital values to wavenumber values) — the paper's subject matter.
• Claim 12 (demodulation via interpolated discrete Fourier transform) and claim 3 (Kalman filtering) — the "efficient estimation algorithm" framing is consistent with an IpDFT or Kalman-type estimator; verify which estimator the paper actually uses.

3.3 Barajas, Zavareh & Hoyos, Towards an on-chip signal processing solution for the online calibration of SS-OCT systems, IEEE ISCAS 2017

Description / relevance: Directly addresses an on-chip (integrated) signal-processing implementation for online (real-time) calibration of SS-OCT. If it were prior art, it would bear on claim 15 (integrated-circuit implementation) and on claims 1/10 (real-time demodulation). As noted, timing likely removes it from the § 102(a) universe.

3.4 Pacheco Barajas, Highly Efficient Spectral Calibration Methods for Swept-Source Optical Coherence Tomography, M.S. thesis, Texas A&M University (2017)

Description / relevance: A thesis-length treatment of "efficient spectral calibration methods for SS-OCT" by the second named inventor. Given its scope, it is the cited item most likely to disclose, in combination, demodulation-based calibration-profile extraction and level-crossing/non-uniform sampling — i.e., the full arc of claims 1, 10, 11, 12, 13, and 14. This is a candidate to place the Kalman-filter (claim 3/11) and IpDFT (claim 4/12) and square-law envelope-detection (claim 5/13) variants in the prior art in the same inventor's own words. Verify the library embargo/deposit date: a thesis that was publicly catalogued only after Apr. 26, 2017 is not § 102(a)(1) art and, being the inventor's own work, is also excluded by § 102(b)(2)(A) if it qualifies as a § 102(a)(2) disclosure.

3.5 Azimi, Liu & Brezinski, Real-time and high-performance calibration method for high-speed swept-source optical coherence tomography, J. Biomed. Opt. 15(1) 016005 (2010)

Description / relevance: This is the most important third-party NPL reference on the face of the patent. It is squarely about real-time calibration of high-speed SS-OCT, i.e., computing a calibration/resampling profile from the swept-source calibration signal and using it to linearize the interferometric data before Fourier transformation — the general problem the '243 patent addresses.

Potentially anticipates:

• Claim 10 (method of converting the calibration signal, digitizing it, demodulating to wavenumber values, and generating a calibration clock pulse) — the reference's "calibration method for high-speed SS-OCT" is the closest third-party disclosure of the method's purpose; the § 102 question is whether it discloses the level-crossing-triggered ADC sampling of the interferometric signal (claim 10's final clause), as opposed to software resampling after the fact.
• Claim 12 (interpolated discrete Fourier transform demodulation) — a real-time Fourier-domain calibration method is the natural § 102/§ 103 starting point for the IpDFT limitation.
• Claim 14 — potentially, for the two-channel (calibration + interferometric) acquisition architecture.

3.6 Manapuram, Manne & Larin, Phase-sensitive swept source optical coherence tomography…, J. Appl. Phys. 105.10 (2009): 102040

Description / relevance: Phase-sensitive SS-OCT imaging/quantification. Because it is phase-sensitive SS-OCT, the reference necessarily addresses sweep-to-sweep stability and wavenumber sampling uniformity (the same motivation underlying the '243 patent and the "framing clock linkage" of the '243 FIG. 7 asynchronous-to-synchronous converter).

Potentially anticipates: Best candidate against claim 18 (asynchronous-to-synchronous conversion) and claim 20 (the framing/divider linkage between the asynchronous calibration clock and the synchronous read clock), to the extent a phase-sensitive SS-OCT system must align A-lines across sweeps. Low-to-moderate risk; § 102 (single-reference anticipation) is unlikely; § 103 is the more realistic exposure.

3.7 PCT/US2018/029423 International Search Report and Written Opinion dated Jul. 6, 2018

Relevance: This is the most probative single document to retrieve next, because it is the ISA's own X/Y/A categorization of the closest art. My source-fetch for the underlying PCT publication WO 2018/200712 A1 (pub. Nov. 1, 2018) did not return the search-report body in this session, and I therefore cannot state which references the ISA rated "X" (claim-anticipting) versus "A" (general state of the art). The U.S. national-stage examiner's own listing of these six U.S. publications and seven NPL items (with no X-rated rejection surviving to issuance) suggests the ISA/examiner rated them non-anticipatory — but that is an inference, not a verified finding.

4. The § 102(b)(1)(A) / (b)(2)(A) grace-period problem (critical to this patent)

This is the point most likely to change the answer, so I am flagging it explicitly.

• Effective filing date. Claims entitled to the Apr. 26, 2017 provisional (62/490,098) have an effective filing date of Apr. 26, 2017. Claims not so entitled fall back to Apr. 25, 2018 (or, for subject matter first added in the non-provisional/PCT, to that date).
• Inventor-own disclosures. Four of the seven cited NPL items are authored by the named inventors: the BioCAS 2016 paper (Oct. 2016), the ISBI 2017 paper (Apr. 2017), the ISCAS 2017 paper (May 2017), and the Pacheco Barajas M.S. thesis (2017).
• Consequence. For claims entitled to the Apr. 26, 2017 priority date, the BioCAS 2016 and ISBI 2017 disclosures are within one year of the effective filing date and are therefore excepted from prior art under § 102(b)(1)(A) as disclosures by the inventor(s) (assuming the "obtained directly or indirectly from the inventor" prong is satisfied — note the papers list "Oscar Barajas" while the patent lists "Oscar Joseu Pacheco Barajas," an apparent same-person naming variant). If instead a claim is not entitled to the provisional (e.g., claim language added only in the 2018 filing), the Apr. 26, 2017–Apr. 25, 2018 gap opens: the Oct. 2016 BioCAS paper then falls more than one year before the effective filing date and becomes available as § 102(a)(1) art with no grace-period exception.
• Net effect. The internally-authored NPL is a § 102 risk mainly for non-priority-entitled claim scope, while the third-party art (Schmitt; Kemp; Azimi/Liu/Brezinski) is the art that is unambiguously available regardless of priority.

5. Consolidated mapping table — cited reference vs. claim

Bottom line on anticipation. No cited reference, on the face of the record I retrieved, is a clean § 102 anticipation of independent claims 1, 10, or 14. The two references that come closest to a full-pipeline § 102 read are US 2011/0216325 A1 (Schmitt) — MZI sample-clock generator + photoreceiver + ADC clocked by that generator + explicit square-law "squaring" multiplier + zero-crossing detector — and US 2012/0013914 A1 (Kemp) — characterized swept-source waveform, digital representation, D/A converter, and k-domain sample clocking of the fringe signal. Both appear to stop short of the '243 patent's stated point of novelty (digitizing the calibration signal and demodulating it to a per-sample wavenumber value sequence that then drives the level-crossing clock); if the examiner treated them that way, that is consistent with the claims issuing unamended. The strongest third-party § 103 combination is likely Schmitt or Kemp as primary reference with Azimi/Liu/Brezinski (2010) for the real-time Fourier-domain calibration teaching.

6. Explicit limitations of this analysis

• Truncated retrieval. I could not obtain specification text for US 2013/0060131 A1 (Oghalai), US 2013/0182259 A1 (Brezinski), or US 2016/0161466 A1 (Kuan Germano) in this session, so I have deliberately not asserted claim mappings for them. My searches were also cut off before I could retrieve the PCT/US2018/029423 ISR body and the WO 2018/200712 A1 search report, which would give the ISA's own X/Y/A ratings and are the highest-value next documents.
• No file history reviewed. I have not examined the USPTO PatentCenter prosecution history (IDS transmittals, non-final/final rejections, examiner's reasons for allowance). The absence of a rejection in the record I saw is an inference from issuance, not a verified fact.
• "Anticipates" is used in the task's sense ("potentially anticipates"). My per-claim mappings are candidate § 102 mappings based on reference abstracts/summaries and family-level descriptions, not element-by-element claim charts. A definitive § 102 opinion requires the full reference texts and a limitation-by-limitation comparison.
• Dates. The NPL publication dates for the IEEE conference papers and the TAMU thesis (BioCAS 2016; ISBI 2017; ISCAS 2017; 2017 thesis) are stated at conference-year granularity on the patent face, and the exact public-availability dates are dispositive under § 102(b)(1)(A) and under the priority analysis in § 4. Verify each against the publisher/repository record before relying on the grace-period conclusions.
• Identifier fidelity. All patent and publication numbers above are reproduced exactly as they appear in the '243 record (including "US 2013/0182259 A1," "US 2012/0013914 A1," "US 11,054,243 B2," and "PCT/US2018/029423"). The inventor-name variant "Oscar Joseu" (Google/assignment) vs. "Oscar Joscu" (granted-PDF OCR) noted in the earlier verification section is a rendering discrepancy I have not normalized.
• Consistency with prior sections. This analysis is consistent with the earlier summary and litigation findings: no CAFC, district-court, ITC, or PTAB proceeding involving US 11,054,243 surfaced, and the "'542 patent" hits (surface-cleaning apparatus, exercise machine, voice-activity-detection, ST1 v. Samsung) remain excluded as number collisions.

I'll start by noting a gap and then gathering prior art. Let me run several searches in parallel.

Good — strong prior art is surfacing. Let me drill into the most claim-critical references.

Obviousness Analysis — US 11,054,243 B2 under 35 U.S.C. § 103

0. Source-gap disclosure (read this first)

The task instructs me to "use the results from the Prior Art section of this page." No Prior Art section was supplied in the materials given to me. The previously generated sections in this thread are (a) the Patent/Verification Summary and (b) the Litigation Summary. Neither contains a prior-art reference list.

I therefore performed an independent prior-art search. Two constraints on this work, stated plainly:

1. I hit the tool-call limit mid-search. My queries on (i) level-crossing/CTTE ADC art, (ii) Kalman-filter wavenumber extraction in OCT, and (iii) interpolated DFT (IpDFT) for k-space linearization did not execute. Any statements I make about those three subjects are therefore grounded in general knowledge of the art, not in retrieved primary sources. They are flagged as such below.
2. All dates are as reported by the retrieved sources. Where a reference's pre-26-Apr-2017 publication could not be confirmed, I say so.

If a prior-art section exists in the fuller page record, treat my reference list as supplementary and re-run the element maps against that list.

1. Governing law and the person of ordinary skill

• Effective filing date: 26 April 2017 (provisional 62/490,098). PCT/US2018/029423 filed 25 Apr 2018; § 371 national stage 16/497,036. AIA § 102/§ 103 apply.
• PHOSITA: a person with a B.S. (or M.S.) in electrical engineering, biomedical optics, or physics, plus 2–4 years' experience in swept-source/Fourier-domain OCT instrumentation, including mixed-signal design (photodiode front ends, high-speed ADCs, FPGA/DSP signal conditioning) and k-space linearization.
• Framework: KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398 (2007) — a claimed combination is obvious where the elements were each known in the field, the problem was known, and the solution was a predictable use of prior-art elements for their known functions. In re Keller / In re Merck — art may be combined for what it fairly teaches, not just for the problem each reference addressed. MPEP 2143 — the classic rationales (combining prior art elements; substituting one known element for another; using a known technique to improve similar devices in the same way; applying a known technique to a known device ready for improvement). Also In re Minton v. NASD, 336 F.3d 1373 (Fed. Cir. 2003) — a "whereby" clause generally carries no patentable weight unless it expresses a necessary condition of the claimed invention; this matters to claim 1's trailing clause (see § 3).

2. Independent-claim element decomposition

Key claim-construction fork. "Level crossing sampler" (E4) is a [nonce term] + structural noun without recited structure or algorithm. If construed under § 112(f) (cf. Williamson v. Citrix, 792 F.3d 1339), it reads on FIGS. 5A–5C and equivalents; if not (the "sampler" noun tends to rebut the Williamson presumption, cf. Zeroclick v. Apple), it reads on any comparator/digital-threshold construct that fires on wavenumber threshold crossings. Either way, the prior art below meets it — but the 112(f) branch narrows the doctrine-of-equivalents tail.

3. The primary prior art and what each teaches

4. The obviousness rejections, claim by claim

Rejection 1 — Claim 1 over Axsun US 2016/0025478 A1

• E1/E2: k-clock module → photoreceiver → constant-rate ADC sampling of the reference signal (the '478 "k-clock dataset").
• E3: the FPGA phase measurement (ATAN2) with phase unwrapping recovers the per-sample phase — the wavenumber associated with each digitized calibration sample. That is the claimed "demodulate … to obtain a sequence of SS-OCT wave number digital values, where each … corresponds to one of the … calibration signal digital values."
• E4: "a resampling event is triggered by the multiplied phase crossing an integer boundary." An integer-boundary crossing of a phase/wavenumber ramp is a level crossing, and the trigger is the calibration pulse.
• E5: the interference dataset is resampled at those events — the "whereby" clause, which under Minton adds little or no weight.
• Result: claim 1 is anticipated-in-substance; at minimum obvious under § 103. The only genuine gap is that Axsun describes an internal FPGA "resample event" rather than an externally emitted clock pulse into a hardware ADC. Claim 1 does not require the pulse be routed to a different converter — its "whereby" clause is satisfied if the interferometric data is sampled on those events. If the patentee presses the "clock pulse output" distinction, see Rejection 2.

Rejection 2 — Claim 1 over Axsun '478 in view of Volcano US 8,049,900 B2 / US 2012/0013914 A1

Volcano supplies exactly the missing piece: digitize the calibration signal, process it digitally, D/A-convert it (Pathway 2 / arbitrary waveform generator), and drive the digitizer's external clock input — and, in the EP counterpart, digitally modify the acquired k-space clock and then use it to clock the ADC. Motivation is explicit and identical to the '243 patent's own stated motivation: Volcano disparages software remapping (phase sensitivity loss, artifacts, computational inefficiency, bandwidth) and the jitter/Hilbert-transform overhead of alternative clocking. A PHOSITA seeking a robust, real-time, hardware-implementable k-clock would combine Axsun's digital phase/level-crossing engine with Volcano's ADC→DSP→DAC→external-clock topology. Claim 1 obvious; claim 7 (DAC converting the wavenumber stream back to analog k(t)) met expressly by Volcano's D/A/arbitrary-waveform generator. Claim 6 (software/firmware/hardware logic implementation) is met by either reference's digital implementation.

Rejection 3 — Claim 10 (method) over Axsun '478

Purely the method counterpart of the above, and met almost verbatim: sample reference signal (converting optical→electrical and analog→digital), measure phase (= demodulate to wavenumber), and generate a resampling/clock event when the phase crosses an integer boundary (= "in response to the SS-OCT wave number digital value matching one of a plurality of predefined SS-OCT wave number digital values, generating an SS-OCT calibration clock pulse"), with the interference signal resampled on the event.

Rejection 4 — Claim 14 over Axsun '478 (or Volcano '900) in view of LightLab US 7,916,387 / US 2011/0255095 / US 2018/0003482

Claim 14 adds E6. LightLab/Thorlabs expressly teaches the second photodetector + ADC clocked by the calibration clock derived from the MZI, with the photoreceiver/InGaAs detection and the external-clock-input architecture, and even parallel ADC channels clocked by the same ADC clock. The "processing unit … process a plurality of SS-OCT interferometric signal digital values to a light reflection coefficient value" is the ordinary FD-OCT inverse-FFT step, which every reference performs (Axsun: "magnitude … backscattered magnitude at depth z"; Volcano: FFT into the pathlength (z) domain). Claim 14 obvious.

Rejection 5 — Claims 8 and 9 (level-crossing sampler architecture)

The op-amp/comparator/asynchronous-accumulator/feedback-DAC loop is a textbook tracking (servo) quantizer / staircase-reference comparator — the same digital-code-driven DAC-from-an-accumulator structure used in tracking and successive-approximation converters, and functionally the arbitrary-waveform-generator feedback path of Volcano '900 and the digital threshold logic of Axsun '478. A PHOSITA implementing the level-crossing detector of E4 in hardware at MHz rates would predictably select this topology. Motivation: high-speed operation with programmable, monotonically stepped reference levels.

⚠️ Literal-reading defect that affects this analysis. Claim 9 recites "an output of the asynchronous accumulator is coupled to an input of the second ADC, and an output of the second ADC is coupled to the negative input of the operational amplifier." The specification (¶ describing FIG. 5A) instead provides a second DAC 508 there — an accumulator's digital output cannot drive an ADC's input, and an ADC's output cannot serve as the op-amp's reference. Read literally (per the operating rule against auto-correction), claim 9 defines an inoperable circuit and is vulnerable under § 112(b); it also makes a clean element-by-element § 103 rejection of claim 9 awkward, because the claim does not describe what the specification describes. Recommended: treat claim 9 as indefinite/inoperative, or obtain confirmation from the PatentCenter image that the printed claim says "DAC" (the WO 2018/200712 A1 counterpart claim text is the practical cross-check).

Rejection 6 — Claims 3, 4, 5, 11, 12, 13 (Kalman filter, IpDFT, square-law envelope)

These recite how the processing unit demodulates. Caveat: my verification searches on these three points did not run (tool limit), so the following is from general art knowledge, not retrieved sources.

• Square law envelope detection (claims 5, 13): multiplying the MZI signal by itself to recover the amplitude/phase modulation of an amplitude-modulated chirp is a routine RF/signal-processing operation; the Thorlabs reference already recites band-pass filtering of the MZI clock, and the '243 specification itself calls it "a simple square law envelope detector filter."
• Kalman filtering (claims 3, 11): Kalman filtering is a decades-old recursive estimator for phase/frequency/chirp parameters; applying it to a known amplitude-modulated chirp model (the '243 patent's own EQ 1) is a predictable application of a known technique to a known signal. KSR and In re Elsner support obviousness where the only difference is the selection of a known mathematical technique for its known purpose. A rejection here is strong but should be grounded in a specific Kalman-for-frequency-estimation reference (e.g., a radar/chirp-estimation or OCT phase-tracking publication) that I did not retrieve.
• IpDFT (claims 4, 12): interpolated DFT / interpolated FFT frequency estimation is classic (Rife–Vincent 1970; Grandke 1983; Andria 1989) and, again, a known technique applied to a known signal model. Same caveat on the specific reference.

Because claims 3–5/11–13 are selection claims over a small, closed, disclosed set ("Kalman, IpDFT, or square law"), the KSR "predictable variations" and "obvious design choice" rationales apply with particular force; the surprising-results burden is on the patentee.

Rejection 7 — Claims 15–20 (per the prior summary)

Claim 15 (IC implementation — text truncated on Google Patents; verify against PatentCenter), 16–17 (InGaAs photodetectors — met by LightLab's InGaAs photoreceivers), 18–19 (asynchronous-to-synchronous converter between the second ADC and the processing unit — met by Axsun's FPGA FIFO/shift-register re-clocking and by the universally known ping-pong/double-buffered A-scan memory described in the '243 patent's own FIG. 7), and 20 (demodulation options, same as above). Each is a routine implementation choice.

5. Motivation to combine (the KSR/MPEP 2143 case)

1. Same field, same problem. All primary references are SS-OCT/FD-OCT instrumentation addressing the identical recognized defect: the swept source's k(t) is non-linear, so uniform-time sampling corrupts the inverse FFT. Volcano '900: "the laser frequency varies nonlinearly rather than linearly with time." Axsun '478: "The k-clock is used to correct for non-linearity in the frequency sweeping of the swept source."
2. Explicit design incentive with the same endpoint. Volcano '900 states its object is to avoid software remapping (lost phase sensitivity, artifacts, computational inefficiency, bandwidth for a per-interferogram remap array) — the very drawbacks the '243 patent recites as its problem statement. This is the strongest KSR "reason the skilled artisan would have made the combination."
3. Known technique improving a known device in the same way. Axsun's phase-measurement + integer-boundary trigger is a known technique (digital phase tracking) applied to the known k-clock device of Volcano/LightLab, to improve it in the known way (higher depth range, programmable sampling, jitter reduction).
4. Reasonable expectation of success. Axsun reports real-time FPGA operation with a stated depth resolution and imaging-depth figures; Volcano reports working second-generation hardware; both are commercial SS-OCT suppliers. No unpredictable result is required for any claim element.
5. No credible teaching away. Volcano notes that external clocking imposes duty-cycle/shape/amplitude/jitter constraints and that disruptions (e.g., between sweeps) can disable a digitizer — but it then teaches how to solve those constraints (trigger generation, filtering/comparator clean-up, gating while the laser is off), i.e., it teaches toward the claimed approach rather than away. The '243 patent's own background concedes both conventional approaches (software remap; zero-crossing triggering) were known and practiced.
6. The "level crossing" refinement is a predictable extension. LightLab already converts clock crossings into digital pulses (albeit at zero); US 2013/0182259 already interpolates calibration crossing values; Axsun already triggers on integer-boundary crossings. Extending "crossings of zero of the raw fringe" to "crossings of any of a plurality of predefined levels in the demodulated wavenumber domain" is the substitution of one known triggering criterion for another with the predictable benefit the '243 patent claims (arbitrary number of points per A-scan; uniform spacing in k rather than in time).
7. Peripheral claims. Photo-detector material (InGaAs), the choice of one of three named demodulators, and a buffered asynchronous→synchronous memory are each design choices within the ordinary skill level, backed by the prior art in § 3.

6. Secondary considerations (objective indicia)

None is in evidence. The patent issued to a university assignee (The Texas A&M University System), and no record of commercial success, copying, licensing-induced praise, or long-felt-but-unsolved need was located in this session (consistent with the Litigation Summary's negative finding of no assertion). For a § 103 challenge, the patentee would need to establish nexus between any such evidence and the claimed subject matter. Note also that the commercial ss-OCT vendors themselves (Axsun, Volcano, LightLab, Thorlabs) were already shipping hardware-clock and FPGA-resampling solutions — evidence that the problem was recognized and being solved in the industry before the '243 priority date, which cuts against non-obviousness.

7. Weaknesses in the rejection and what would defeat it

1. Presumption of validity and prosecution history. The application was examined (Examiner Bologna) and allowed without, apparently, the Axsun '478 reference being applied. A § 103 rejection faces the clear-and-convincing burden (Microsoft v. i4i) at litigation, and the burden is different (preponderance) at the PTAB. Determining why '478 was not applied — i.e., what the applicant argued and what the examiner cited — is the highest-value next step and was not available in this session.
2. The "clock pulse" vs. "resample event" distinction. All of claim 1's novelty arguable weight rests on E4's output being a pulse and E5's sampling being based on it. Axsun's event may be characterized as an internal FPGA strobe. Volcano closes this, but a patentee will argue that Volcano regenerates a clock from a stored pre-characterized waveform or a dispersion-corrected clock, not from a demodulated wavenumber, and that nothing in Volcano computes k[n] at all. The response is that the Volcano EP counterpart expressly teaches acquiring the k-space clock signal with the ADC, modifying it digitally, and using the result to clock the ADC — and that Axsun teaches the k[n] computation and the integer-boundary trigger. Combined, every limitation is present; § 103 does not require any single reference to disclose the whole.
3. Claim 9's "second ADC" (vs. the spec's "second DAC"). A literal-reading rejection will founder; use it as a § 112(b) attack or confirm the printed text first.
4. § 112(f) construction of "level crossing sampler." If invoked, the patentee argues the prior art lacks the FIG. 5A op-amp/comparator/accumulator/DAC structure or an equivalent. The counter is that claim 6 expressly claims the sampler as software/firmware/hardware logic, which undermines any argument that the structure is essential.
5. Priority-date exposure on the secondary references. US 9,915,520 B2 and US 2017/0205223 A1 must have their pre-26-Apr-2017 publications verified; EP 3,239,651 needs a US counterpart check. The two IEEE papers by the inventors need authorship and date verification against the § 102(b)(1)(A) grace-period exception. Do not rely on any of these until that verification is done. Axsun '478 (28 Jan 2016) and Volcano '900/'012 (2011–2012) are, in contrast, safe.
6. Internal inconsistency to flag. Claim 1 recites "the SS-OCT calibration pulse" while E4 generates an "SS-OCT calibration clock pulse," and recites "a wave number associated with the SS-OCT optical calibration signal" with no antecedent basis (the processing unit produced "a sequence of SS-OCT wave number digital values"). These are minor indefiniteness issues; they do not rescue the claim from art that discloses the same functional behavior, but they should be noted in any invalidity contentions.

8. Bottom line

Highest-value follow-ups I could not complete: (1) obtain the actual Prior Art section referenced in the task; (2) the '243 file history and any IDS/examiner citations; (3) the three unexecuted searches (level-crossing/CTTE ADC art; Kalman-filter wavenumber extraction in OCT; IpDFT k-space linearization); (4) publication-date verification for US 9,915,520 B2, US 2017/0205223 A1, EP 3,239,651's US counterpart, and the two IEEE papers by the inventors.

Nothing in this section contradicts the previously generated Patent Summary or Litigation Summary. The earlier caveat about the "'542 patent" number collision is unaffected — none of the references above is a "542" document.