Patent 9859202
Obviousness
Combinations of prior art that suggest the claimed invention would have been obvious under 35 U.S.C. § 103.
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Obviousness
Combinations of prior art that suggest the claimed invention would have been obvious under 35 U.S.C. § 103.
Obviousness Analysis of U.S. Patent 9,859,202 under 35 U.S.C. § 103
This analysis examines whether the invention described in U.S. Patent 9,859,202 ('202 patent) would have been obvious to a Person Having Ordinary Skill in the Art (PHOSITA) at the time the invention was made. The analysis is based on the prior art references cited during the patent's prosecution and is conducted under the framework of 35 U.S.C. § 103, considering the factors established in Graham v. John Deere Co.
A claim is obvious if the differences between the claimed invention and the prior art are such that the subject matter as a whole would have been obvious at the time the invention was made to a PHOSITA. A PHOSITA in the field of semiconductor packaging in June 2015 would likely have a bachelor's degree in electrical or mechanical engineering and several years of experience in designing and manufacturing integrated circuit packages, including package-on-package (PoP) and 3D stacking technologies.
Primary Obviousness Combination: US 2014/0167263 A1 ('263) in view of Known Engineering Principles
A strong argument for obviousness can be constructed by using US 2014/0167263 A1 ('263) as the primary reference, modified by well-established design principles known to a PHOSITA. The '263 publication discloses a package-on-package structure that teaches the majority of the elements of independent claim 1 of the '202 patent.
What '263 Discloses:
The '263 publication teaches a stacked semiconductor package structure comprising:
- A bottom package and a top package (Claim 1: "a bottom package substrate; a top package substrate stacked on top of the bottom package substrate").
- An interposer that separates the top and bottom packages, thereby creating a space between them (Claim 1: "at least one spacer connector interposed...to define a space").
- A die (chip) mounted on the bottom package and located within the space created by the interposer (Claim 1: "a bottom chip arranged in the space").
- The interposer contains through-vias that provide electrical connection between the packages (Claim 1: "a core substrate; a plurality of metal pillars, each passing through the core substrate").
Motivation to Modify '263:
A PHOSITA would have been motivated to modify the structure taught in '263 to arrive at the specific claimed invention of the '202 patent for at least two reasons, both of which represent predictable solutions to known problems.
1. Modifying the Interposer Vias to Protrude (Claim 1 limitation)
The critical limitation of claim 1 is that "a bottom end of each metal pillar...protrudes downwardly from a bottom surface of the core substrate." The '263 reference discloses through-vias for connection but may not explicitly show them protruding.
- Problem Known in the Art: A PHOSITA would have been well aware of the challenges in ensuring reliable solder connections between large, stacked components like interposers and substrates. Warpage of the components, manufacturing tolerances, and the need for consistent standoff height for underfill can all lead to poor or failed electrical connections.
- Obvious Solution: Modifying a connecting pillar or via to protrude slightly from its substrate surface was a known technique to address this problem. A protruding feature acts as a standoff, ensuring a more reliable and robust connection when soldering to another surface. It guarantees contact even with minor surface non-planarity and helps define a consistent bond line. Therefore, a PHOSITA seeking to improve the manufacturing yield and connection reliability of the '263 structure would have been motivated to modify the through-vias to protrude slightly. This modification is a simple application of a known technique to achieve a predictable result—a better electrical and mechanical connection.
2. Using Two Spacer Connectors Instead of a Single Interposer (Claim 1 limitation)
Claim 1 requires "two spacer connectors arranged on opposite sides of the bottom chip." The '263 publication illustrates a single interposer with a central opening for the die.
- Problem Known in the Art: Fabricating a single, large interposer from materials like silicon or glass with a large central cutout can be costly and lead to lower manufacturing yields due to the risk of breakage or defects. Furthermore, a single frame-like interposer can impede the flow of underfill or thermal interface materials around the chip it encloses.
- Obvious Solution: It would have been an obvious design choice to replace the single, frame-like interposer of '263 with two smaller, simpler spacer elements placed on opposite sides of the chip. This is a classic engineering trade-off. The motivation would be to:
- Reduce Cost and Improve Yield: Manufacturing two smaller, rectangular spacers is typically cheaper and results in higher yields than one larger, more complex shape.
- Improve Manufacturability: Using two separate spacers improves access to the cavity, allowing for easier and more complete flow of underfill or other encapsulants around the chip.
This substitution of a single component for multiple, simpler components to improve cost and manufacturability is a routine practice in mechanical and package design.
Conclusion on Obviousness
The primary prior art reference, US 2014/0167263 A1, discloses the fundamental architecture of the claimed invention. A Person Having Ordinary Skill in the Art would have been motivated to modify the interposer in '263 to include the specific features recited in claim 1 of the '202 patent. Specifically, making the connecting pillars protrude to enhance connection reliability and splitting the single interposer into two spacers to reduce cost and improve manufacturability are both modifications that would have been obvious applications of known principles to achieve predictable results. Therefore, a strong case exists that the invention claimed in US 9,859,202 would have been obvious under 35 U.S.C. § 103.
Disclaimer: This analysis is based on the provided summaries of cited references and does not constitute a legal opinion on the validity of the patent's claims. A definitive conclusion on obviousness would require a more detailed claim construction and factual analysis, typically performed as part of formal legal proceedings.
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