US 7721282

Here's a concise summary of US patent 7721282:

Patent Number: US7721282B1

Title: Block-level I/O subsystem for distributed application environment management

Current Assignee: Intellectual Ventures II LLC (as of 2023-11-06)
Originally assigned to Panta Systems Inc.

Inventors: Pradip Kulkarni, Mukul Kumar, Adhir Potdar, Richard Au, James M. Mott, Tung M. Nguyen

Filing Date: March 30, 2006

Issue Date: May 18, 2010

Abstract: An embodiment of the present invention is directed to a system for distributing an application environment to a compute node. The system includes a first storage unit for storing blocks of a root image of the compute node and a second storage unit for storing a leaf image comprising new data blocks and changes to the blocks of the root image. The system further includes a union block device for interfacing between the compute node and the first and second storage units to distribute the application environment to the compute node. The union block device creates the application environment by merging the blocks of the root image stored on the first storage unit with the leaf image stored on the second storage unit.

Plain-Language Overview of Independent Claims:

Claim 1 (System Claim):
This claim describes a system for providing an application environment to a computer. It involves:

• A compute node (a computer system).
• A first storage unit (non-volatile memory) that holds "blocks" of a "root image." This root image is a computer program, and a file within it consists of at least one block of data.
• A second storage unit (non-volatile memory) that stores a "leaf image." This leaf image contains new data blocks and any changes made to the blocks originally in the root image.
• A union block device (UBD), which is a driver. This UBD acts as an intermediary between the compute node and both storage units. Its role is to combine the blocks from the root image and the leaf image to create the complete application environment for the compute node. Crucially, when the compute node wants to write data (a "sector X"), the UBD first sets up a persistent mapping for that sector and then writes the data to the second storage unit (where the leaf image is stored). The UBD is a "low-level driver" that operates between the storage units and the compute node's file system.

Claim 15 (Method Claim):
This claim outlines a method for distributing an application environment to a compute node. It includes the following steps:

• Storing blocks of a root image (a computer program, with files made of blocks of data) for a compute node on a first non-volatile storage unit.
• Storing a leaf image (containing new data and changes to the root image blocks) on a second non-volatile storage unit.
• Merging the blocks from the root image and the leaf image to create the application environment. This merging process happens at a low operational level, between the storage units and the compute node's file system.
• Delivering the resulting application environment to the compute node.
• The method also includes modifying the leaf image when the compute node interacts with its application environment. This modification specifically describes that upon receiving a write request from the compute node for a "sector X," the method involves creating a persistent mapping for that sector and then writing the sector to the second storage unit.

Litigation Information (as of April 26, 2026):
The patent US7721282B1 is currently involved in litigation, with several cases filed in various US District Courts in Texas, including the Northern District Court (cases 3:25-cv-00632, 3:25-cv-02885, 3:25-cv-00631) and the Western District Court (cases 7:24-cv-00277, 1:25-cv-01147), and the Eastern District Court (case 4:25-cv-00576).
Additionally, a PTAB case (IPR2026-00043) was filed, which was not instituted due to procedural reasons.

The patent US7721282B1 is currently involved in several litigation cases. The following is a list of known litigation as of April 26, 2026:

District Court Cases:

• Jurisdiction: Texas Northern District Court
  • Case Number: 3:25-cv-00632
  • Status: Active
• Jurisdiction: Texas Northern District Court
  • Case Number: 3:25-cv-02885
  • Status: Active
• Jurisdiction: Texas Northern District Court
  • Case Number: 3:25-cv-00631
  • Status: Active
• Jurisdiction: Texas Western District Court
  • Case Number: 7:24-cv-00277
  • Status: Active
• Jurisdiction: Texas Western District Court
  • Case Number: 1:25-cv-01147
  • Status: Active
• Jurisdiction: Texas Eastern District Court
  • Case Number: 4:25-cv-00576
  • Status: Active

Patent Trial and Appeal Board (PTAB) Cases:

• Case Number: IPR2026-00043
  • Status: Not Instituted - Procedural

Note on Plaintiff/Defendant and Filing Dates:

While the patent itself mentions these cases as "US case filed in Texas Northern District Court," etc., specific plaintiff(s), defendant(s), and precise filing dates for each individual case are not explicitly provided within the patent document's "Legal status" section or the Google Patents litigation links for US7721282B1. Further details would typically require searching court dockets via resources like PACER or Unified Patents' portal with the specific case numbers, which is beyond the scope of this response given the provided information.

Proceedings overview

Only one AIA trial proceeding, IPR2026-00043, has been filed against US Patent 7721282. This proceeding resulted in a discretionary denial of institution, meaning no claims were fully reviewed on their merits. Consequently, all claims of the patent remain untested by the PTAB. This status suggests a hardened defensive posture for the patent owner, as the patent has avoided a full merits review at the PTAB.

IPR2026-00043 — American Airlines, Inc. et al. v. Intellectual Ventures II LLC

• Type: Inter Partes Review
• Filed: 2025-10-10
• Status: Discretionary Denial. The Patent Trial and Appeal Board (PTAB) declined to institute the Inter Partes Review, terminating the proceeding before a full merits review of the challenged claims.
• Judge panel: The institution decision was a "Director Discretionary Decision," indicating that the Director of the USPTO, rather than a specific panel of Administrative Patent Judges (APJs), made the final decision regarding institution. The names of specific APJs on a panel are not publicly available for this decision through the provided search results.
• Petition grounds: The search results do not explicitly detail the specific claims challenged, the prior art asserted, or the statutory bases (§ 102 / § 103 / § 112) raised in the petition.
• Institution decision: Denied on 2026-02-02. The denial was a "Director Discretionary Decision" and the proceeding status is listed as "Not Instituted - Procedural". Recent policy changes, effective October 20, 2025, grant the USPTO Director the authority to decide whether to institute IPRs and PGRs. Additionally, Director Squires has issued guidance directing the PTAB to consider factors like U.S. manufacturing activity in institution decisions (March 2026) and has designated decisions as precedential where petitioners are perceived as seeking a "second bite at the apple" after district court litigation (May 2026). While the specific reasoning for this particular denial is not detailed beyond "procedural" in the public records, it aligns with a broader trend of discretionary denials under new USPTO Director policies.
• Final Written Decision: No Final Written Decision was issued because institution was denied.
• Settlement / termination: The proceeding was terminated on 2026-02-02 due to the discretionary denial of institution. There was no settlement.
• Appeal: No information regarding an appeal of the institution denial itself to the Federal Circuit is available in the provided search results. Generally, institution decisions are considered non-appealable under 35 U.S.C. § 314(d).
• Defensive value: This proceeding indicates that the patent survived an IPR petition without any claims being invalidated by the PTAB. A defendant facing assertion of this patent today should note that the claims have not been fully adjudicated by the PTAB, but that the patent owner successfully fended off one challenge at the institution phase, potentially due to the evolving discretionary denial policies at the PTAB.

Strategic summary

All claims of US7721282 remain UNTESTED by a full PTAB trial. The single IPR petition filed, IPR2026-00043 by American Airlines, Inc. et al., resulted in a discretionary denial of institution. This means the PTAB did not proceed to a full review of the patentability of the challenged claims, and therefore no claims were canceled or specifically sustained on their merits by the Board.

Regarding the estoppel landscape, 35 U.S.C. § 315(e)(2) statutory estoppel does not apply when institution of an IPR is denied. This means that the petitioner (American Airlines, Inc. et al.) and their privies would not be barred from raising any ground that was raised or reasonably could have been raised in the IPR in a subsequent district court proceeding or another PTAB proceeding. However, the concept of common law estoppel or the Director's discretion to deny institution based on parallel litigation or "second bite at the apple" doctrines could still impact future challenges. Given the denial was procedural, the prior-art grounds originally presented by American Airlines, Inc. et al. are still theoretically available to other defendants or in other forums, subject to the PTAB's current discretionary policies.

The denial of IPR2026-00043 reflects a pattern signaling a more patent-owner-friendly posture at the PTAB, particularly since late 2025 with the USPTO Director taking sole responsibility for institution decisions. The "Not Instituted - Procedural" status suggests the denial may be related to new policies aimed at limiting IPRs, especially those that might be duplicative of district court litigation or do not align with national policy objectives (like encouraging domestic manufacturing, as per Director Squires' March 2026 memo). This shift makes initiating IPRs more challenging for petitioners, particularly those without a U.S. manufacturing footprint or those perceived as engaging in serial or parallel challenges.

Recommended next steps

For a defendant currently facing assertion of US7721282, it's crucial to understand that while the patent has not had its claims invalidated at the PTAB, it also has not had them affirmed in a Final Written Decision. The discretionary denial of IPR2026-00043 means the claims were not fully vetted for patentability.

Since IPR2026-00043 was denied institution, there are no active trial-stage milestones (like institution decision deadlines, oral hearings, or FWD due dates) to track for this specific proceeding. The proceeding is closed. The denial decision itself, if made publicly available on the USPTO PTAB E2E portal, should be reviewed to understand the precise reasoning for the procedural denial, as this could inform strategy for any potential future PTAB challenges.

The absence of any granted IPRs or PGRs means that the patent's claims remain untested by the PTAB. This could be interpreted in several ways: either the claims are robust, or previous challenges have been deterred or dismissed on procedural grounds, as seen with IPR2026-00043. A potential defendant should carefully assess whether a new IPR petition could overcome the current discretionary denial policies, especially those related to parallel litigation or the "second bite" doctrine, given the ongoing district court cases.

Inventors

The named inventors for US7721282B1 are Pradip Kulkarni, Mukul Kumar, Adhir Potdar, Richard Au, James M. Mott, and Tung M. Nguyen. All inventors were employed by Panta Systems Inc. at the time of the patent's filing.

Original assignee

The original assignee on the issued patent was Panta Systems Inc. Panta Systems Inc. was founded in 2002 and manufactured and sold Data Warehouse Appliances until 2007. These appliances utilized the Oracle 10g database engine on servers and storage manufactured by Panta, clustered with an InfiniBand fabric. Panta Systems Inc. is listed as defunct as of 2007. It is important to distinguish Panta Systems Inc. from other currently operating entities that share the "Panta" name, such as Panta OS for AI-powered business process engines, Panta for financial index management software, or Panta gym management software.

Assignment timeline

• 2006-03-30 (executed) / recorded 2006-03-30 — Reel 017751/0719

  • Conveyance: Assignment of Assignors Interest
  • Assignor: POTDAR, ADHIR; KULKARNI, PRADIP; KUMAR, MUKUL; AU, RICHARD (and others, referring to the remaining inventors)
  • Assignee: PANTA SYSTEMS, INC., CALIFORNIA
  • Correspondent: Not specified in provided data.
  • Context: Original assignment from the inventors to the founding company.

• 2012-05-17 (executed) / recorded 2012-06-05 — Reel 028324/0627

  • Conveyance: Affidavit of Foreclosure and Assignment
  • Assignor: PANTA SYSTEMS, INC.
  • Assignee: VENTURE LENDING & LEASING IV, INC., CALIFORNIA
  • Correspondent: Not specified in provided data.
  • Context: Transfer from the original assignee, Panta Systems Inc., likely as part of a financial distress or dissolution event given its "defunct" status.

• 2012-05-18 (executed) / recorded 2012-06-05 — Reel 028321/0563

  • Conveyance: Assignment of Assignors Interest
  • Assignor: VENTURE LENDING & LEASING IV, INC.
  • Assignee: EMENDABLE ASSETS LIMITED LIABILITY COMPANY, DELAWARE
  • Correspondent: Not specified in provided data.
  • Context: Transfer from a lending or asset recovery entity to a new holding LLC.

• 2015-08-26 (executed) / recorded 2016-01-22 — Reel 037563/0790

  • Conveyance: Merger
  • Assignor: EMENDABLE ASSETS LIMITED LIABILITY COMPANY
  • Assignee: XENOGENIC DEVELOPMENT LIMITED LIABILITY COMPANY, DELAWARE
  • Correspondent: Not specified in provided data.
  • Context: Transfer between two LLCs, indicated as a merger, suggesting an internal reorganization or further sale within an IP holding structure.

• 2007-10-23 (executed) / recorded 2020-07-15 — Reel 053234/0530

  • Conveyance: Affidavit Under MPEP Section 323.01(B)
  • Assignor: MOTT, JAMES M.
  • Assignee: PANTA SYSTEMS, INC., CALIFORNIA
  • Correspondent: Not specified in provided data.
  • Context: Corrective or confirmatory assignment from an inventor, recorded significantly later than its effective date.

• 2006-09-18 (executed) / recorded 2020-07-15 — Reel 053234/0696

  • Conveyance: Affidavit Under MPEP Section 323.01(B)
  • Assignor: NGUYEN, TUNG M.
  • Assignee: PANTA SYSTEMS, INC., CALIFORNIA
  • Correspondent: Not specified in provided data.
  • Context: Corrective or confirmatory assignment from an inventor, recorded significantly later than its effective date.

• 2023-11-02 (executed) / recorded 2023-11-06 — Reel 065470/0127

  • Conveyance: Assignment of Assignors Interest
  • Assignor: XENOGENIC DEVELOPMENT LIMITED LIABILITY COMPANY
  • Assignee: INTELLECTUAL VENTURES II LLC, DELAWARE
  • Correspondent: Not specified in provided data.
  • Context: Transfer to a known patent monetization entity.

Timeline diagram

timeline
    title Ownership of US 7721282
    2006 : Filed & assigned to Panta Systems Inc
    2010 : Patent issued
    2012 : Transferred to Venture Lending & Leasing IV
         : Assigned to Emendable Assets LLC
    2015 : Merged to Xenogenic Development LLC
    2020 : Inventor assignments to Panta Systems Inc
    2023 : Assigned to Intellectual Ventures II LLC

NPE / troll-pattern signals

1. Shell-entity transfer — Present. The transfers from Panta Systems Inc. (an operating company now defunct) to Venture Lending & Leasing IV, Inc., then to Emendable Assets Limited Liability Company, and subsequently to Xenogenic Development Limited Liability Company, strongly suggest a chain of shell entities. The names "Venture Lending & Leasing IV, Inc.", "Emendable Assets Limited Liability Company", and "Xenogenic Development Limited Liability Company" are generic and typically associated with patent holding or monetization rather than product development. This culminates in the transfer to Intellectual Ventures II LLC, a known licensing-only entity. These transfers occurred between 2012 (Reel 028324/0627) and 2023 (Reel 065470/0127).
2. Known asserter in the chain — Present. The current assignee is Intellectual Ventures II LLC (Reel 065470/0127, recorded 2023-11-06). Intellectual Ventures is widely recognized as a major patent monetization firm and is frequently described as a patent troll. Unified Patents lists Intellectual Ventures II LLC as a patent owner and plaintiff in numerous litigation cases.
3. Repeat correspondent across the chain — Unclear. The provided patent data from Google Patents does not explicitly list the correspondent attorney or firm for each assignment record. Therefore, it's not possible to determine if the same correspondent recurs.
4. Cascading transfers — Present. There are three distinct transfers between 2012-05-17 and 2016-01-22 (a period of less than 4 years): from Panta Systems Inc. to Venture Lending & Leasing IV, Inc. (2012-05-17/06-05, Reel 028324/0627), then to Emendable Assets Limited Liability Company (2012-05-18/06-05, Reel 028321/0563), and then to Xenogenic Development Limited Liability Company (2015-08-26/2016-01-22, Reel 037563/0790). These rapid transfers between similarly generic-named LLCs indicate a cascading pattern.
5. Pre-litigation transfer — Present. The patent was assigned to Intellectual Ventures II LLC on 2023-11-02 (recorded 2023-11-06, Reel 065470/0127). The first reported litigation case (7:24-cv-00277 in Texas Western District Court) was filed in 2024, which falls within six months after the assignment to the current NPE assignee. Other cases such as 3:25-cv-00632 and 1:25-cv-01147 were filed in 2025. This timing strongly suggests the assignment was in preparation for assertion.
6. Bankruptcy fire-sale — Present. Panta Systems Inc., the original assignee, was "defunct" by 2007. The initial transfer out of Panta Systems Inc. in 2012 was a "Foreclosure and Assignment" to Venture Lending & Leasing IV, Inc. (2012-05-17/06-05, Reel 028324/0627), which is a strong indicator of a distress sale or liquidation of assets following the company becoming defunct.
7. Privateering — Unclear. While the patent ended up with a known NPE (Intellectual Ventures II LLC), there's no explicit information in the provided data or search results to confirm that this specific transfer was done on behalf of an operating company competitor (i.e., privateering).
8. Defensive aggregator (anti-NPE) — Not present. The chain terminates with Intellectual Ventures II LLC, which is an asserting entity, not a defensive aggregator.

Verdict

NPE — high confidence

The combination of the original assignee, Panta Systems Inc., becoming defunct and the subsequent "foreclosure and assignment" in 2012 (Reel 028324/0627), the cascading transfers through multiple shell-like entities, and the ultimate assignment to Intellectual Ventures II LLC (Reel 065470/0127), a well-known patent monetization firm, coupled with the fact that litigation cases started shortly after the transfer to Intellectual Ventures II LLC, strongly indicates a high-confidence NPE pattern.

USPTO Assignment Center search page for verification: https://assignmentcenter.uspto.gov/

Prior Art Analysis for US Patent 7721282

To identify the most relevant prior art for US patent 7721282, we will examine the patent citations listed within the patent itself. Prior art is typically considered under 35 U.S.C. § 102, which generally addresses novelty and statutory bars. For each cited patent, we will provide a full citation, publication/filing date, a brief description, and which claim(s) it potentially anticipates.

Accessing USPTO Database:

The USPTO provides a Patent Public Search tool that offers enhanced access to prior art.

Cited Patent References:

US7721282B1 directly references a related patent application: "BRANCING STORE FILE SYSTEM" filed Dec. 30, 2004, patent application Ser. No. 11/026,622, which is expressly incorporated by reference. This indicates a foundational relationship.

The patent also lists numerous "Patent Citations" and "Cited By" documents. For the purpose of identifying prior art that anticipates claims under 35 U.S.C. § 102, we focus on documents with a priority or filing date before December 30, 2004 (the priority date of US7721282B1).

Here's an analysis of the most relevant prior art cited within US7721282B1, prioritizing those with the earliest dates:

1. US5113523A

   • Full Citation: US5113523A, "High performance computer system"
   • Priority Date: May 6, 1985
   • Publication Date: May 12, 1992
   • Brief Description: This patent describes a high-performance computer system. While general, its early date suggests it could lay foundational groundwork for multi-computer systems and data processing.
   • Potential Anticipated Claims (35 U.S.C. § 102): Given its broad title, it's difficult to pinpoint specific anticipation without a detailed claim-by-claim comparison. However, it might generally address aspects of a "compute node comprising a computer system" (Claim 1, Claim 15) in a broad sense, or the concept of a "multi-computer system" mentioned in the background of US7721282B1. Further analysis would be needed to determine if it discloses the specific combination of a root/leaf image and UBD.

2. US5127104A

   • Full Citation: US5127104A, "Method and product involving translation and execution of programs by automatic partitioning and data structure allocation"
   • Priority Date: December 29, 1986
   • Publication Date: June 30, 1992
   • Brief Description: This patent focuses on translating and executing programs through automatic partitioning and data structure allocation. This could be relevant to how application environments are managed and distributed.
   • Potential Anticipated Claims (35 U.S.C. § 102): This reference might potentially anticipate elements related to the storage and management of program data, which is a core part of the "root image" (Claim 1, Claim 15) and "application environment" (Claim 1, Claim 15). The "data structure allocation" could touch upon how blocks of data are handled.

3. US5764902A

   • Full Citation: US5764902A, "Conditional insert or merge in a data conference"
   • Priority Date: September 29, 1995
   • Publication Date: June 9, 1998
   • Brief Description: This patent describes a method for conditional insertion or merging in a data conference. The concept of "merging" data is directly relevant to US7721282B1's core function.
   • Potential Anticipated Claims (35 U.S.C. § 102): This patent directly addresses "merging" data, which is a central feature of both independent claims in US7721282B1. Specifically, it could anticipate the "merging the blocks of the root image stored on the first storage unit with the blocks of the leaf image stored on the second storage unit to create the application environment" recited in Claim 1 and Claim 15. The context of a "data conference" would need to be examined to see if the merging mechanism is analogous to the block-level merging of root and leaf images.

4. US6018747A

   • Full Citation: US6018747A, "Method for generating and reconstructing in-place delta files"
   • Priority Date: November 26, 1997
   • Publication Date: January 25, 2000
   • Brief Description: This patent describes a method for generating and reconstructing "in-place delta files." The concept of delta files is highly analogous to the "leaf image" storing "changes to the blocks of the root image" in US7721282B1.
   • Potential Anticipated Claims (35 U.S.C. § 102): This reference is highly relevant to the concept of a "leaf image comprising new data blocks and changes to the blocks of the root image" (Claim 1, Claim 15). The "generating and reconstructing in-place delta files" could be seen as anticipating the storage and utilization of a leaf image to represent modifications to a base (root) image.

5. US6292941B1

   • Full Citation: US6292941B1, "Operating system installation"
   • Priority Date: April 30, 1996
   • Publication Date: September 18, 2001
   • Brief Description: This patent concerns operating system installation. The root image in US7721282B1 can comprise an operating system.
   • Potential Anticipated Claims (35 U.S.C. § 102): This reference broadly relates to the subject matter of an "operating system" (Claim 4, Claim 20) as part of the application environment. However, it's unlikely to anticipate the specific block-level, root-leaf, and UBD architecture without further detail.

6. US6502238B1

   • Full Citation: US6502238B1, "System for constructing and distributing block-based fragments"
   • Priority Date: December 31, 1998
   • Publication Date: December 31, 2002
   • Brief Description: This patent describes a system for constructing and distributing "block-based fragments." This is highly relevant as US7721282B1 operates at the "block-level."
   • Potential Anticipated Claims (35 U.S.C. § 102): This reference is very strong for anticipating the "storing blocks of a root image" (Claim 1, Claim 15) and the general "block-level" operation described in US7721282B1. The distribution of "block-based fragments" could also anticipate the merging and delivery aspects of the application environment. The difference would likely hinge on the specific "union block device" and the root/leaf image structure.

7. US6606744B1

   • Full Citation: US6606744B1, "Providing collaborative installation management in a network-based supply chain environment"
   • Priority Date: November 22, 1999
   • Publication Date: August 12, 2003
   • Brief Description: This patent describes collaborative installation management in a network-based environment, which touches upon distributing application environments to multiple nodes.
   • Potential Anticipated Claims (35 U.S.C. § 102): This could potentially anticipate the broader concept of distributing an application environment to multiple compute nodes (Claim 5, Claim 21), particularly in a networked context. However, it's unlikely to detail the specific block-level merging via a UBD.

8. US6779177B1

   • Full Citation: US6779177B1, "Mechanism for cross channel multi-server multi-protocol multi-data model thin clients"
   • Priority Date: October 28, 1999
   • Publication Date: August 17, 2004
   • Brief Description: This patent describes a mechanism for thin clients in a multi-server environment, which is relevant as US7721282B1 mentions "thin-client workstation" as a type of compute node.
   • Potential Anticipated Claims (35 U.S.C. § 102): This reference could potentially anticipate the use of a "thin-client workstation" as a compute node (Claim 3, Claim 19). However, it is unlikely to disclose the specific block-level I/O subsystem.

9. US6990513B2

   • Full Citation: US6990513B2, "Distributed computing services platform"
   • Priority Date: June 22, 2000
   • Publication Date: January 24, 2006
   • Brief Description: This patent details a distributed computing services platform. While the publication date is after US7721282B1's priority date, the priority date itself is relevant. Distributed computing is the broad field of US7721282B1.
   • Potential Anticipated Claims (35 U.S.C. § 102): This patent might broadly relate to systems operating in a "high performance computing cluster" (Claim 11, Claim 27) or "grid computing cluster" (Claim 12, Claim 28). Specific anticipation would depend on whether it details a similar block-level storage and merging mechanism for application environments.

10. US7127712B1

    • Full Citation: US7127712B1, "System and method for providing a java code release infrastructure with granular code patching"
    • Priority Date: February 14, 2001
    • Publication Date: October 24, 2006
    • Brief Description: This patent describes a system for granular code patching, which is related to updating application environments.
    • Potential Anticipated Claims (35 U.S.C. § 102): The concept of "granular code patching" is similar to updating a "root image" (as described in the description of US7721282B1, where the first storage device 140 may be refreshed with a new operating system patch). This could potentially anticipate the update mechanism implied by the root/leaf structure, though not necessarily the specific UBD implementation.

11. US7150015B2

    • Full Citation: US7150015B2, "Method and system for deploying an asset over a multi-tiered network"
    • Priority Date: September 1, 2000
    • Publication Date: December 12, 2006
    • Brief Description: This patent describes deploying assets over a multi-tiered network, which is a form of distributing application environments.
    • Potential Anticipated Claims (35 U.S.C. § 102): This reference could broadly anticipate the idea of "distributing an application environment to a compute node" (Claim 1, Claim 15), especially in a networked context.

12. US7155714B2

    • Full Citation: US7155714B2, "Network distributed product manager system"
    • Priority Date: June 12, 2002
    • Publication Date: December 26, 2006
    • Brief Description: This patent describes a network-distributed product manager system, which involves managing and distributing software.
    • Potential Anticipated Claims (35 U.S.C. § 102): Similar to US7150015B2, this could broadly anticipate aspects of distributing an application environment, but it's unlikely to contain the specific block-level implementation of US7721282B1.

13. US7200715B2

    • Full Citation: US7200715B2, "Method for writing contiguous arrays of stripes in a RAID storage system using mapped block writes"
    • Priority Date: March 21, 2002
    • Publication Date: April 3, 2007
    • Brief Description: This patent focuses on writing data in a RAID storage system using "mapped block writes." The concept of "mapped block writes" is highly relevant to how the UBD handles write requests in US7721282B1.
    • Potential Anticipated Claims (35 U.S.C. § 102): This is a strong reference for the "union block device, upon receiving a write request from the compute node for a sector X, creates an appropriate persistent mapping for sector X" and "writing sector X on the second storage unit" (Claim 1, Claim 15). The concept of "mapped block writes" directly anticipates this aspect of the UBD's functionality.

14. US7246351B2

    • Full Citation: US7246351B2, "System and method for deploying and implementing software applications over a distributed network"
    • Priority Date: February 20, 2001
    • Publication Date: July 17, 2007
    • Brief Description: This patent describes a system and method for deploying and implementing software applications over a distributed network.
    • Potential Anticipated Claims (35 U.S.C. § 102): This reference broadly covers the "distributing an application environment to a compute node" (Claim 1, Claim 15) in a distributed network context.

15. US7331047B2

    • Full Citation: US7331047B2, "Deterministic system and method for implementing software distributed between a desktop and a remote device"
    • Priority Date: November 25, 2003
    • Publication Date: February 12, 2008
    • Brief Description: This patent describes implementing software distributed between a desktop and a remote device.
    • Potential Anticipated Claims (35 U.S.C. § 102): This could potentially anticipate the distribution of an application environment from a remote storage unit (Claim 6, Claim 7, Claim 22, Claim 23) to a compute node.

16. US7467293B2

    • Full Citation: US7467293B2, "Method and computing system for transparence computing on the computer network"
    • Priority Date: November 12, 2004
    • Publication Date: December 16, 2008
    • Brief Description: This patent describes transparent computing on a computer network. The priority date is very close to US7721282B1's priority date (December 30, 2004).
    • Potential Anticipated Claims (35 U.S.C. § 102): This patent's priority date of November 12, 2004, means it could be prior art to US7721282B1. The concept of "transparence computing" could potentially touch upon how the merged root and leaf images appear as "one cohesive image" to the compute node, giving the appearance of a unique version of an application (as described in the detailed description of US7721282B1).

17. US7475274B2

    • Full Citation: US7475274B2, "Fault tolerance and recovery in a high-performance computing (HPC) system"
    • Priority Date: November 17, 2004
    • Publication Date: January 6, 2009
    • Brief Description: This patent addresses fault tolerance and recovery in HPC systems. US7721282B1 mentions implementation in HPC clusters and scalability/redundancy.
    • Potential Anticipated Claims (35 U.S.C. § 102): Similar to US7467293B2, this patent has a priority date (November 17, 2004) preceding US7721282B1. It could anticipate aspects of operating in a "high performance computing cluster" (Claim 11, Claim 27) and the scalability and redundancy features mentioned in the description of US7721282B1.

18. US7496739B1

    • Full Citation: US7496739B1, "System and related methods for automatically configuring a computing system"
    • Priority Date: June 30, 2000
    • Publication Date: February 24, 2009
    • Brief Description: This patent describes automatically configuring computing systems.
    • Potential Anticipated Claims (35 U.S.C. § 102): This could generally relate to the setup and management of compute nodes, but it's unlikely to disclose the specific block-level root/leaf architecture.

Note on 35 U.S.C. § 102:
For a prior art reference to "anticipate" a claim under 35 U.S.C. § 102, it must disclose every limitation of the claim, either explicitly or inherently. A detailed claim chart comparing each element of US7721282B1's independent claims against the full text of these prior art references would be necessary for a definitive anticipation analysis. The descriptions provided above are based on the titles and brief summaries, highlighting areas of potential overlap.

Other Related Patents/Applications:
The patent US7721282B1 is a Continuation-in-Part of application Ser. No. 11/026,622, titled "BRANCING STORE FILE SYSTEM" filed December 30, 2004. This parent application is highly relevant as it describes the branching store file system concept that US7721282B1 builds upon. US7721282B1 also has related applications, US11/709,477 (US8332844B1) and US11/712,728 (US8065737B1), but these have later filing dates (Feb 21, 2007 and Feb 28, 2007, respectively) and are therefore not prior art to US7721282B1 itself, but rather claim priority from it.

To assess the obviousness of US patent 7721282 under 35 U.S.C. § 103, we will consider the independent claims (Claim 1 for the system and Claim 15 for the method) and combine relevant prior art references. The patent's own background section provides significant motivation for such a combination.

Motivation for Combination

The background of US7721282 explicitly states that its parent application, "BRANCING STORE FILE SYSTEM" (U.S. patent application Ser. No. 11/026,622), presented a solution for creating boot images on the fly without diminishing bring-up time and for streamlining updates. However, it suffered from a significant drawback: "a separate version of the system must be created for each unique operating system." The present invention, US7721282, aims to overcome this limitation by providing an "operating system-independent system and method for distributing an application environment to a compute node" by operating at the "block level."

Therefore, a person having ordinary skill in the art (POSA) would have been highly motivated to modify or enhance the branching store file system described in U.S. patent application Ser. No. 11/026,622 to achieve operating system independence. A known way to achieve such independence in storage management is to operate at the block level, below the file system layer.

Obviousness Analysis of Independent Claims

We will consider the following combination of prior art references:

1. U.S. patent application Ser. No. 11/026,622 ("BRANCING STORE FILE SYSTEM"): This is the foundational reference, as it describes the core concept of the "branching store file system" with a read-only "root" image and unique "leaf" images for changes, and a "filter" that merges them.
2. US6502238B1 (Honeywell International Inc.): Entitled "System for constructing and distributing block-based fragments," this patent teaches the concept of operating at the "block level" and distributing such blocks.
3. US7200715B2 (Network Appliance, Inc.): Entitled "Method for writing contiguous arrays of stripes in a RAID storage system using mapped block writes," this patent teaches mechanisms for handling write operations at the block level, including the concept of "mapped block writes."

Claim 1 (System)

Elements of Claim 1 and how they would be rendered obvious by the combination:

• A compute node comprising a computer system; a first storage unit for storing blocks of a root image...; a second storage unit for storing a leaf image comprising new data blocks and changes to the blocks of the root image:

  • U.S. patent application Ser. No. 11/026,622 clearly teaches a system with compute nodes, a "read-only base image (or 'root' image)" accessible by all compute nodes, and "changes made by a compute node to the root image are stored in a 'leaf' image unique to that compute node."
  • While Ser. No. 11/026,622 discusses these in the context of a "file system," a POSA, motivated to achieve OS-independence, would readily understand that these images (root and leaf) can be composed of "blocks" as taught by US6502238B1, which focuses on "constructing and distributing block-based fragments." The storage units being "non-volatile memory" is generic to computer storage.

• A union block device for interfacing between the compute node and the first and second storage units to distribute the application environment..., wherein the union block device comprises a driver, wherein the union block device creates the application environment by merging the blocks of the root image stored on the first storage unit with the blocks of the leaf image stored on the second storage unit:

  • U.S. patent application Ser. No. 11/026,622 describes a "filter" that "operates between the compute nodes and the file system(s), which merges the changes recorded on the leaf images with the root image and delivers the result to the appropriate compute node."
  • The explicit problem in Ser. No. 11/026,622 is its OS-dependency due to this file-system-level "filter." A POSA, motivated to achieve OS-independence, would replace this file-system filter with a mechanism operating at a lower, block level. US6502238B1 teaches operating with and distributing "block-based fragments", which directly points to implementing such a merging function at the block level via a device driver. The term "union block device" would be a straightforward naming for a driver performing this union/merging function on blocks.

• The union block device comprises a low-level driver for interfacing between the first and second storage units and the file system of the compute node; and the union block device, upon receiving a write request from the compute node for a sector X, creates an appropriate persistent mapping for sector X:

  • Implementing a "low-level driver" that operates "below the file system" is the known and obvious way for a POSA to achieve the desired OS-independence from the problem identified in Ser. No. 11/026,622, leveraging the block-level operations taught by US6502238B1.
  • Regarding handling write requests, Ser. No. 11/026,622 states that "changes made by a compute node to the root image are stored in a 'leaf' image," implying write operations. US7200715B2 teaches "mapped block writes" in a storage system context, where "sectors" are written after creating "mappings" for their locations. A POSA would naturally apply these known block-level write techniques, including creating "persistent mappings" to manage the locations of blocks, when implementing the leaf image writes in the block-level system.

Claim 15 (Method)

Elements of Claim 15 and how they would be rendered obvious by the combination:

• Storing blocks of a root image... on a first storage unit...; storing a leaf image comprising new data blocks and changes to the blocks of the root image on a second storage unit...:

  • The method of storing a root image and leaf images, with the leaf images containing changes, is clearly taught by U.S. patent application Ser. No. 11/026,622. The conversion from "file system" images to "blocks" for these images is motivated by the desire for OS-independence and taught by US6502238B1's concept of "block-based fragments."

• Merging the blocks of the root image... with the blocks of the leaf image... to create the application environment; and delivering the application environment to the compute node:

  • U.S. patent application Ser. No. 11/026,622 teaches the process where a "filter... merges the changes recorded on the leaf images with the root image and delivers the result to the appropriate compute node." A POSA would implement this merging process at the block level using a low-level driver to achieve OS-independence, as motivated by the shortcomings of Ser. No. 11/026,622 and the block-level teachings of US6502238B1.

• Delivering the application environment to the compute node; wherein the modifying comprises: upon receiving a write request from the compute node for a sector X, creating an appropriate persistent mapping for sector X; and writing sector X on the second storage unit:

  • The delivery of the application environment is integral to Ser. No. 11/026,622's system.
  • The modification step of handling write requests to the leaf image by creating a persistent mapping for a sector X and writing it to the second storage unit is directly supported by the block-level write operations taught in US7200715B2, particularly "mapped block writes." A POSA would recognize that to enable modification of the application environment (i.e., writing to the leaf image) in a block-level system, such block-level mapping and writing techniques would be necessary.

• Merging occurs at an operational level between the first and second storage units and file system of the compute node:

  • This reflects the implementation of the merging logic in a low-level block device driver, which is precisely the motivated change to achieve OS-independence over the file-system-level "filter" of Ser. No. 11/026,622, utilizing the block-level concepts of US6502238B1.

In conclusion, the combination of U.S. patent application Ser. No. 11/026,622, US6502238B1, and US7200715B2 would have rendered the independent claims of US7721282 obvious to a person of ordinary skill in the art at the time of the invention. The explicit problem statement in US7721282's background provides a strong motivation for a POSA to combine these references to achieve an OS-independent, block-level branching store system with appropriate block-level write handling.