US 7702742

US Patent 7,702,742, titled "Mechanism for enabling memory transactions to be conducted across a lossy network," was issued on April 20, 2010, from an application filed on January 17, 2006. The original assignee was Fortinet Inc, and the current assignee is Athena Security LLP. The inventors are Bert H. Tanaka, Daniel J. Maltbie, and Joseph R. Mihelich.

Abstract:
The patent describes a network interface designed to facilitate remote programmed I/O over a "lossy" network, such as Ethernet, where packets may be dropped. This interface receives multiple memory transaction messages (MTMs), identifies their destination as a remote node, and determines each MTM's transaction type. It then creates network packets from these MTMs, assigning a sending priority to each packet based on the MTM's transaction type. These prioritized packets are sent into the lossy network. The network interface ensures that a specific subset of these packets, sharing a particular sending priority, are received by the remote node in the correct sequence. This mechanism enables remote programmed I/O to be reliably conducted across lossy networks.

Plain-Language Overview of Independent Claims:

• Independent Claim 1 (Method): This claim describes a method for reliably transmitting memory access requests over an unreliable network. A network interface first receives memory transaction messages (MTMs) from a local computer's memory controller. It figures out that these messages are meant for a remote computer and determines what kind of memory operation each message requests (e.g., read, write). For each MTM, the network interface creates a network packet, embedding the MTM's information, and assigns a priority to this packet based on the type of memory operation and the rules of the computer's internal bus. These prioritized packets are then sent across a network where packets can be lost. Finally, the method ensures that at least a specific group of these packets, those with the same priority, arrive at the remote computer in the correct order.

• Independent Claim 11 (Computer System): This claim describes a computer system built to perform reliable remote memory access. The system includes a local processor, a local memory controller, local memory, and a specialized network interface. This network interface is designed to receive MTMs from the memory controller, identify them as destined for a remote computer, and determine their transaction types. It then builds network packets from these MTMs, assigns priorities based on transaction type and bus protocol rules, and sends them over a lossy network. Crucially, the network interface also ensures that packets of a given priority arrive at the remote computer in the correct sequence.

• Independent Claim 19 (Network Interface): This claim focuses on the network interface itself. It specifies that the interface has components for: (1) receiving MTMs from a local memory controller (which follow a standard bus protocol); (2) determining that these MTMs are for a remote computer and identifying their transaction types; (3) composing network packets that encapsulate MTM information; (4) assigning sending priorities to these packets based on the MTM type and bus protocol ordering rules; (5) sending these prioritized packets into a lossy network, with the sending order influenced by their priorities; and (6) ensuring that at least a subset of packets with a particular priority are received by the remote computer in the proper order.

Litigation and Status:
The patent US7702742B2 is currently active and is scheduled to expire on October 1, 2028. The patent family is involved in litigation, with cases filed in the Texas Western District Court. Specific case numbers mentioned are 7:26-cv-00158, 7:26-cv-00061, and 7:26-cv-00025. Additionally, the patent family has seen its first worldwide family litigation filed [cite: The provided patent text].

A search of the CAFC 2026 dockets as of April 26, 2026, did not yield any specific cases directly involving US Patent 7,702,742.