US 7627805

Here's a concise summary of US Patent 7,627,805:

Title: Data coding with an efficient LDPC encoder

Assignee: Integral Wireless Technologies LLC (as of October 16, 2024). The patent was originally assigned to CONEXANT SYSTEMS Inc. and subsequently passed through several assignees including XocyST TRANSFER AG L.L.C., INTELLECTUAL VENTURES I LLC, and INTELLECTUAL VENTURES ASSETS 199 LLC before its current assignment.

Inventors: Cimarron Mittelsteadt, Wen-Yen Weng

Filing Date: June 6, 2006

Issue Date: December 1, 2009

Abstract: A method of coding data for transmission in a communication medium or channel is described. The method involves generating a codeword from a mother code parity check matrix and a macro matrix. The mother code parity check matrix is composed of m-by-m square sub-matrices with a cyclic structure, and the macro matrix contains elements that represent the non-zero sub-matrices of the mother code parity check matrix.

Plain-Language Overview of Independent Claims:

• Claim 1 (Method of Coding Data): This claim describes a method for encoding data by creating a codeword. This is done using two main components:

  • A "mother code parity check matrix" which is a large matrix made up of smaller, square sub-matrices (each m by m in size) that have a repeating, cyclic pattern. The overall size of this matrix is (j*m) rows by (k*m) columns.
  • A "macro matrix" which is a smaller j-by-k matrix. The elements within this macro matrix indicate where the non-zero sub-matrices are located within the larger mother code parity check matrix.

• Claim 11 (LDPC Encoder Apparatus): This claim describes a physical LDPC (Low-Density Parity Check) encoder device designed to encode data for transmission. The encoder includes "means for generating" a codeword, which functions similarly to the method described in Claim 1. Specifically, it uses:

  • A mother code parity check matrix with (j*m)-by-(k*m) dimensions, containing m-by-m cyclic sub-matrices.
  • A j-by-k macro matrix, where its elements point to the non-zero sub-matrices in the mother code matrix.

• Claim 17 (Communications System): This claim defines a complete communication system. It includes:

  • An LDPC encoder, as described in Claim 11, for encoding data using the mother code parity check matrix and macro matrix structure.
  • An LDPC iterative decoder, which is responsible for decoding the received encoded data based on a predefined LDPC error detection structure.

Litigation Status:
The patent is currently involved in litigation. US cases have been filed in the Texas Eastern District Court (case 2:25-cv-00388) and the Florida Southern District Court (case 0:25-cv-62665). The "First worldwide family litigation" was filed on June 6, 2006.
I could not find specific dockets for US7627805 in the CAFC 2026 dockets using the provided search tools; the results contained general information about CAFC cases in 2026 but no direct hits for this patent number. The reported litigation for this patent is at the District Court level.