Invalidity dossier
US 7282431
Single chip and stack-type chip semiconductor package and method of manufacturing the same
Current assignee: Samsung Electronics Co Ltd
Added 9/23/2026, 10:08:49 PM
Active provider: DeepSeek · deepseek-flash
Patent summary
Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.
Patent Overview — US 7,282,431 B2
Title: Single chip and stack-type chip semiconductor package and method of manufacturing the same
Patent number: US 7,282,431 B2
Assignee: [Samsung Electronics Co Ltd](/litigations/by-plaintiff/Samsung%20Electronics%20Co%20Ltd) (listed assignee; Google notes assignees may be inaccurate and that it performed no legal analysis)
Inventors: In-Ku Kang; Sung-Hwan Yoon
Key dates (as listed by the source): Priority date 2003-09-19; application US 11/618,134 filed 2006-12-29; publication US 2007/0102802 A1 on 2007-05-10; granted 2007-10-16; anticipated expiration 2024-09-20. Legal status listed as "Expired - Fee Related," which the source expressly states is an assumption and not a legal conclusion.
Purpose: Packaging electrically connects chips to external devices, protects them, and dissipates heat. In stack-type chip semiconductor packages, bonding wires protrude from the chip's active surface, making thickness reduction difficult; thick adhesive between stacked chips adds further thickness. The invention aims to reduce package thickness.
Plain-language scope (from the excerpt): A semiconductor package includes a substrate with connection pads (e.g., at edges of its upper surface), a semiconductor chip attached with its active surface facing the substrate, and external bonding pads electrically connected to the active surface. The chip may comprise a frame and a protrusion unit protruding away from the frame. The frame's active surface may have internal bonding pads with conductive patterns extending toward both ends of the frame; external bonding pads with exposed upper surfaces may be formed at both ends of the frame without contacting the protrusion unit. Wires electrically connect substrate connection pads to the chip. A manufacturing method includes preparing such a chip and a substrate with bonding pads at either end, then attaching the chip, possibly with an insulating adhesive.
Source: https://patents.google.com/patent/US7282431/en
What the excerpt does not establish: Full claim language and claim count; complete embodiments and figures; the full manufacturing sequence; the complete description and any omitted text (the source notes it may be excerpted); any prosecution history; and any legal conclusions regarding validity, enforceability, or ownership.
Generated 10/1/2026, 9:33:46 PM
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Litigation summary
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Proceedings on file (0)
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No PTAB proceedings on file. This patent has not been challenged via IPR, PGR, or CBM. The absence is itself a signal — well-asserted patents eventually attract IPRs. The LLM analysis below may surface filings the ODP feed hasn’t indexed yet.
PTAB challenges
AIA trial proceedings at the USPTO Patent Trial and Appeal Board — IPR, PGR, and CBM. Petitioners, judge panels, claim-level invalidation outcomes from Final Written Decisions, and Federal Circuit appeals. The single most important defensive datapoint after litigation history.
Assignment history
Inventors, original assignee, and the chain of ownership recorded with the USPTO — including the correspondent attorney who recorded each assignment, since shell-LLC chains often share one repeat-player attorney even when the entity names look unrelated. Surfaces NPE / patent-troll patterns: shell-entity transfers, known asserters in the chain, repeat correspondent fingerprints, pre-litigation assignments, and bankruptcy fire-sales.
Prior art
Earlier patents, publications, and products that may anticipate or render the claims unpatentable.
Obviousness
Combinations of prior art that suggest the claimed invention would have been obvious under 35 U.S.C. § 103.
Extensions
Patent term adjustments, term extensions, continuations, divisionals, family members, and expiration dates.
Derivative works
Defensive disclosure: derivative variations of each claim designed to render future incremental improvements obvious or non-novel.