Invalidity dossier
US 7277540
Arithmetic method and apparatus and crypto processing apparatus for performing multiple types of cryptography
Current assignee: Toshiba Corp
Added 9/21/2026, 10:22:12 AM
Active provider: DeepSeek · deepseek-flash
Patent summary
Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.
Patent Overview — US 7,277,540 B1
Title: Arithmetic method and apparatus and crypto processing apparatus for performing multiple types of cryptography
Patent number: US 7,277,540 B1
Application number: US 09/487,483
Inventors: Masue Shiba; Shinichi Kawamura
Original/current assignee: Toshiba Corp. (Kabushiki Kaisha Toshiba)
Priority date: 1999-01-20 (JP 11011989A; later JP 11209831A, 1999-07-23)
Filing date: 2000-01-19
Publication date: 2007-10-02
Legal status: Expired – Fee Related; anticipated expiration 2020-01-19
Purpose: The patent addresses arithmetic apparatus used in crypto coprocessors, e.g., in IC card LSIs and information electric home appliances, where a coprocessor assists a CPU with public-key cryptography operations such as long exponentiation and the four fundamental operations. Prior finite-field GF(2^m) multiplier arrangements (cyclotomic-field multipliers with feedback flip-flops, and LFSRs of m registers) were limited by the degree m, requiring modification when m changed.
Plain-language scope: The disclosed arithmetic apparatus operates a unit arithmetic circuit while propagating a carry for integer-based unit arithmetic, and operates the unit arithmetic circuit without propagating any carry for finite-field GF(2^m) unit arithmetic. It includes an integer-based unit arithmetic circuit, a finite-field GF(2^m)-based unit arithmetic circuit logically adjacent to it, and a selector for choosing between them, or equivalently an integer-based unit arithmetic circuit with a selection control circuit supplying a selection signal. This allows both integer-based and GF(2^m) multiply operations to be executed by adding only a minimal finite-field circuit.
What the excerpt does not establish: It provides no claim text, no complete description or drawings, and no full listing of prior art or citations. It therefore does not establish claim scope, prosecution history, validity, enforceability, or the accuracy of the listed legal status or assignee data. Litigation and ownership-transfer matters are outside the supplied text.
Generated 10/1/2026, 10:01:42 PM
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Litigation summary
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Proceedings on file (0)
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PTAB challenges
AIA trial proceedings at the USPTO Patent Trial and Appeal Board — IPR, PGR, and CBM. Petitioners, judge panels, claim-level invalidation outcomes from Final Written Decisions, and Federal Circuit appeals. The single most important defensive datapoint after litigation history.
Assignment history
Inventors, original assignee, and the chain of ownership recorded with the USPTO — including the correspondent attorney who recorded each assignment, since shell-LLC chains often share one repeat-player attorney even when the entity names look unrelated. Surfaces NPE / patent-troll patterns: shell-entity transfers, known asserters in the chain, repeat correspondent fingerprints, pre-litigation assignments, and bankruptcy fire-sales.
Prior art
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Obviousness
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Extensions
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Derivative works
Defensive disclosure: derivative variations of each claim designed to render future incremental improvements obvious or non-novel.