US 7109095

Patent Overview — US 7,109,095 B2

Title: Method for fabricating semiconductor device

Patent number / application: US 7,109,095 B2; application US 10/396,505

Original assignee: Matsushita Electric Industrial Co., Ltd.

Current assignee (as listed): Pannova Semic LLC

Inventors: Hidenori Notake, Teruhito Ohnishi, Akira Asai, Shigetaka Aoki

Dates: Priority date 2002-04-01; filed 2003-03-26; published as US 2003/0186516 A1 on 2003-10-02; granted/publication date 2006-09-19. Legal status shown as "Expired – Lifetime," with adjusted expiration 2023-08-05.

Purpose: The patent concerns methods for fabricating a semiconductor device, and particularly methods for fabricating a device that includes a semiconductor layer containing silicon (Si) and a group IV element other than Si — the latter referred to in the text as a "contaminant." The stated motivation is that transistors mounted in semiconductor devices are required to provide high-frequency operation in a higher frequency band and high-speed operation with lower power consumption.

Plain-language scope: The definitions section frames the invention around forming and handling a semiconductor layer that includes silicon plus another group IV element (treated as an unwanted contaminant). The excerpted specification describes a conventional method of fabricating a semiconductor device having a heterojunction bipolar transistor, beginning with preparing a p-type single-crystal silicon semiconductor substrate whose principal plane is the (100) plane with a resistivity of 10 to 15 Ω·cm, then implanting ions through a resist mask to form an n-type buried layer in the bipolar-transistor region. Classification codes point to selective deposition of monocrystalline/non-monocrystalline semiconductor materials, wet cleaning (including wafer backside cleaning and pre-manufacture wet cleaning), silicon/silicon-germanium/germanium materials, and wet etching of conductive or resistive materials. Because the provided text omits the claims and most of the specification, the precise claimed steps cannot be stated.

What the excerpt does not establish: It does not reproduce the claims, the full specification, drawings, or the prosecution history; it does not establish the specific process steps ultimately claimed, the exact role of the "contaminant," embodiments or examples, or the scope of any claim limitation. It also does not establish prior-art references, validity, enforceability, or litigation matters, and no such research was performed.

Source: https://patents.google.com/patent/US7109095/en