Invalidity dossier
US 6816809
Hardware based utilization metering
Current assignee: Valtrus Innovations Ltd
Added 9/23/2026, 5:01:11 PM
Active provider: DeepSeek · deepseek-flash
Patent summary
Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.
US6816809 — Hardware Based Utilization Metering: Overview
Title: Hardware based utilization metering
Patent number: US6816809B2
Inventor: Edgar Circenis
Original assignee: Hewlett Packard Development Co LP
Priority/filing date: 2002-07-23
Publication date: 2004-11-09
Legal status (supplied): Expired – Lifetime, expires 2022-09-25
Source: https://patents.google.com/patent/US6816809/en
Purpose (per the definitions in the source). The patent concerns pay-per-use systems that use central processor metering to determine processor utilization for billing and other purposes. The stated problem: metering processor utilization is conventionally done by software running within the computer system's operating system. In a system with partitionable hardware, gathering utilization data requires communication with all operating systems running on that hardware, which is difficult because operating systems are designed to be separated from one another and lack visibility into each other's utilization data.
Plain-language scope. The disclosed hardware-based utilization metering device is for a computer system with one or more CPUs and comprises: a state indicator coupled to a CPU, receiving an indication when the CPU is in a first state; a counter coupled to the state indicator and to a system clock, receiving a measure of system time and data related to the indication, and generating a counter value indicative of time the CPU is in the first state; and a data usage provider coupled to the counter and capable of providing the counter value. A corresponding hardware-based method determines when any of a plurality of processors is busy (not idle), provides a busy indication to a counter associated with that processor, receives a measure of computer system time at the counter, increments a counter value based on the busy indication and the amount of system time the processor is determined busy, and maintains the counter value. Figures 1A–4 depict single- and multi-CPU, multi-operating-system metering arrangements and a metering method.
What the excerpt does not establish. The supplied text is explicitly an excerpt with omitted content; it does not provide full claims, the complete specification, or the figures. No findings are made here regarding litigation, ownership transfers, validity, or prior art.
Generated 10/1/2026, 9:43:56 PM
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Assignment history
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Prior art
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