Prior art

Prior Art Analysis for U.S. Patent 6,813,742

The following analysis details prior art cited during the prosecution of U.S. Patent 6,813,742. Each reference is evaluated for its potential to anticipate the claims of the '742 patent under 35 U.S.C. § 102. The analysis focuses primarily on independent claims 1 and 6, which define the core inventive concepts of the patent.

The '742 patent describes a turbo code decoder architecture using two or more soft-in/soft-out (SISO) Log-Maximum a Posteriori (Log-MAP) decoders in a pipelined, circular, and iterative configuration to improve decoding speed and efficiency for 3G wireless communications.

Cited Patent References

1. U.S. Patent 5,446,747 - "Error-correction coding method with at least two systematic convolutional codings in parallel, corresponding iterative decoding method, decoding module and decoder"

• Full Citation: US Patent 5,446,747, issued to France Telecom.
• Filing Date: April 23, 1991.
• Brief Description: This patent is foundational to turbo codes. It describes a decoding process that uses two or more elementary decoders in an iterative loop. The output of one decoder, specifically the extrinsic information, is passed to the next decoder to refine the probability estimates of the received data. The process is repeated, with each iteration improving the accuracy of the final decoded output.
• Potential Anticipation: This reference is highly relevant as it discloses the fundamental concept of iterative decoding using multiple decoders.
  • Claim 1: The '747 patent appears to anticipate the core elements of claim 1. It describes at least two decoders coupled in a manner where the output of one feeds the input of another in an iterative process. The patent's disclosure of passing extrinsic information between decoders implies the use of memory to store these intermediate soft decisions.
  • Claim 6: The method described in claim 6 is also likely anticipated. The '747 patent explicitly details a method of iterative decoding using what is now known as the MAP algorithm, where soft decisions (extrinsic information) from one decoder are used as input for the next in a circular, iterative fashion.

2. U.S. Patent 6,023,783 - "Hybrid concatenated codes and iterative decoding"

• Full Citation: US Patent 6,023,783, assigned to the California Institute of Technology.
• Filing Date: May 15, 1996.
• Brief Description: This patent describes advanced concatenated coding schemes, including hybrid structures that can combine different types of codes. It elaborates on iterative decoding techniques where extrinsic information is exchanged between constituent decoders to achieve high performance.
• Potential Anticipation: This reference builds upon the concepts in the '747 patent and provides further detail on iterative decoding architectures.
  • Claim 1: The '783 patent discloses architectures with serially coupled decoders that operate iteratively. It describes the essential feedback loop where the output from one stage of decoding informs the next, which aligns with the "circular circuit" and iterative processing described in claim 1.
  • Claim 6: The method of iteratively processing systematic and extrinsic information using a MAP-type algorithm is a central theme of the '783 patent. It provides a detailed description of the process of generating and passing soft decision information between decoders, anticipating the core steps of claim 6.

3. U.S. Patent 6,182,261 B1 - "Efficient iterative decoding"

• Full Citation: US Patent 6,182,261 B1, assigned to Qualcomm Incorporated.
• Filing Date: November 5, 1998.
• Brief Description: This patent focuses on improving the efficiency of iterative decoders, such as turbo decoders. It discloses methods for managing memory and computations to optimize the decoding process, including techniques for handling block sizes and scheduling the iterative decoding steps.
• Potential Anticipation: This patent addresses the practical implementation and efficiency of the systems described in the '747 and '783 patents.
  • Claim 1: The '261 patent describes systems with multiple decoders and memory modules configured for iterative decoding. Its focus on efficiency anticipates the practical arrangement claimed, wherein decoders are serially coupled and memory is used to pass information between them.
  • Claim 6: This reference details methods for performing iterative decoding that include generating soft decisions and feeding them back in subsequent iterations. While it may not use the exact "logarithm approximation algorithm" language, the underlying principles of MAP-based iterative decoding are present, potentially anticipating the method of claim 6.

4. U.S. Patent 6,526,539 B1 - "Turbo decoder"

• Full Citation: US Patent 6,526,539 B1, assigned to Fujitsu Limited.
• Filing Date: June 23, 1999.
• Brief Description: This patent discloses a turbo decoder architecture designed for practical implementation. It describes the arrangement of constituent decoders, interleavers, and memory components. The focus is on a hardware implementation that can achieve high-speed performance.
• Potential Anticipation: As a more contemporary reference, it describes an architecture that is structurally very similar to that claimed in the '742 patent.
  • Claim 1: The '539 patent describes a turbo decoder with two MAP decoders, an interleaver, and a deinterleaver, which function as memory modules. The decoders are connected in a feedback loop for iterative processing, directly aligning with the structure of "at least two soft decision decoders are serially coupled in a circular circuit" as recited in claim 1.
  • Claim 6: The method of decoding described in the '539 patent inherently involves the iterative steps of processing information, generating soft outputs, storing them, and feeding them back to another decoder, which maps directly onto the method described in claim 6.

In summary, the cited prior art, particularly the foundational '747 patent and the more implementation-focused '539 patent, appear to disclose the key elements of the independent claims of the '742 patent. The novelty of the '742 patent likely resides in the specific architectural details claimed, such as the use of "pipelined" Log-MAP decoders and the specific configuration for 3G wireless standards, which would require a more detailed infringement analysis to distinguish from this prior art.