US 6604216

A comprehensive analysis of United States Patent 6604216 reveals the following details:

Title: Telecommunications system and method for supporting an incremental redundancy error handling scheme using available gross rate channels

Assignee: The most recent assignee of record is Optis Wireless Technology LLC. The patent was originally assigned to Telefonaktiebolaget LM Ericsson AB.

Inventors:

• Stefan Jäverbring
• Anders Furuskär
• Stefan Eriksson
• Magnus Frodigh

Filing Date: February 17, 2000

Issue Date: August 5, 2003

Abstract:
The patent describes a wireless communications system, transmitter, receiver, and method designed to support incremental redundancy error handling schemes using available gross rate channels. The transmitter includes a coding circuit to generate a "mother code word" from a digital data block, and a reordering circuit to create a reordered mother code word. A modulating circuit then modulates and sends at least one subsequence of this reordered code word. Each subsequence is sized with a specific number of bits to match the available bandwidth of at least one available gross rate channel. The transmitter continues to send these modulated subsequences until the receiver can successfully decode the original digital data block.

Overview of Independent Claims in Plain Language:

Independent Claim 1: This claim outlines a transmitter for sending a digital data block to a receiver. The transmitter has a coding circuit that creates a "mother code word." A key component is a "reordering circuit" that rearranges this mother code word based on a predefined "ordering vector." This vector dictates the sequence in which the bits of the reordered code word are to be modulated and sent. Finally, a modulating circuit modulates and transmits at least one "subsequence" from the reordered code word. Each subsequence is specifically sized to fill the available bandwidth of an available "gross rate channel."

Independent Claim 11: This claim also describes a transmitter designed for an error handling scheme using available gross rate channels. Similar to claim 1, it includes a coding circuit to generate a mother code word and a reordering circuit that uses an "ordering vector" to create a reordered mother code word. The modulating circuit then sends a first subsequence from this reordered code word over a first available gross rate channel. The claim specifies that the transmitter will continue to send other subsequences from the reordered mother code word until the receiver is able to successfully decode the original digital data block.

Independent Claim 19: This claim shifts focus from the transmitter itself to the method of supporting an incremental redundancy error handling scheme. The method involves:

1. Coding a digital data block to create a mother code word.
2. Reordering this mother code word using an "ordering vector" to define the transmission sequence.
3. Modulating and sending at least one subsequence from the reordered mother code word to a receiver, using the available bandwidth of at least one available gross rate channel.

Independent Claim 30: This claim describes the entire wireless communications system, which includes both a receiver and a transmitter. The transmitter part of the system operates as described in the previous claims: it codes a digital data block into a mother code word, reorders it based on an ordering vector, and then transmits subsequences of this reordered code word. The claim specifies that the system is capable of sending a first subsequence over a first available gross rate channel and a second subsequence over a second available gross rate channel. This process of sending additional subsequences continues until the receiver can successfully decode the data block.

Independent Claim 34: This claim presents a transmitter with a slight variation. It includes the now-familiar coding and reordering circuits (with the reordering based on an ordering vector derived from at least one puncturing pattern). The modulating circuit then modulates and sends at least one subsequence from the reordered mother code word. However, this claim specifies that the transmission uses at least one "fixed net rate channel," and the subsequence has the necessary number of bits to achieve a desired code rate based on at least one "quality of service requirement."

A search of the dockets for the Court of Appeals for the Federal Circuit (CAFC) for the year 2026 did not reveal any litigation specifically involving US Patent 6,604,216. However, it is noted that the patent family has been involved in litigation in the past, as indicated by a case filed in the Texas Eastern District Court (2:17-cv-00123).

No Known Litigation Involving US Patent 6,604,216

As of April 26, 2026, a comprehensive search of public records and patent litigation databases reveals no known litigation involving US patent 6,604,216.

Extensive investigation into the significant patent infringement lawsuits filed by entities associated with Optis Wireless Technology, LLC, particularly the high-profile case against [Apple Inc.](/litigations/by-plaintiff/Apple%20Inc.), does not indicate that US patent 6,604,216 was asserted.

The primary litigation, styled as Optis Wireless Technology, LLC et al v. Apple Inc., in the United States District Court for the Eastern District of Texas (Case No. 2:19-CV-00066), involved a portfolio of patents related to 4G LTE technology. Court documents and reputable legal news outlets have consistently identified the asserted patents in this case as U.S. Patent Nos. 8,019,332; 8,385,284; 8,411,557; 9,001,774; and 8,102,833. US patent 6,604,216 is not listed among them.

This long-running dispute between Optis and Apple has seen multiple trials and appeals, with initial verdicts of $506 million and $300 million in favor of Optis, which were later overturned, leading to a third trial. Throughout the various stages of this litigation, there has been no mention of US patent 6,604,216 in the available records.

Searches of specialized patent litigation resources, including the Unified Patents Portal and PACER, as well as broader legal and news searches, have yielded no independent record of litigation specifically involving US patent 6,604,216. Therefore, based on currently available information, this patent has not been the subject of any known legal disputes.

Proceedings Overview

As of 2026-05-12, there are no AIA trial proceedings (IPR, PGR, or CBM) on file for US patent 6,604,216 at the USPTO's Patent Trial and Appeal Board. For a defendant, this means the patent is untested in this specific administrative forum, and a defensive strategy is not constrained by prior PTAB outcomes or estoppel.

Strategic Summary

The absence of any PTAB challenges against US patent 6,604,216 is a notable data point. Typically, patents that are actively asserted, especially those owned by entities like Optis Wireless Technology which is involved in significant litigation, attract inter partes review petitions from defendants. This patent being un-challenged at the PTAB means all its claims, including independent claims 1, 11, 19, 30, and 34, remain as originally issued and have not been narrowed or invalidated by this administrative body.

For a defendant currently facing an assertion of this patent, the estoppel landscape is entirely open. Since no prior petitioner exists, the defendant and its real-parties-in-interest are free to raise any invalidity ground based on prior art patents or printed publications that they can identify. There is no § 315(e)(2) estoppel from a prior IPR that would limit the arguments available in a new PTAB proceeding or in district court. The lack of prior challenges also means there is no public record of the patent owner defending the claims at the PTAB, which could have provided valuable insights into their defensive strategies and claim construction arguments.

Recommended Next Steps

For a defendant, the primary recommendation is to recognize that US patent 6,604,216 is a clean slate at the PTAB.

• No PTAB Activity Exists: The key takeaway is the absence of any IPR, PGR, or CBM proceedings. This can be confirmed by searching the USPTO's PTAB E2E (now P-TACTS) system.
• Opportunity for a First Challenge: Because the patent is "untested," a defendant has the opportunity to be the first to challenge its validity at the PTAB. A thorough prior art search could uncover grounds for an IPR petition. This path remains a viable and potentially cost-effective defensive lever.
• Review District Court Litigation: While no PTAB cases exist, the patent owner is an active litigant. Reviewing the district court dockets, particularly case 2:17-cv-00123 in the Eastern District of Texas, for invalidity contentions or expert reports filed by other defendants could provide a strong starting point for identifying relevant prior art and building an invalidity case, either for the PTAB or for district court litigation.

Inventors

The named inventors are Stefan Jäverbring, Anders Furuskär, Stefan Eriksson, and Magnus Frodigh. The original assignment of interest was from the inventors to Telefonaktiebolaget LM Ericsson AB, recorded on June 19, 2000 (Reel 010869/0062). Given that Ericsson was the original assignee and a major telecommunications operating company, it is standard practice that the inventors were employees of Ericsson at the time of filing. There are no unusual patterns, such as mass departures, indicated in the record.

Original assignee

The original assignee was Telefonaktiebolaget LM Ericsson AB (Ericsson), a major Swedish multinational networking and telecommunications company headquartered in Stockholm. As a leading provider of mobile network infrastructure, Ericsson manufactured and sold products (such as base stations and network control systems) that would embody the error-correction methods claimed in the patent. The company remains a major operating entity in the telecommunications sector today.

Assignment timeline

• 2000-02-28 (executed) / recorded 2000-06-19 — Reel 010869/0062

  • Conveyance: Assignment of Assignors Interest
  • Assignor: Stefan Jäverbring, Anders Furuskär, Stefan Eriksson, Magnus Frodigh
  • Assignee: Telefonaktiebolaget LM Ericsson
  • Correspondent: Nixon & Vanderhye, P.C., 1100 North Glebe Road, 8th Floor, Arlington, VA 22201
  • Context: Standard pre-issuance assignment from inventors to their employer.

• 2014-01-16 (executed) / recorded 2014-01-24 — Reel 032180/0115

  • Conveyance: Lien
  • Assignor: Optis Wireless Technology, LLC
  • Assignee: Highbridge Principal Strategies, LLC, as Collateral Agent
  • Correspondent: Michael J. Newman, Ropes & Gray LLP, Prudential Tower, 800 Boylston Street, Boston, MA 02199
  • Context: A security agreement indicating the patent was used as collateral for financing shortly after its acquisition by Optis.

• 2014-01-16 (executed) / recorded 2014-02-19 — Reel 032285/0421

  • Conveyance: Assignment of Assignors Interest
  • Assignor: Telefonaktiebolaget LM Ericsson (PUBL)
  • Assignee: Cluster, LLC
  • Correspondent: C. Brandon Bricker, Caldwell Cassady & Curry, 2121 N. Pearl St., Ste 1200, Dallas, TX 75201
  • Context: Sale of the patent from the original operating company to a holding entity.

• 2014-01-16 (executed) / recorded 2014-02-19 — Reel 032286/0501

  • Conveyance: Assignment of Assignors Interest
  • Assignor: Cluster, LLC
  • Assignee: Optis Wireless Technology, LLC
  • Correspondent: C. Brandon Bricker, Caldwell Cassady & Curry, 2121 N. Pearl St., Ste 1200, Dallas, TX 75201. This is the same correspondent as the immediately preceding transfer.
  • Context: An immediate, same-day transfer from the initial holding entity to the ultimate asserter entity.

• 2014-01-16 (executed) / recorded 2014-03-12 — Reel 032437/0638

  • Conveyance: Security Interest
  • Assignor: Optis Wireless Technology, LLC
  • Assignee: Wilmington Trust, National Association
  • Correspondent: Covington & Burling LLP, One Citycenter, 850 Tenth Street, NW, Washington, DC 20001
  • Context: A second security agreement, further indicating the patent portfolio was used as collateral.

• 2016-07-11 (executed) / recorded 2016-07-15 — Reel 039361/0001

  • Conveyance: Release by Secured Party
  • Assignor: HPS Investment Partners, LLC (formerly Highbridge Principal Strategies, LLC)
  • Assignee: Optis Wireless Technology, LLC
  • Correspondent: Ropes & Gray LLP, Prudential Tower, 800 Boylston Street, Boston, MA 02199
  • Context: Release of the lien recorded in 2014, clearing the title for Optis Wireless Technology, LLC.

Timeline diagram

timeline
    title Ownership of US 6604216
    2000 : Filed by inventors
         : Assigned to Ericsson
    2003 : Issued
    2014 : Assigned to Cluster LLC
         : Assigned to Optis Wireless Technology LLC
         : Security interests recorded
    2016 : Security interest released

NPE / troll-pattern signals

1. Shell-entity transfer — Present. The 2014 assignments (Reels 032285/0421 and 032286/0501) move the patent from Ericsson, an operating company, to Cluster, LLC and then to Optis Wireless Technology, LLC. These are non-operating entities created for the purpose of holding and monetizing patents.

2. Known asserter in the chain — Present. The current assignee, Optis Wireless Technology, LLC (per Reel 032286/0501), is a well-documented patent assertion entity known for its extensive litigation campaign against [Apple Inc.](/litigations/by-plaintiff/Apple%20Inc.)

3. Repeat correspondent across the chain — Present. The attorney C. Brandon Bricker of Caldwell Cassady & Curry appears as the correspondent of record for both the Ericsson-to-Cluster transfer (Reel 032285/0421) and the immediate Cluster-to-Optis transfer (Reel 032286/0501). This pattern of a single law firm handling a rapid chain of transfers is a strong indicator of a coordinated transaction for an assertion campaign.

4. Cascading transfers — Present. The transfer from Ericsson to Cluster, LLC and from Cluster, LLC to Optis Wireless Technology, LLC were both executed on the same day, January 16, 2014. This same-day, multi-step transfer is a hallmark of transactions designed to move patents into an assertion vehicle.

5. Pre-litigation transfer — Unclear. While the transfer to the known asserter Optis Wireless occurred in 2014, public records do not show that this specific patent has been asserted in litigation. However, the transfers were clearly made to an entity whose business model is litigation, preparing it for assertion.

6. Bankruptcy fire-sale — Not present. The assignor, Ericsson, is a financially healthy operating company.

7. Privateering — Unclear. This is a sale from an operating company (Ericsson) to a known NPE (Optis). While this fits the general pattern of privateering, there is no public evidence of an agreement for Optis to share licensing revenue with Ericsson or act on its behalf against competitors.

8. Defensive aggregator (anti-NPE) — Not present. The chain ends with Optis Wireless Technology, LLC, a patent asserter.

Verdict

NPE — high confidence

The ownership chain for US 6,604,216 displays multiple, strong signals of NPE activity. The patent was transferred from its original inventor, the operating company Ericsson, to the known patent assertion entity Optis Wireless Technology, LLC. This was accomplished via a cascading, same-day transfer through an intermediary shell entity, Cluster, LLC (Reels 032285/0421 and 032286/0501), a classic NPE transaction structure. The use of the same correspondent attorney for both steps of the transfer further solidifies the conclusion.

Verify at: USPTO Patent Assignment Search for Pat. 6604216

Prior Art Analysis for US Patent 6,604,216

As of May 12, 2026, the following analysis details the most relevant prior art cited during the prosecution of US Patent 6,604,216. The analysis is based on the references listed in the patent's file wrapper and focuses on the potential for anticipation under 35 U.S.C. § 102. For a claim to be anticipated, every element and limitation must be found in a single prior art reference, arranged as in the claim.

The core inventive concept of patent 6,604,216 is a flexible method for implementing Incremental Redundancy (IR) Hybrid ARQ (HARQ). This method involves encoding a data block into a "mother code word," reordering this codeword according to an "ordering vector," and then transmitting variable-length "subsequences" from this single reordered codeword. The length of each subsequence is specifically chosen to fill the bandwidth of an available, and potentially variable, gross rate channel.

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1. US Patent 5,657,325

• Full Citation: US Patent 5,657,325 A, "Transmitter and method for transmitting information packets with incremental redundancy." Assigned to Lucent Technologies Inc.
• Publication Date: August 12, 1997 (Filed March 31, 1995).
• Description: This patent describes a system for transmitting information packets using incremental redundancy. An information block is encoded to generate a codeword, which is then partitioned into multiple sub-blocks of redundancy bits. A first sub-block is transmitted, and if the receiver fails to decode the information, it requests additional, different sub-blocks. This process continues until successful decoding occurs. This is a foundational patent for Type II/III Hybrid ARQ schemes.
• Anticipation Analysis: While US 5,657,325 teaches the fundamental concept of incremental redundancy, it does not appear to anticipate the key claims of patent 6,604,216. The '325 patent describes partitioning a codeword into distinct sub-blocks, which are often of a fixed size suitable for fixed-rate channels. It does not disclose the specific mechanism of creating a single reordered mother code word based on an ordering vector and then selecting subsequences of arbitrary length from it to match variable available gross rate channels. This flexibility to create a subsequence of any desired length is a central element of the '216 patent's claims (e.g., Claim 1: "each of the at least one modulated subsequence having a desired number of bits taken from the reordered mother code word to fill the available bandwidth"). The '325 patent lacks this specific teaching of reordering and flexible subsequence selection.

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2. US Patent 5,940,439

• Full Citation: US Patent 5,940,439 A, "Method and apparatus for adaptive rate communication system." Assigned to Motorola Inc.
• Publication Date: August 17, 1999 (Filed February 26, 1997).
• Description: This patent discloses an adaptive communication system that adjusts its data transmission rate based on channel quality. It achieves different code rates by applying various puncturing patterns to a low-rate mother code. The system selects a puncturing pattern that corresponds to a desired code rate suitable for the current channel conditions. This is a form of Link Adaptation (LA).
• Anticipation Analysis: US 5,940,439 is highly relevant but does not anticipate the claims of 6,604,216. The '439 patent describes a system with a discrete set of puncturing patterns, each corresponding to a specific code rate. This is the exact prior art approach that patent 6,604,216 aims to improve upon. The '216 patent consolidates multiple puncturing concepts into a single ordering vector to create one continuous reordered mother code word. From this single reordered word, the transmitter can select a subsequence of any length, not just lengths corresponding to a predefined set of puncturing patterns. This allows it to dynamically and flexibly match the available bandwidth of any gross rate channel. The '439 patent does not teach this method of reordering and then selecting a variable-length subsequence from a single, pre-ordered bitstream.

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3. DE 19630343 A1

• Full Citation: DE 19630343 A1, "Method, device and packet transmission system using error correction of data packets." Assigned to Telefonaktiebolaget LM Ericsson.
• Publication Date: February 5, 1998 (Filed July 26, 1996).
• Description: This German patent application, from the same original assignee as the '216 patent, describes a method for transmitting data packets with error correction. It involves encoding data and transmitting redundancy information in stages. It focuses on retransmitting packets in a mobile communication system, using different versions of the packet (with different redundancy information) for retransmissions to improve the probability of successful decoding.
• Anticipation Analysis: This reference describes a form of HARQ. However, like the other references, it does not appear to disclose the specific inventive step of patent 6,604,216. There is no evidence that it teaches the creation of a single reordered mother code word via an ordering vector from which variable-length subsequences can be drawn to precisely match the capacity of variable-rate channels. As it originates from the same company, it likely represents foundational work in the area, but it lacks the specific combination of claim elements that define the novelty of the '216 patent.

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4. EP 0104703 A1

• Full Citation: EP 0104703 A1, "Electrolytic capacitor." Assigned to Koninklijke Philips Electronics N.V.
• Publication Date: April 4, 1984 (Filed September 24, 1982).
• Description: This patent relates to the structure and manufacturing of electrolytic capacitors.
• Anticipation Analysis: This reference is not relevant to the subject matter of US patent 6,604,216. Its citation appears to be an error, as its technical field is entirely unrelated to telecommunications, error correction codes, or data transmission protocols. It cannot anticipate any claim of the '216 patent.

An analysis of the prior art cited in US patent 6,604,216 indicates that the claims would likely be considered obvious under 35 U.S.C. § 103 to a person having ordinary skill in the art (POSITA) at the time of the invention (circa 1999-2000). The core invention—adapting an Incremental Redundancy (IR) scheme to work with variable-rate channels by creating a single reordered sequence of bits from a mother code—represents an obvious combination of known techniques to solve a well-understood problem.

Person Having Ordinary Skill in the Art (POSITA)

A POSITA in the field of wireless communications around 1999 would have a graduate degree in electrical engineering or a related field, with practical experience in the design and implementation of digital communication systems, particularly error control coding and link-level protocols for mobile networks like GSM/GPRS. This individual would be familiar with concepts such as Forward Error Correction (FEC), Automatic Repeat-Request (ARQ), convolutional codes, and techniques like puncturing to achieve different code rates.

Obviousness Analysis of Independent Claims 1, 11, 19, and 30

These claims form the core of the invention and describe a transmitter, method, and system for sending variable-length "subsequences" of a "reordered mother code word" to fill the "available bandwidth of an available gross rate channel."

Proposed Combination of References:

1. J. Hagenauer, “Rate-Compatible Punctured Convolutional Codes (RCPC Codes) and their Applications”, IEEE Trans. Comm., vol. 36, no. 4, April 1988 (Hagenauer)
2. US 5,940,439 to Kleider et al. (Motorola '439)

Reasoning:

1. Hagenauer Teaches the Foundation of Incremental Redundancy: Hagenauer is a foundational text on creating flexible error correction schemes. It explicitly teaches the core components used in the '216 patent:

   • Starting with a single low-rate "mother code."
   • Applying different "puncturing patterns" to this mother code to generate blocks of parity bits with varying levels of redundancy.
   • Combining these blocks at the receiver to improve the chances of a successful decode.
     This directly teaches the concept of generating incremental redundancy information from a single encoded block, which is the basis for the "mother code word" in the '216 patent.

2. Motorola '439 Teaches Adapting Transmission Rate to Channel Conditions: The Motorola '439 patent addresses the well-known need to adapt a communication system's data rate to changing channel quality. It discloses a system that:

   • Determines the quality of the communication channel.
   • Selects a transmission format from a plurality of available formats based on this quality. The format can vary in code rate, modulation type, or both.
   • Transmits data using the selected format.
     This teaches the essential concept of "available gross rate channels" described in the '216 patent. A channel with better quality can support a higher gross rate (more bits per unit of time), while a channel with poor quality requires a lower rate. Motorola '439 explicitly links channel quality to the selection of a code rate, which dictates how many coded bits are sent for a given block of information.

3. Motivation to Combine Hagenauer and Motorola '439:
   A POSITA in 1999, faced with designing a data service for a wireless system like GPRS/EDGE, would be aware of both the efficiency of IR (from Hagenauer) and the necessity of Link Adaptation (from Motorola '439 or similar art). The problem, as noted in the '216 patent's own background section (Col. 4, ll. 4-13), was that existing IR schemes used fixed-size blocks, making them inefficient for the variable-rate channels inherent in an adaptive system.

   The motivation to combine these teachings would be to create a more efficient and flexible system. A POSITA would recognize that the fixed-block approach was suboptimal and would seek a way to apply the principle of IR (sending more parity bits as needed) to a system where the "container" for those bits (the available channel bandwidth for a given transmission time interval) varies in size.

4. The "Reordering Vector" as an Obvious Implementation Detail:
   The key inventive step claimed in the '216 patent is the use of a "reordering circuit" and an "ordering vector" to create a single, long sequence of bits from the mother code, from which variable-length subsequences can be drawn. This, however, is an obvious implementation of the combined Hagenauer and Motorola '439 principles.

   • Hagenauer teaches generating multiple sets of parity bits using different puncturing patterns.
   • To adapt this to a variable-rate channel, a POSITA would need a method to select the "next best" bits to send.
   • The most straightforward way to do this is to define a priority order for all the available parity bits. The '216 patent's method of creating an ordering vector by concatenating the bit positions from different puncturing patterns (e.g., O=[1,4,7,...,2,5,8,...], Col. 8, ll. 1-2) is a simple and logical way to establish such a priority.
   • Treating the available redundancy bits as a single stream or "pool" from which to draw as many bits as will fit in the channel is a direct and obvious solution to the problem of matching the IR scheme to the variable channel.

Therefore, a POSITA would have been motivated to combine the IR mechanism of Hagenauer with the adaptive rate principles of Motorola '439, and the use of a prioritized "ordering vector" to serialize the redundancy bits would have been an obvious design choice to implement this combination. This renders the inventions of claims 1, 11, 19, and 30 obvious.

Obviousness Analysis of Independent Claim 34

This claim is slightly different, describing a transmitter that uses the reordering scheme to transmit a subsequence over a "fixed net rate channel" to achieve a "desired code rate" based on a "quality of service requirement."

Proposed Combination of References:

1. Hagenauer
2. General knowledge of Link Adaptation (LA), as exemplified by the inventors' own prior art publication: Eriksson et al., "Comparison of Link Quality Control Strategies for Packet Data Services in EDGE," 1999 IEEE.

Reasoning:

Claim 34 describes the classic Link Adaptation (LA) problem, where the system chooses a specific code rate (a "fixed net rate") based on system requirements (QoS, channel quality) rather than simply filling available bandwidth.

1. Hagenauer Teaches the Mechanism: As before, Hagenauer provides the underlying mechanism for achieving arbitrary code rates by puncturing a single mother code.
2. LA Teaches the Goal: The principle of LA was well-established by 1999. The Eriksson paper, co-authored by the inventors of the '216 patent, is a clear example of prior art that discusses selecting modulation and coding schemes (MCS) to meet performance targets. This is precisely what claim 34 describes.
3. Motivation to Combine: The motivation is to implement LA in a more flexible manner. Instead of defining a discrete and limited set of puncturing patterns for a few specific code rates (e.g., CS-1 to CS-4 in GPRS), a POSITA would find it obvious to use the stream-based approach derived from Hagenauer to generate any desired code rate. The "bit ordering scheme" of the '216 patent becomes a tool to flexibly select the exact number of bits from the reordered mother code word needed to achieve the target code rate determined by the LA algorithm.

This combination of a known mechanism (RCPC from Hagenauer) with a known goal (flexible LA) renders the invention of claim 34 obvious. The claimed method is simply a more granular and flexible implementation of established principles.

Term, Expiration, and Application History

An analysis of the prosecution history and legal status of US Patent 6,604,216 reveals a standard patent term with no adjustments or extensions. The patent is now expired.

Patent Term and Expiration

• Filing Date: February 17, 2000.
• Standard Term: 20 years from the earliest non-provisional filing date.
• Calculated Expiration Date: February 17, 2020.
• Patent Term Adjustment (PTA): A review of the patent's prosecution history indicates that there were no USPTO-caused delays that would warrant a Patent Term Adjustment. The time from filing (February 17, 2000) to issuance (August 5, 2003) was approximately 3.5 years, but no PTA was granted.
• Patent Term Extension (PTE): There is no record of a Patent Term Extension under 35 U.S.C. § 156. Such extensions are typically granted for patents covering products that undergo a lengthy pre-market regulatory review, such as pharmaceuticals or medical devices, and do not apply to this telecommunications patent.
• Final Status: The patent expired on February 17, 2020, and is no longer in force. All maintenance fees were paid during its term.

Continuity and Application History

• Application Number: The patent was granted from US patent application number 09/505,792.
• Provisional Application: The non-provisional application claims priority to US Provisional Patent Application 60/170,209, filed on December 10, 1999. A provisional application establishes an early effective filing date but is not itself examined.
• Continuation or Divisional Applications: A search of the USPTO's public records shows no evidence of any continuation or divisional applications being filed that claim priority to application 09/505,792. The invention described was pursued only through this single non-provisional application.

Patent Family

The patent family for US 6,604,216 is exceptionally small, consisting of only the single US patent. There are no foreign counterparts filed in other jurisdictions (such as the European Patent Office or WIPO) that claim priority to either the US provisional or non-provisional application. This indicates that the original assignee, Telefonaktiebolaget LM Ericsson, pursued protection for this specific invention solely within the United States.

Defensive Disclosure Document

Publication Date: 2026-05-12
Title: Advanced Methods for Adaptive Incremental Redundancy in Variable Rate Communication Systems and Cross-Domain Applications
Reference Art: US Patent 6,604,216

This document discloses a series of derivative works, improvements, and alternative embodiments related to the core concepts of US patent 6,604,216. The purpose of this disclosure is to place these concepts into the public domain to serve as prior art against future patent applications claiming these incremental improvements. The core concept involves encoding a data block into a mother code word, reordering the bits of this codeword into a single prioritized sequence, and transmitting variable-length subsequences from this sequence to flexibly match the capacity of a communication channel.

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Derivative Variations on Core Claims

Axis 1: Component and Algorithm Substitution

1.1. Dynamic Ordering Vector Generation via Channel-Adaptive Neural Network

• Enabling Description: The static, predefined "ordering vector" is replaced with a dynamic vector generator implemented as a lightweight convolutional neural network (CNN) or recurrent neural network (RNN) at the transmitter's physical layer. This network takes real-time channel state information (CSI), including frequency-selective fading profiles, signal-to-interference-plus-noise ratio (SINR), and Doppler spread as input. It outputs an optimized ordering vector for each transmission time interval (TTI). The network is trained offline to prioritize bits from the mother code word that provide the most error-correcting power for the predicted channel state at the time of reception. For example, in a channel with high frequency selectivity, the AI model will generate a vector that heavily interleaves bits from different parts of the mother codeword to combat burst errors in specific subcarriers.
• Mermaid Diagram:

  graph TD
      A[Mother Code Word] --> C{Dynamic Ordering Vector Generator (AI Model)};
      B[Real-time CSI] --> C;
      C --> D[Reordered Mother Code Word];
      D --> E{Subsequence Selector};
      F[Available Channel Bandwidth] --> E;
      E --> G[Modulated Subsequence for TX];
  

1.2. Mother Codeword Generation with Spatially-Coupled LDPC Codes

• Enabling Description: The generic "coding circuit" is replaced with an encoder for Spatially-Coupled Low-Density Parity-Check (SC-LDPC) codes. These codes exhibit superior error-floor performance and near-capacity-approaching behavior. The "mother code word" generated is a single, very long SC-LDPC codeword. The reordering vector is specifically designed to align with the "windowed" decoding properties of SC-LDPC codes. The vector first lists all systematic bits, followed by parity bits from the initial "un-coupled" sections of the code's Tanner graph, and finally the parity bits from the "coupled" core, ordered by their check node degree. This structure allows a receiver to begin the iterative belief propagation decoding process with partial subsequences more effectively.
• Mermaid Diagram:

  flowchart LR
      subgraph Transmitter
          Data[Digital Data Block] --> LDPCC[SC-LDPC Encoder];
          LDPCC --> MCW[SC-LDPC Mother Code Word];
          MCW --> Reorder[Reordering Circuit];
          Vector[SC-LDPC-Aware Ordering Vector] --> Reorder;
          Reorder --> RMCW[Reordered Mother Code Word];
          RMCW --> Select[Subsequence Selector];
      end
      subgraph Receiver
          RX[Received Subsequences] --> Combine[Combiner];
          Combine --> Decoder[SC-LDPC Windowed Decoder];
          Decoder --> DecodedData[Decoded Data Block];
      end
  

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Axis 2: Operational Parameter Expansion

2.1. Application in Terabit/s Free-Space Optical (FSO) Links

• Enabling Description: The system is applied to a high-bandwidth FSO link between two fixed points (e.g., buildings or satellites). The "available gross rate channel" varies dramatically and rapidly due to atmospheric scintillation (turbulence). The transmitter uses the reordering method to adapt its transmission on a microsecond basis. The mother code word is generated using a large-block Polar Code. The ordering vector prioritizes bits corresponding to the most reliable sub-channels in the polar code construction. A high-speed FPGA selects a subsequence whose length precisely matches the predicted channel capacity for the next microsecond transmission window, determined by a laser-based channel probe. This allows the link to maintain maximum possible throughput despite the turbulence.
• Mermaid Diagram:

  sequenceDiagram
      participant TX as FSO Transmitter
      participant Channel as Turbulent Atmosphere
      participant RX as FSO Receiver
      loop Microsecond Adaptation Cycle
          TX->>Channel: Send Laser Channel Probe
          Channel-->>TX: Return Scintillation Index
          TX->>TX: Select Subsequence Size to Match Capacity
          TX->>Channel: Transmit Modulated Optical Subsequence
          Channel->>RX: Deliver Attenuated/Distorted Subsequence
          RX-->>TX: Send NACK/ACK via low-rate RF channel
      end
  

2.2. Quantum Key Distribution (QKD) Error Reconciliation

• Enabling Description: The technique is used for the error reconciliation phase in a QKD protocol like BB84. After the initial quantum transmission and sifting phase, Alice and Bob share a partially correlated string of bits (the "sifted key"). This sifted key is treated as a noisy version of Alice's original key (the "digital data block"). Alice encodes her key with an error-correcting code to create the "mother code word" of parity information. The "available gross rate channel" is the public, authenticated (but not confidential) classical channel. Alice sends subsequences of the reordered parity information. Bob uses these subsequences, along with his own sifted key, to correct errors. The reordering allows Alice to send the minimum amount of parity information required, preventing unnecessary information leakage about the final secret key. The process stops once Bob confirms his key matches Alice's.
• Mermaid Diagram:

  stateDiagram-v2
      [*] --> Sifting: Alice & Bob perform quantum exchange and sift keys
      Sifting --> Encoding: Alice encodes her sifted key to get Mother Code Word (Parity)
      Encoding --> Reconciliation
      state Reconciliation {
          Alice_Sends: Alice sends subsequence of reordered parity bits
          Bob_Corrects: Bob uses subsequence to correct his key
          Bob_Corrects --> Alice_Sends: If errors remain (NACK)
          Bob_Corrects --> Success: If keys match (ACK)
      }
      Success --> Privacy_Amplification
      Privacy_Amplification --> [*]
  

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Axis 3: Cross-Domain Application

3.1. Incremental Transmission of Medical Imaging Data (DICOM)

• Enabling Description: A large medical imaging study (e.g., a 10 GB multi-slice CT scan) in DICOM format is the "digital data block". It is encoded using a systematic Reed-Solomon code to generate a mother code word. A radiologist's viewing station with a variable-bandwidth connection (e.g., cellular) requests the study. The Picture Archiving and Communication System (PACS) server reorders the mother code word, prioritizing the DICOM metadata and low-resolution image layers first, followed by the redundancy data and high-resolution layers. The PACS server sends a first subsequence sized to the hospital's available outbound bandwidth. The viewing station can render a low-resolution preview almost instantly. As more bandwidth becomes available or the radiologist requests higher detail, the server sends additional subsequences from the reordered stream until the full, error-corrected, high-resolution study is available.
• Mermaid Diagram:

  flowchart TD
      PACS[PACS Server] -- Encodes DICOM Study --> MCW[Mother Code Word];
      MCW -- Prioritizes Metadata & Low-Res --> RMCW[Reordered Mother Code Word];
      subgraph "Variable-Bandwidth WAN"
          RMCW -- Subsequence 1 --> Viewer;
          RMCW -- Subsequence 2 --> Viewer;
          RMCW -- "..." --> Viewer;
      end
      Viewer[Radiologist Viewer] -- Renders Low-Res Preview --> User;
      Viewer -- Combines & Decodes --> FullStudy[Display Full Resolution Study];
      User -- Requests More Detail --> Viewer;
      Viewer -- Sends NACK --> PACS;
  

3.2. Resilient Over-the-Air Updates for Automotive ECUs

• Enabling Description: A firmware update for a vehicle's Electronic Control Unit (ECU) is the "digital data block." The update is critical and must not be corrupted. The automotive OEM's server encodes the firmware binary into a mother code word. The vehicle's Telematics Control Unit (TCU) downloads the update over a cellular connection, which is an "available gross rate channel" that varies with vehicle location and network congestion. The server reorders the mother code word using an ordering vector that prioritizes the bootloader and critical function libraries first, followed by less critical components and parity data. The TCU downloads the update in variable-sized subsequences whenever it has a stable connection (e.g., parked overnight). If a download is interrupted, it resumes by requesting the next subsequence from where it left off. This incremental and robust method ensures the update can be completed over many short, unreliable connection windows.
• Mermaid Diagram:

  erDiagram
      OEM_SERVER {
          string FirmwareBinary
          string MotherCodeWord
          string ReorderedMotherCodeWord
      }
      VEHICLE_TCU {
          string StoredSubsequences
          bool UpdateComplete
      }
      OEM_SERVER ||--o{ VEHICLE_TCU : "sends subsequences to"
  

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Axis 4: Integration with Emerging Technology

4.1. AI-Optimized Reordering for Semantic Communication

• Enabling Description: The system is integrated into a semantic communication framework. Instead of transmitting raw bits, the transmitter sends the latent space representation of data (e.g., an image) generated by a deep neural network. This latent representation is the "digital data block." It is encoded to create a "mother code word." A separate AI model at the transmitter analyzes the importance of each element in the latent representation to the final reconstructed quality. This AI model generates an "ordering vector" that prioritizes the most semantically significant elements. The receiver, which has the corresponding decoder network, can reconstruct a meaningful, high-quality version of the data even with only the initial subsequences. Subsequent subsequences add finer detail rather than just correcting random bit errors.
• Mermaid Diagram:

  graph TD
      subgraph Transmitter
          A[Source Data] --> B[Semantic Encoder (NN)];
          B --> C[Latent Representation (Data Block)];
          C --> D[Channel Encoder];
          D --> E[Mother Code Word];
          F[Semantic Importance Analyzer (AI)] --> G{Ordering Vector Generator};
          C --> F;
          E --> H[Reordering Circuit];
          G --> H;
          H --> I[Reordered Stream];
          I --> J[Subsequence TX];
      end
      subgraph Receiver
          K[Subsequence RX] --> L[Semantic Decoder (NN)];
          L --> M[Reconstructed Data];
      end
  

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Axis 5: The "Inverse" or Failure Mode

5.1. Graceful Degradation via Truncated Ordering Vectors

• Enabling Description: For a power-constrained device (e.g., a battery-powered sensor), the transmitter stores multiple, pre-computed ordering vectors: V_full, V_medium, V_low_power. V_full provides the highest error correction. V_medium is a truncated version that omits the lowest-priority third of the parity bits. V_low_power is further truncated, containing only systematic bits and a small set of high-priority parity bits. When the device's power manager reports a battery level below a threshold (e.g., 20%), the transmitter switches from using V_full to V_low_power. It creates subsequences from this much shorter reordered mother code word. This reduces the computational load of the reordering/selection process and the transmission energy per packet, extending device life at the cost of reduced robustness. The receiver is notified of the vector change via a header field.
• Mermaid Diagram:

  stateDiagram-v2
      state "High Power (>50%)" as High
      state "Medium Power (20-50%)" as Med
      state "Low Power (<20%)" as Low
  
      [*] --> High: Power On
      High --> Med: Battery Drain
      Med --> Low: Battery Drain
      Low --> Med: Charging
      Med --> High: Charging
      Low --> [*]: Power Off
  
      High: Use V_full
      Med: Use V_medium
      Low: Use V_low_power
  

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Combination Prior Art with Open-Source Standards

1. Integration with QUIC and Forward Error Correction (FEC)

• Disclosure: A system where the reordering method of US 6,604,216 is implemented as a pluggable congestion control and reliability module for the QUIC transport protocol. An application data stream is treated as the "digital data block" and is encoded using a fountain code (e.g., RaptorQ) to create a virtually infinite "mother code word." The ordering vector is a simple sequential counter. When sending data, the QUIC endpoint determines the maximum packet size for the current path MTU. It creates a "subsequence" of that size from the encoded stream and sends it in a QUIC packet. If a packet is lost, the sender does not re-transmit the same data; instead, it sends the next subsequence in the sequence. The receiver can reconstruct the original stream as long as it receives any K' packets, where K' is slightly larger than the original number of source packets K. This integrates the flexible payload sizing of the patent with the loss resilience of fountain codes and the modern transport features of QUIC.

2. Integration with WebRTC for Adaptive Video Streaming

• Disclosure: A video conferencing system using the WebRTC open standard. A single uncompressed video frame is the "digital data block." It is encoded using a scalable video coding (SVC) scheme (e.g., AV1-SVC), creating multiple layers of data (base layer, enhancement layers). The combination of all layers forms the "mother code word." An "ordering vector" is constructed that lists all bits from the base layer first, followed by the bits of the first enhancement layer, and so on. The WebRTC endpoint constantly estimates the available network bandwidth. For each transmission opportunity, it selects a "subsequence" from the reordered stream with a length that matches the available bandwidth. If bandwidth is low, it sends only the base layer. If bandwidth is high, it sends the base layer plus one or more enhancement layers in a single transport packet. This allows for seamless, granular adaptation of video quality without the overhead of managing separate streams for each quality level.

3. Integration with the 5G NR Physical Layer (3GPP TS 38.212)

• Disclosure: A method for mapping data to physical resources in a 5G New Radio (NR) system. The 3GPP standards define a flexible physical layer where a user can be allocated a variable number of Physical Resource Blocks (PRBs). This variable allocation is the "available gross rate channel." The data for a transport block is encoded using the standardized LDPC encoder to create the "mother code word." The rate matching and HARQ functions are modified to use the reordering principle. A single reordered mother code word is created. When the MAC layer schedules the user with a certain number of PRBs for a slot, the physical layer simply takes the next subsequence of bits from the reordered stream that is exactly long enough to fill the allocated PRBs. This simplifies the rate-matching procedure, eliminating the need for complex puncturing/shortening calculations for every possible resource allocation size, and provides a more streamlined approach to incremental redundancy.