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US 6604216

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Patent summary

Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.

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A comprehensive analysis of United States Patent 6604216 reveals the following details:

Title: Telecommunications system and method for supporting an incremental redundancy error handling scheme using available gross rate channels

Assignee: The most recent assignee of record is Optis Wireless Technology LLC. The patent was originally assigned to Telefonaktiebolaget LM Ericsson AB.

Inventors:

  • Stefan Jäverbring
  • Anders Furuskär
  • Stefan Eriksson
  • Magnus Frodigh

Filing Date: February 17, 2000

Issue Date: August 5, 2003

Abstract:
The patent describes a wireless communications system, transmitter, receiver, and method designed to support incremental redundancy error handling schemes using available gross rate channels. The transmitter includes a coding circuit to generate a "mother code word" from a digital data block, and a reordering circuit to create a reordered mother code word. A modulating circuit then modulates and sends at least one subsequence of this reordered code word. Each subsequence is sized with a specific number of bits to match the available bandwidth of at least one available gross rate channel. The transmitter continues to send these modulated subsequences until the receiver can successfully decode the original digital data block.

Overview of Independent Claims in Plain Language:

Independent Claim 1: This claim outlines a transmitter for sending a digital data block to a receiver. The transmitter has a coding circuit that creates a "mother code word." A key component is a "reordering circuit" that rearranges this mother code word based on a predefined "ordering vector." This vector dictates the sequence in which the bits of the reordered code word are to be modulated and sent. Finally, a modulating circuit modulates and transmits at least one "subsequence" from the reordered code word. Each subsequence is specifically sized to fill the available bandwidth of an available "gross rate channel."

Independent Claim 11: This claim also describes a transmitter designed for an error handling scheme using available gross rate channels. Similar to claim 1, it includes a coding circuit to generate a mother code word and a reordering circuit that uses an "ordering vector" to create a reordered mother code word. The modulating circuit then sends a first subsequence from this reordered code word over a first available gross rate channel. The claim specifies that the transmitter will continue to send other subsequences from the reordered mother code word until the receiver is able to successfully decode the original digital data block.

Independent Claim 19: This claim shifts focus from the transmitter itself to the method of supporting an incremental redundancy error handling scheme. The method involves:

  1. Coding a digital data block to create a mother code word.
  2. Reordering this mother code word using an "ordering vector" to define the transmission sequence.
  3. Modulating and sending at least one subsequence from the reordered mother code word to a receiver, using the available bandwidth of at least one available gross rate channel.

Independent Claim 30: This claim describes the entire wireless communications system, which includes both a receiver and a transmitter. The transmitter part of the system operates as described in the previous claims: it codes a digital data block into a mother code word, reorders it based on an ordering vector, and then transmits subsequences of this reordered code word. The claim specifies that the system is capable of sending a first subsequence over a first available gross rate channel and a second subsequence over a second available gross rate channel. This process of sending additional subsequences continues until the receiver can successfully decode the data block.

Independent Claim 34: This claim presents a transmitter with a slight variation. It includes the now-familiar coding and reordering circuits (with the reordering based on an ordering vector derived from at least one puncturing pattern). The modulating circuit then modulates and sends at least one subsequence from the reordered mother code word. However, this claim specifies that the transmission uses at least one "fixed net rate channel," and the subsequence has the necessary number of bits to achieve a desired code rate based on at least one "quality of service requirement."

A search of the dockets for the Court of Appeals for the Federal Circuit (CAFC) for the year 2026 did not reveal any litigation specifically involving US Patent 6,604,216. However, it is noted that the patent family has been involved in litigation in the past, as indicated by a case filed in the Texas Eastern District Court (2:17-cv-00123).

Generated 5/12/2026, 12:46:44 AM