Invalidity dossier

US 6009450

Finite field inverse circuit

Current assignee: Certicom Corp

Added 9/21/2026, 1:09:16 PM

At a glanceNo PTAB challengesNo litigation on file

Active provider: DeepSeek · deepseek-flash

Patent summary

Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.

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Patent Overview — US 6009450

Title: Finite field inverse circuit
Patent No.: US 6009450 A
Application No.: US 08/997,943
Inventors: James Douglas Dworkin, P. Michael Glaser, Michael John Torla, Ashok Vadekar, Robert John Lambert, Scott Alexander Vanstone
Original Assignee: Certicom Corp; Motorola Inc
Current Assignee (as listed): Certicom Corp; Motorola Solutions Inc
Priority/Filing Date: 1997-12-24
Publication/Grant Date: 1999-12-28
Legal Status: Expired – Lifetime (anticipated expiration 2017-12-24)

Purpose
The patent describes a method and apparatus for performing finite field and integer arithmetic. The text explains that Elliptic Curve (EC) cryptography requires addition, multiplication, squaring, and inversion (plus subtraction for fields not of characteristic two), and that modular arithmetic is also needed. Because users were transitioning from RSA to EC cryptography, the stated aim is an arithmetic processor supporting both operations with little or no performance penalty, usable with different field sizes and scalable for higher speed via simultaneous multi-step execution.

Plain-Language Scope
The disclosed processor includes general-purpose registers (a register file), an arithmetic-logic unit with shared finite field and integer arithmetic circuitry, a mode selection control choosing between finite field and modular integer computations, a field-size control, and a micro-programmed controller. Special-purpose registers are individually addressable and are not shared by the arithmetic circuitry. In an alternative embodiment, separate finite field and modular integer units have their own special-purpose registers and controllers. Sub-ALUs perform XOR, shift left/right, XOR-shift, integer add, and integer subtract. Figures 11 and 12 illustrate finite field inverse architecture and an inverse-control state machine.

Not established by this excerpt
The excerpt is partial: it omits full claim text, detailed description, and complete figure content. It therefore does not establish the specific claimed inverse method, exact circuit topology, or embodiments beyond those summarized. Classification, assignment, and status entries are stated as listed assumptions, not legal conclusions.

Source: https://patents.google.com/patent/US6009450/en

Generated 10/1/2026, 10:00:48 PM

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Proceedings on file (0)

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PTAB challenges

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Assignment history

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Prior art

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Obviousness

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Extensions

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Derivative works

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