US 5603028

I'll run targeted searches for this patent number, including litigation/docket coverage.

Let me run additional targeted checks for litigation/docket activity and any USPTO post-grant proceedings.

Let me do a final check specifically for court/docket records referencing this exact patent number.

Scope of search and a caveat up front

I searched for the exact identifier US 5,603,028 / US08/381,524. Two important results-specific caveats:

1. I found no CAFC 2026 docket, no district court case, and no PTAB (IPR/PGR) proceeding naming this patent. Multiple search hits referencing "the '028 Patent" are different patents — e.g., StratosAudio's U.S. 8,688,028, Xpoint's U.S. 5,9xx,028 direct-data-delivery patent, and a Dewitt/orthopedics '028 patent (issued 2016). None of these is U.S. 5,603,028.
2. A search hit containing the string "46-5603028" is a Florida LLC's FEI/EIN number (GOG MANAGER, LLC), not this patent.

So the litigation/docket portion of your request comes back negative, and I flag that as a genuine "not found" rather than a "confirmed none."

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Bibliographic summary (from the authoritative full text)

Source: https://patents.google.com/patent/US5603028/en (and mirrored at https://www.freepatentsonline.com/5603028.html)

Note on assignment history: the recorded assignments (1995-04-14 and 1996-09-12) name Kitsuregawa, Masaru and Fushimi, Shinya as assignors, with the 1996 record running to both Mitsubishi Denki K.K. and inventor Kitsuregawa. That is a recorded-ownership fact, not a legal conclusion about current title.

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Abstract (as published)

A data distribution apparatus and method for distributing data from a first group of devices to a second group of devices through a series of controlled coupling units to evenly distribute processing load associated with the data among the second group of devices. The coupling units have memory for storing values relating to an accumulated processing load of data distributed through the coupling unit. The coupling units distribute data and/or descriptive indicators representing data based on kinds of data, such as job classes, and processing loads that are previously estimated. By distributing based on processing load, a plurality of processes can be performed nearly simultaneously without excess waiting.

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Plain-language overview of the independent claims

Claim 1 — Apparatus (system-level).
Data moves from a "first group of devices" to a "second group of devices" through several coupling units. At least one coupling unit contains: (a) a data switch with multiple inputs and outputs carrying "pieces of information including descriptive indicators of data"; (b) memory that accumulates a running value representing the processing load of information of each kind that has exited that coupling unit, where that value is derived from the descriptive indicators; and (c) a control circuit that spots a load-distribution deviation and flips the switch's connection pattern to minimize it. Key point of novelty versus the parent patent: the balancing metric is estimated processing load, not a count of items. The claim expressly recites that "the processing load of at least some pieces of information of one kind is different from the processing load of other pieces of information of the same kind" — i.e., same-kind items can have different weights.

Claim 2 — Apparatus (multi-kind accumulator framing).
Similar scope, framed around plural accumulators, one per kind of data unit, and a control circuit that decides whether the distribution of processing load of "descriptive indicators representing data" is deviated and then changes connection patterns to correct it. Again, the claim recites that "the processing load of some data of one kind of data unit is different from other data of the same one kind of data unit." Practically, this is the same invention expressed in accumulator/kind language rather than switch/memory language.

Claim 3 — Method.
A three-step method performed in an apparatus whose coupling units each have a 2-input / 2-output data switch: (1) recognize the kinds of the two incoming pieces of information; (2) using the descriptive indicators, accumulate cumulative per-kind load values for information emitted on the output lines; (3) change the switch's connection pattern based on the descriptive indicators of the load of the two incoming items and on the accumulated values. The dependent claims 4–9 add that the descriptive indicators represent a job plus its associated processing load, and that the kinds are user-identified job classes each with an associated load.

Claim 10 — A coupling unit per se (component-level).
Directed to the coupling unit as an article rather than the whole system. It has: a data switch with a control input; a plurality of memories, each holding a cumulative value for one kind, the value indicating the relative distribution of that kind's total load among the switch's outputs; and a control circuit that supplies the control signal to set the connection pattern based on (i) the descriptive indicator of at least one item at an input and (ii) the cumulative value for that item's kind. Claim 11 depends on 10 and again specifies job representation plus associated load.

Practical takeaway: independent claims 1, 2, 3, and 10 all share the same inventive core — route on weighted estimated load per kind, using running per-kind accumulators to detect and cancel drift — with claim 10 covering the switch component alone.

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Litigation / 2026 CAFC docket status

• USPTO records: The patent shows Expired – Lifetime with anticipated expiration 2014-02-11, and the fee-payment record ends with the 12-year (2008) maintenance payment. No post-grant proceeding record appears in the material I retrieved; an IPR/PGR regime postdates the patent's active enforcement window in any event.
• CAFC 2026: No docket entries, opinions, or briefing referencing US 5,603,028 appeared. My searches for quoted forms "5,603,028" and "US5603028" in a litigation/docket context returned only unrelated patents sharing the "'028" shorthand and one non-patent FEI number.
• Confidence level: Moderate. Absence of a hit is not proof of absence, and I did not perform a paid docket-database (PACER/Docket Navigator) or the USPTO PatentCenter "Litigation Search" query directly. If you need a defensible negative, that should be run against PatentCenter/Patent Public Search and Docket Navigator rather than inferred from web search.

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Known uncertainties / data-quality flags

• The claim and description text surfaced by Google Patents and FreePatentsOnline shows apparent OCR/typographical garbling. The description's worked example is internally inconsistent: the memory counts are given as "2", "11", "0", and "-1," but the third/fourth entries are described in garbled terms (e.g., "the number of data of the third kind that were delivered to data output line 5 is less than those delivered to data output line 5 by seven"). Treat the numeric example as unreliable as text; the arithmetic in the claim-1 example (W = 2 − 11 = −9, V = 6, |W+V| = 3 < |W−V| = 15) is consistent, but the prose around the four memory values is not. A Certificate of Correction issued 1997-07-29, so the printed patent may differ from the web OCR version — the corrected copy from USPTO PatentCenter should be treated as authoritative for claim wording.
• Claim lengths/scope characterizations above are my plain-language paraphrase; they are not claim constructions.
• Assignee and title data are as listed by Google Patents; I did not independently verify the current chain of title with the USPTO Assignment database.

I'll research litigation involving US patent 5603028. Let me run several targeted searches.

The initial results are noise (an unrelated "302" Hayes modem patent, a Japanese soy-sauce patent numbered 5603028, a Florida FEI number). Let me search dedicated litigation databases and related identifiers.

Answer: No litigation found for US 5,603,028

Based on my searches, I found no record of any litigation (district court, CAFC, ITC, or PTAB) involving U.S. Patent No. 5,603,028. I want to be explicit about the limits of that finding and about several false positives that my searches surfaced, because the number "5603028" is heavily ambiguous across databases.

What I checked

• General web searches for the patent number in combination with "litigation," "infringement," "lawsuit," "case," and the assignee/inventor names (Mitsubishi Electric, Kitsuregawa, Fushimi).
• Searches aimed at litigation aggregators (Unified Patents litigation/PTAB caselist, CourtListener/RECAP, Docket Alarm, PTAB documents on ptacts.uspto.gov).
• The Google Patents record for US5603028A itself, which lists no litigation in its "Cited By," "Citations," or family sections — only patent and non-patent citations (a list typical of an examination record, not an assertion record).

False positives that are NOT this patent (do not auto-correct these)

• Hayes/Multi-Tech modem cases referencing a "'302 patent" (In re Hayes Microcomputer Products Patent Litigation, 766 F. Supp. 818 (N.D. Cal. 1991); C-84-6315; C-87-6029). That is a different patent (a Hayes escape-sequence modem patent), abbreviated "'302," not US 5,603,028.
• JP Patent No. 5603028 (P5603028 / JP5603028B2) — a Yamamori K.K. "dark-colored soy sauce" patent (申請番号 特願2009-143097). A Japanese number, unrelated to the US patent and a different subject matter entirely.
• Orthopaedic Hospital v. ... "the '028 Patent" (D. Del.) — a medical implant polyethylene patent, numbered differently.
• StratosAudio "the '028 patent" (U.S. 8,688,028) — W.D. Tex. automotive-media litigation. Again a different patent number.
• Random hits: a Florida LLC's FEI number (46-5603028), hospital charge codes (5603028 = Gentamicin), and a Lithuanian registry notice number.

None of these is U.S. Patent No. 5,603,028.

Context on this specific patent

• Patent: US 5,603,028, "Method and apparatus for data distribution," inventors Masaru Kitsuregawa and Shinya Fushimi, assignee Mitsubishi Electric Corp.
• Priority: 1992-03-02 (JP 4-44780); filed: 1995-01-31 as a continuation-in-part of Ser. No. 08/024,188 (now US 5,396,628); granted: 1997-02-11.
• Status: Expired – Lifetime; anticipated expiration 2014-02-11 (per the Google Patents record).
• Its family also includes US 5,396,628 ("Method of and apparatus for data distribution of processing load") and the earlier US 5,237,683 (Kitsuregawa) cited as prior art.

Given its 1997 grant date and 2014 expiration, and that my searches found no assertion activity, the most likely conclusion is that this patent was never litigated — it appears to be an academic/industrial data-distribution (parallel database/bucket-distribution) patent that expired without enforcement.

Caveats

• I could not fully query subscription litigation databases (e.g., Docket Navigator, Lex Machina) or the complete PACER docket universe; my conclusions rely on open-web and open-court sources.
• Because "5603028" collides with many unrelated identifiers, a definitive "no litigation ever" statement would require a native search by patent number in a litigation database. Based on the public sources available, the answer is that no litigation is known.

I'll verify the structured block's "no proceedings" default against public sources before writing.

Let me run a couple more targeted checks before concluding.

Proceedings overview

Total AIA trial proceedings on file for US 5,603,028: 0. The USPTO Open Data Portal returns no IPR, PGR, or CBM proceedings, and targeted web searches (Google Patents, PTAB docket aggregators, CourtListener, and general queries on both the patent number formats "5603028" and "5,603,028") surface no petition, institution decision, Final Written Decision, or appeal for this patent — so the breakdown is 0 active / 0 claims invalidated / 0 claims sustained / 0 settled / 0 institution denials. The bottom-line defensive posture is unusual and much stronger than any IPR outcome: the patent is expired, so there is no live assertion to defend — it cannot be infringed prospectively and any past-damages window is long closed (§ 286's six-year lookback from a 2026 complaint reaches back only to 2020). The absence of PTAB activity here is explained by the calendar, not by the patent being weak; claims 1–11 issue untested by any AIA trial.

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No proceedings to itemize

Because the structured block is the canonical list and it is empty, I am not fabricating a proceeding template. For completeness, here is what the null result does and does not mean:

• The AIA window for this patent was narrow. AIA trials became available 2012-09-16. US 5,603,028's term ran from grant on 1997-02-11 to expiration on 2014-02-11 (17 years from grant, the patent having been in force on 1995-06-08). That is roughly a 17-month window in which a CBM or IPR petition could realistically have been filed against a patent that was still assertable. Nothing was filed in that window.
• Expiry did not legally foreclose IPR. An expired patent remains eligible for inter partes review (the Federal Circuit confirmed in Sony Corp. v. Collabo Innovations that IPRs may proceed on expired patents; the Board commonly addresses post-expiration claim construction). So the lack of proceedings is not a legal bar — it is an absence of economic motive. By the time AIA trials came online this patent was in its final 18 months, and after 2014-02-11 it had no injunctive or prospective-royalty value to anyone.
• A certificate of correction did issue on 1997-07-29. I have not verified its contents; if you are relying on the printed claim text for a validity analysis, pull the certificate to confirm the claim language of record. I am not asserting that it changed claim scope.

Related family (context, not proceedings on this patent): the parent is US 5,396,628 (Ser. No. 08/024,188, filed 1993-02-26), and the family also includes US 5,237,683 (Kitsuregawa) and JP 3289939B2 / EP 0559100B1. None of the searches returned AIA trials on those either, but I did not verify them claim-by-claim and would not represent that as a complete family-wide PTAB search.

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Strategic summary

Claim status. Every claim of US 5,603,028 — independent claims 1, 2, 3, and 10, and dependent claims 4, 5, 6, 7, 8, 9, and 11 — is UNTESTED in any AIA trial. None is canceled; none has been adjudicated patentable by the Board. The claims effectively cannot be cancelled-in-part as to validity moving forward because the patent expired 2014-02-11, though an IPR is still technically available. Practically speaking the entire claim set is now academic: no claim can support prospective relief.

Estoppel landscape. Because no IPR, PGR, or CBM was ever filed by anyone, § 315(e)(2) estoppel does not exist against any party with respect to this patent. Every prior-art ground — §§ 102, 103, 112 — remains formally available in any litigation that somehow reopens. That is the mirror image of the usual situation: the patent is not "hardened" by surviving IPRs; it is simply unassailable in practice by reason of expiry rather than by reason of Board validation. If a demand letter cites US 5,603,028 today, the correct response is a term/expiry defense, not an invalidity defense — running an IPR would cost several hundred thousand dollars to attack a patent that cannot be infringed prospectively.

Pattern signals. There is no repeat-petitioner pattern because there is no petitioner at all — no Unified Patents or other defensive aggregator involvement, no patent-owner PTAB appeal history, no settlement term sheet. The only recurring pattern worth noting runs the other direction: the '028 disclosure is being used as prior art against others. USPTO Art Unit 2165 rejected claims 1–5 of an unrelated application as obvious over Kitsuregawa et al. (U.S. 5,603,028) in view of Pian (U.S. 5,357,632), and U.S. 5,603,028 is listed as a cited reference on later load-balancing patents including the Corigin/Clearspeed family (e.g., US 7,917,727 and US 7,257,582). In other words, the '028 specification is broad enough to be § 103 art against modern distributed-load-balancing filings — useful context if you are defending a different patent and want to check whether this reference was already on the examiner's list.

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Recommended next steps

• If you are a defendant / recipient of a demand: confirm the expiration date directly against the patent's term calculation and the USPTO Patent Center record (https://patents.google.com/patent/[US5603028A](/patent/US5603028A)/en shows "Anticipated expiration 2014-02-11" and status "Expired - Lifetime"). Then respond on the merits of expiry: no prospective infringement, no injunction, no ITC exclusion order, and past damages capped by § 286 at six years before the complaint — which as of 2026 reaches back only to 2020, well after expiry. Do not spend IPR money on a dead patent.
• If your interest is defensive prior art: the file history is at https://patents.google.com/patent/US5603028A/en and the granted PDF (with figures and the 1997-07-29 certificate of correction) at https://patentimages.storage.googleapis.com/59/05/31/351828d8ec33ab/US5603028.pdf. The prosecution office action using '028 as § 103 art appears in the record of Intellectual Ventures I LLC v. Southwest Airlines Co., W.D. Tex. No. 7:24-cv-00277, Ex. C (CourtListener docket: https://www.courtlistener.com/docket/69338885/).
• If you want a belt-and-suspenders verification: the Board's docket portal is PTAB E2E (https://ptacts.uspto.gov/) and the USPTO Patent Trial and Appeal Board Decisions page. I could not locate a proceeding there for this patent, consistent with the ODP result. If a petition surfaces that the ODP has not yet ingested, it would most likely be an IPR against the expired patent; check the institution-date-to-FWD clock (statutory 12-month deadline under § 316(a)(11)) rather than assuming the ordinary 18-month schedule.

Confidence note: I am highly confident in the null result for AIA trials and in the expiration date as reflected in the Google Patents structured data. I have not independently verified the contents of the 1997-07-29 certificate of correction, and I have not run a claim-by-claim PTAB search on the sibling patents (US 5,396,628; US 5,237,683; JP 3289939B2; EP 0559100B1). I have not invented any proceeding numbers, and there are none to report.

I'll research the assignment record for US 5,603,028 before writing up the chain.

Let me try to confirm the reel/frame records and check the parent patent's chain for comparison.

Let me check the parent patent's assignment records and whether any later transfers exist.

Ownership-chain reconstruction — US 5,603,028

Source note / evidence limitation (read first). The reel/frame entries below are drawn from the legal-events block of the Google Patents record for US5603028A (https://patents.google.com/patent/US5603028A/en), which mirrors the USPTO assignment data. My live searches did not return a directly retrieved Assignment Center record, so I could not capture the correspondent of record (the filing attorney/agent) for either recording. I am not going to invent those names. Where a field is unavailable I say so explicitly. Verify at https://assignmentcenter.uspto.gov/ (search by patent number 5603028) or https://assignment.uspto.gov/patent/index.html.

Inventors

Unusual pattern — worth flagging. This is a joint industry–academia invention, and the record reflects it: the second recorded assignment (below) names Kitsuregawa himself as a co-owner alongside Mitsubishi Electric. That is not a departure-of-inventors signal (no evidence either inventor left within 12 months of filing), but it does mean the patent was co-owned by an individual and a corporation, not solely by the assignee. Google Patents nonetheless lists "Current Assignee" as Mitsubishi Electric Corp only — a small inconsistency I could not resolve from the available records.

Prosecution-structure note (relevant to scope, not ownership). US 5,603,028 is a continuation-in-part of Ser. No. 08/024,188 (filed 1993-02-26, now US 5,396,628), while claiming foreign priority to JP 4-44780 (1992-03-02). Because it is a CIP, any claim language first supported only in the 1995-01-31 disclosure does not get the 1992 priority date. No contradiction with the prior litigation section, which reported the same dates.

Original assignee

Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation), 2-3 Marunouchi 2-chome, Chiyoda-ku, Tokyo — the entity named on the issued patent.

• Line of business: electrical and electronic equipment, semiconductors, industrial/energy systems, information systems — a large, diversified, currently-operating Japanese corporation.
• Current status: operating. It was not acquired, dissolved, or in bankruptcy. There is no Chapter 7/11 event in this chain.
• Product embodying the claims: unclear / no evidence found. The claims cover a hardware coupling-unit architecture (a two-input/two-output data switch driven by per-kind load accumulators) for bucket distribution in parallel database machines. Mitsubishi Electric did parallel-database research, but I found no evidence of a commercialized product reading on these claims. I am flagging this as unresolved rather than asserting either way.

The patent ran its full term: maintenance fees were paid at the 4-, 8-, and 12-year intervals (2000-07-31, 2004-07-07, 2008-08-06) and it reached anticipated expiration 2014-02-11. That fee history is itself evidence against abandonment or a fire-sale.

Assignment timeline

Two recorded assignments exist. There are no security agreements, mergers, changes of name, licenses, releases, or corrections after 1996 in the record.

• 1995-03-31 (executed) / recorded 1995-04-14 — Reel 007493/0347

  • Conveyance: Assignment
  • Assignor: Masaru Kitsuregawa; Shinya Fushimi (both inventors, jointly)
  • Assignee: Mitsubishi Denki Kabushiki Kaisha
  • Correspondent: not retrievable from the sources I accessed — the Google Patents legal-events mirror does not carry the recording correspondent, and my Assignment Center queries did not return. Cannot assess recurrence. (Flag left open, not filled by inference.)
  • Context: Initial/confirmatory assignment of the inventors' rights to the corporate assignee — a standard employment/engagement assignment, executed ~2 months after the CIP filing.

• 1995-03-31 (executed) / recorded 1996-09-12 — Reel 008134/0832

  • Conveyance: Assignment
  • Assignor: Masaru Kitsuregawa; Shinya Fushimi (both inventors, jointly)
  • Assignee: Mitsubishi Denki Kabushiki Kaisha and Kitsuregawa, Masaru (the record carries two owner entries under this reel: "MITSUBISHI DENKI KABUSHIKI KAISHA, JAPAN" and "KITSUREGAWA, MASARU, JAPAN")
  • Correspondent: not retrievable — same limitation as above.
  • Context: Confirmatory assignment establishing co-ownership — same execution date as the first recording but recorded ~17 months later, indicating a re-recording to name the individual inventor as a co-owner. Not an acquisition, not a fire-sale, not an internal reorg.

If the Assignment Center shows no further records, that is the finding: the chain never left the original assignee (plus the individual co-owner). I found no record of any post-issuance assignment of US 5,603,028.

Timeline diagram

timeline
    title Ownership of US 5603028
    1993 : Parent application filed Feb 26
    1995 : Inventors assign rights to Mitsubishi Electric
         : Recorded Apr 14 Reel 007493 0347
    1996 : Co-ownership assignment recorded Sep 12
         : Reel 008134 0832 names Kitsuregawa owner
    1997 : Patent granted Feb 11
    2014 : Anticipated expiration Feb 11

NPE / troll-pattern signals

1. Shell-entity transfer — not present. No transfer to an "IP / Patents / Licensing / Holdings / Ventures" entity. Both recordings (Reel 007493/0347, Reel 008134/0832) run toward the operating company and an individual co-owner, never to an LLC. No single-purpose Delaware/Texas vehicle appears.

2. Known asserter in the chain — not present. Neither Mitsubishi Denki Kabushiki Kaisha nor Masaru Kitsuregawa matches any public NPE roster (Acacia, Marathon, IV, IPNav, Wi-LAN, Conversant/Mosaid, Vringo, Pendrell, Innovatio, MPHJ, Lumen View, Round Rock, DGC, Spangenberg entities). No entity surfaced by Unified Patents or RPX appears anywhere in these two records.

3. Repeat correspondent across the chain — unclear / not assessable. This is the one signal I could not test: the recording attorney/agent for Reels 007493/0347 and 008134/0832 is not exposed in the sources I retrieved. I will not guess a firm name. If you can pull the two records in Assignment Center, this is the highest-value check remaining — a repeat correspondent across this chain plus other expired Mitsubishi portfolio patents would be the tell.

4. Cascading transfers — not present. Only two recordings, both with execution date 1995-03-31. No <24-month LLC-to-LLC chain, no shared-principal assignees.

5. Pre-litigation transfer — not present. Consistent with the prior litigation section: no infringement suit naming this patent was found. The last recordation is 1996-09-12, roughly 17.5 years before expiration and long before any conceivable assertion window; there is no 6-month-before-suit transfer.

6. Bankruptcy fire-sale — not present. Assignee Mitsubishi Electric is an operating going concern with no bankruptcy event. The full maintenance-fee history (4/8/12-year payments through 2008-08-06) and full-term expiry confirm the patent was held to term, not liquidated.

7. Privateering — not present. No transfer to an NPE asserting on Mitsubishi Electric's behalf; no SEC-filing or Patent Progress/EFF coverage surfaced.

8. Defensive aggregator (anti-NPE) — not present. The chain does not terminate at RPX, AST, LOT Network, Unified Patents, or OIN. It terminates at the original assignee/co-owner.

Ambiguous item, not a signal: the individual co-ownership by Kitsuregawa (Reel 008134/0832) matters for standing and joinder in any hypothetical assertion (an individual co-owner would have to be joined), but it is not an NPE indicator and I am not counting it as one.

Verdict

Insufficient data — but the substantive finding is negative for any NPE pattern.

Justification: The entire recorded chain consists of two assignments, Reel 007493/0347 (recorded 1995-04-14) and Reel 008134/0832 (recorded 1996-09-12), both effective 1995-03-31, both flowing from the same two inventors to Mitsubishi Denki Kabushiki Kaisha — with the second merely adding inventor Kitsuregawa as a co-owner. There is no post-issuance transfer of any kind, no shell entity, no known asserter, no cascading LLC chain, no bankruptcy, and no defensive-aggregator endpoint. The patent expired 2014-02-11 after all three maintenance fees were paid. Under the fixed choice set, "operating-company assertion" is not met (no evidence the assignee shipped a product reading on the claims, and no competitor suit exists), and no NPE branch is met — so the honest label is Insufficient data, driven by only-the-original-assignment rather than by any suspicious activity. The one unresolved gap is the recording correspondent for the two reels, which I could not retrieve; that is the only check that could change this conclusion.

Verify: https://assignmentcenter.uspto.gov/ (patent number 5603028) · https://assignment.uspto.gov/patent/index.html

I'll verify the citation details for each reference before writing the analysis.

Now let me verify the remaining cited references.

Prior-Art Analysis — U.S. Patent No. 5,603,028

"Method and apparatus for data distribution" · Kitsuregawa & Fushimi · Mitsubishi Denki K.K. · App. 08/381,524 filed 1995‑01‑31 · granted 1997‑02‑11 · earliest priority 1992‑03‑02 (JP 4‑44780) · CIP of Ser. No. 08/024,188 (US 5,396,628) · expired 2014‑02‑11.

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Scope, and one important framing caveat

Everything below is built on the prior-art citation table printed on the face of US 5,603,028 as reproduced in the authoritative full text you supplied (Google Patents mirror of the printed patent at https://patents.google.com/patent/US5603028/en). That table is an examination record, not an invalidity opinion. Three things follow, and they govern how the § 102 question should be answered:

1. A reference listed as "cited by examiner" is not necessarily § 102 art, and most of these are not. The overwhelming majority of this list is classified "A" (background) or went only to obviousness. The listing tells you what the examiner looked at; it does not tell you the examiner found anticipation.
2. This patent issued with a Certificate of Correction dated 1997‑07‑29 (confirmed in the legal-events block). I have not verified its contents. For any claim chart you intend to rely on, pull the corrected copy from USPTO PatentCenter — the web OCR claim text is authoritative only provisionally.
3. Data-quality flag on the citation list itself. The Google Patents record shows two different citation lists for this patent — a "Citations (9)" list and a "Patent Citations (10)" list. The 10‑item list adds US 4,621,359 A (Hughes, Load balancing for packet switching nodes), which the 9‑item list omits. I treat the 10‑item list as the operative set and flag the discrepancy rather than silently reconciling it. A US 4,621,359 / WO 86/02511 pair is also exactly what one would expect to see (same applicant, same subject matter, WO counterpart of the US grant), so the 10‑item version is the more plausible record.

Also note the prior-art date this analysis runs against. Because '028 is a continuation-in-part, claim subject matter first supported only in the 1995‑01‑31 disclosure (i.e., the weighted-load limitations) is not entitled to the 1992‑03‑02 Japanese priority date and gets a 1995‑01‑31 effective filing date; anything traced to the parent gets 1993‑02‑26/1992‑03‑02. Pre‑AIA 35 U.S.C. §§ 102(a)/(b)/(e) applies throughout (application filed before 2013‑03‑16). All ten references below pre-date 1994‑01‑31 and therefore clear the pre‑AIA § 102(b) one-year bar regardless of which date controls. The prior-art-date question does not change any conclusion here — it only matters if you later try to swear behind a reference under § 1.131 or rely on the 1992 date against a 1992–1994 reference.

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The ten cited references at a glance

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Reference-by-reference analysis

1. US 3,732,548 A — Howells et al., "Switching center for a data network"

• Full citation: U.S. Patent 3,732,548, Switching center for a data network, Int'l Standard Electric Corp., filed 1970‑08‑20, issued 1973‑05‑08.
• Description (verified): A switching center (DSC) for a synchronous digital network that works in either circuit-switching or packet-switching mode. It uses a first store with a dedicated location per terminal (holding a "forwarding address" pointer) and a second store with dynamically allocated blocks for assembling address and data characters. Characters are inserted into the store location specified by the pointer held for the incoming channel, and a processor allocates call buffers and rewrites forwarding addresses.
• § 102 assessment: Anticipates no claim. It discloses a switch and a store, which superficially touches the "data switch" and "memory" words of claim 1, but it is silent on (a) distributing information between device groups to equalize load, (b) accumulating any value per kind, and (c) the concept of processing load at all. There is no "kind of information," no descriptive indicator of load, and no deviation-minimizing control. This is a § 102(a)/(b) reference that is prior art but non-invalidating on its face. It is examiner background art (a pre-1973 switching fabric), not a § 102 hit.

2. US 4,482,996 A — Wilson et al., "Five port module as a node in an asynchronous speed independent network of concurrent processors"

• Full citation: U.S. Patent 4,482,996, Burroughs Corp., filed 1982‑09‑02, issued 1984‑11‑13. (Family: EP 0104801/0104796, JP S59‑501608/501609; related U.S. 4,484,325.)
• Description (verified): A five-port node for an asynchronous, speed-independent network of concurrent processors. Each port has a four-way input selector switch and a four-way output arbiter switch; a selector picks an output channel according to the initial bits of the message (a routing field consumed as the message traverses the network), and a CLEAR signal resets a path if nodal blocking occurs. Up to five simultaneous message transmissions are supported without nodal blocking.
• § 102 assessment: Anticipates no claim. This is a routing-fabric reference. The "connection pattern" is selected by address bits in the packet header, not by any accumulated measure of load or of kinds. There is no memory of cumulative values, no kind recognition, no deviation detection, and no defined "processing load." Relevant to claims 1/10 only as illustration that a switch configurable into plural connection patterns was old. Background art at most.

3. JP S61‑83392 A — listed as "Improved pressure type screen"

• Full citation (as printed): Japanese Unexamined Patent Application S61‑83392 A, applicant 相川鉄工株式会社 (Aikawa Tekkō K.K.), filing 1984‑09‑03, publication 1986‑04‑26, listed on the face of '028 under the title "Improved pressure type screen."
• Description: A pressure-type screen (a mechanical screening/separating device). On its face this has nothing to do with data distribution.
• § 102 assessment: Cannot anticipate any claim — no overlap in subject matter whatsoever. I am not auto-correcting this citation and I am not substituting a different document: I report it literally as the record presents it. However, I flag it as an anomaly you should resolve at source. Two mutually exclusive explanations exist and I cannot distinguish them from the material available: (i) the machine-readable citation data for this entry is corrupted/mismatched (the JP number, title, and applicant do not cohere), or (ii) the examiner cited it for a genuinely narrow mechanical point (e.g., a sorting/screening analogy) that does not survive inspection. Recommendation: pull the printed front page or the corrected patent and read the citation list directly; if the printed entry differs from the web OCR, the printed entry controls.

4. WO 86/02511 A1 — Hughes Aircraft, "Load balancing for packet switching nodes"

• Full citation: International Application WO 86/02511 A1, Load balancing for packet switching nodes, Hughes Aircraft Co., filing (priority) 1984‑10‑18, published 1986‑04‑24.
• Description (verified from the EPO search-report excerpt for the family): A load-balancing arrangement for a packet switching node. The node routes applied data packets carrying routing-tag signals; a load-balancing circuit monitors the output-port addresses of applied packets and generates new routing-tag signals that redistribute output-port load. The purpose is to stop a source processor from repeatedly steering all traffic to one output port while other execution units sit idle.
• § 102 assessment: Anticipates no claim — but it is the most important "load balancing" reference on the face of the patent. What it balances is the count/destination distribution of packets across output ports, not a weighted, previously-estimated processing load per kind of information. There is no per-kind accumulator, no "descriptive indicator" carrying an estimated load value, and no comparison of two incoming items' kinds. Critically, it cannot meet claim 1's express recitation that "the processing load of at least some pieces of information of one kind is different from the processing load of other pieces of information of the same kind" — the Hughes scheme treats packets as fungible units. This reference is properly § 103 art, not § 102 art. Note also that the EPO examiner cited precisely this document (category "A") against claims 1–3 of the corresponding EP application (see the Documents considered to be relevant table in EP 0426990's search report, page 5 line 12–page 8 line 11 and figures 5–6) — i.e., Europe treated it as background, not as anticipating.

5. US 4,621,359 A — McMillen, "Load balancing for packet switching nodes" (Hughes)

• Full citation: U.S. Patent 4,621,359, McMillen, Hughes Aircraft Co., filed 1984‑10‑18, issued 1986‑11‑04. (US counterpart/stable-claim version of WO 86/02511, #4 above.)
• Description (verified): Same disclosure as #4, in the form found in the US grant. The load-balancing circuit arrangement "monitors the output port addresses of the applied data packets" and comprises logic that, with the switching node, redistributes output-port load so that output ports (and the execution units attached to them) are not idled. The node itself is an N×M packet switch with queue selectors, queue sets, and output arbitrators that "randomly, in a statistical sense" arbitrate among packets contending for the same output port. The background expressly frames the problem as one where "the remaining output ports are not used, and the execution units connected thereto are not used."
• § 102 assessment: Anticipates no claim. Identical analysis to #4: it is destination-count redistribution in a packet switch, with no per-kind weighted load and no cumulative per-kind store. Note the internal discrepancy flagged above — this document appears in the 10‑item "Patent Citations" list but not in the 9‑item "Citations" list. If you are building a file-history narrative, use the 10‑item list.

6. JP S62‑54350 A — NEC Corp., "Switching device"

• Full citation (as printed): Japanese Unexamined Patent Application S62‑54350 A, NEC Corp., filing 1985‑01‑24, publication 1987‑03‑10, title "Switching device."
• Description: Title indicates a switching device. I could not verify the disclosure text — my retrieval attempts on this specific JP publication returned no substantive content, and I will not characterize its specification from the title alone.
• § 102 assessment: Indeterminate; on the record available, no anticipation of claims 1, 2, 3, or 10. The title discloses nothing about per-kind accumulators, weighted processing load, or deviation-driven connection-pattern changes, so there is no basis in the record for a § 102 mapping. Treat as background art pending retrieval of the JP text (JPO J‑PlatPat / Espacenet JP full-text).

7. JP S62‑21398 A — Matsushita, "Distributor of data"

• Full citation (as printed): Japanese Unexamined Patent Application S62‑21398 A, Matsushita Electric Industrial Co., Ltd., filing 1985‑07‑19, publication 1987‑01‑29, title "Distributor of data."
• Description: Title indicates a data distributor. I could not verify the disclosure text, and — consistent with the strict no-auto-correction rule — I am not assuming this is the same document as the "Distributor of data" reference appearing in other records. One genuinely useful cross-check that did surface: the EPO search report for the parent family (EP 0426990) cites "PATENT ABSTRACTS OF JAPAN vol. 11, no. 62 (P‑551), February 25, 1987 & JP‑A‑61‑224‑046 (NEC), October 4, 1986" and separately lists in the same record a Patent Abstracts of Japan, vol. 11, no. 62, Feb. 25, 1987, "Parallel Logic Simulation Device" as a non-patent citation of '028. The co-occurrence of the same PAJ volume/issue/number in both places, attached to two different document titles, is a flag on the citation data, not a finding about the underlying art. Do not treat the "Distributor of data" and "Parallel Logic Simulation Device" labels as interchangeable.
• § 102 assessment: Indeterminate; no anticipation supportable on the available record. A "data distributor" of 1985 vintage could plausibly be relevant background to the distribution half of claims 1/3, but nothing in the verified record supports a § 102 mapping to the weighted-per-kind-load limitations.

8. US 5,155,851 A — Gün, "Routing an incoming data stream to parallel processing stations"

• Full citation: U.S. Patent 5,155,851, Bell Communications Research, Inc., filed 1989‑05‑15, issued 1992‑10‑13.
• Description (verified in detail): A state-dependent routing method for sending an arriving job stream through a data switch to one of N parallel, autonomous processing stations, each with its own service rate and finite buffer queue. A front-end processor computes occupancy factors Δ(i,kᵢ) from station configuration (servers sᵢ, service rate μᵢ, waiting positions mᵢ) and arrival statistics, then at each job arrival computes a utilization value for each station from the current queue state (k₁,…,k_N) and the stored occupancy factors, and routes the job to the station with the smallest utilization value below a threshold (otherwise blocking). Claim 1 recites configuring each station with a buffer queue, generating and storing allocation load factors, measuring current processing status, executing mathematical forecasting formulae to generate occupancy factors, generating utilization values, and "establishing a connection route for the offered data job through the switch means… based on said utilization values."
• § 102 assessment: Anticipates no claim of '028 — but this is the closest routing reference and the strongest § 103 partner. Why it fails § 102:
  • The routing metric is queue occupancy/service-rate utilization (a congestion/blocking measure), not a previously-estimated processing load attached to the information as a descriptive indicator. Claim 1 requires the cumulative value be "determined based on characteristics of the descriptive indicators of the data"; claim 10 requires each piece of information to "includ[e] a descriptive indicator having a value that indicates a processing load associated with the piece of information." Bellcore has nothing of the kind — no per-item load field, no estimate supplied by an external system (the '028 job-class/estimated-execution-time model).
  • It has no "kind"-partitioned accumulator and does not partition information into kinds at all. Claim 2 requires "a plurality of accumulators respectively corresponding to a plurality of different kinds of data units"; claim 10 requires "a plurality of memories, each… storing a cumulative value for one of the plurality of kinds."
  • Its control is a central front-end processor computing utilization values, not a coupling unit whose control circuit changes a connection pattern to minimize load deviation across its own two outputs.
  • It does not recite the '028 distinguishing feature that same-kind items can have different processing loads.
  • BUT it is squarely § 103 material, and its "statistical/random assignment [Bernoulli splitting] vs. state-dependent assignment" framing is close in spirit to the '028's 2×2 routing decision. A competent examiner or litigator would combine this with US 5,237,683 for motives to modify. Category: high-value § 103 art; zero § 102 value.

9. US 5,237,683 A — Kitsuregawa, "Method and apparatus for data distribution" — the single most relevant reference

• Full citation: U.S. Patent 5,237,683, Method and apparatus for data distribution, inventor Masaru Kitsuregawa (i.e., the same inventor as '028), filed 1989‑11‑06, issued 1993‑08‑17. Foreign counterpart: EP 0426990 A2 (pub. 1991‑05‑15; priority JP 288465/89, 1989‑11‑06); also JP 3289939B2 lineage in the '028 family.
• Description (verified in detail): This is the direct antecedent of the '028 coupling unit. A data distributing apparatus has coupling units arranged in a matrix ((N/2)×log₂N) between a first memory group and a second memory group. Each coupling unit has two data input lines, two data output lines, a switch with exactly two connection patterns (parallel and cross), a group of counters, one per kind of data, and a control circuit. Before distribution the counters are zeroed. When data of kind X leaves output line 4 the X‑th counter increments by 1; when it leaves output line 5 the X‑th counter decrements by 1. The control circuit reads the kinds of the two incoming data items, takes the difference of the corresponding counters, and selects the parallel or cross pattern so as to correct any deviation — if the difference is positive or zero, in 2→4/3→5; otherwise 2→5/3→4. The stated object is that each memory in the second group holds Nx/K data of each kind X at completion. (The same disclosure appears in EP 0426990 with the same "counter group counts and stores a cumulative number of data or work units… for each kind" language.)
• § 102 assessment — the crux of the whole file:
  • What it anticipates: the architectural skeleton of every independent claim — plural coupling units between two device groups; a data switch with two inputs and two outputs; per-kind storage; a control circuit that recognizes kinds of the two incoming items, judges deviation in the distribution, and changes the connection pattern (parallel/cross) to correct it. On claim 3's first and third steps ("recognizing the kinds of said two pieces of information"; "changing a connection pattern in said data switch…based on said cumulative values"), US 5,237,683 is a direct textual match and is prior art under pre-AIA § 102(b) (issued 1993‑08‑17, more than one year before the 1995‑01‑31 CIP filing).
  • What it does not disclose — and why it therefore does not anticipate: the '028 claims are distinguishable only by the weighted processing-load dimension. US 5,237,683's accumulators hold counts of items; its "weight" for every item is implicitly 1. Every independent claim of '028 recites the weighted feature, and the specification makes it the stated point of novelty over this very reference ("the processing loads will not be equal…It was also a problem…"). Specifically:
    • Claim 1 requires the memory means be "for accumulating and storing a cumulative value indicative of the processing load…determined based on characteristics of the descriptive indicators of the data." Counts of items are not processing load, and US 5,237,683 has no descriptive indicator of load.
    • Claim 2 requires "a cumulative value for a processing load of each kind of data unit." Same defect.
    • Claim 3 step two requires "using the descriptive indicators of data, accumulating and storing cumulative values of the processing load for each of the pieces of information outputted…for each kind." Same defect — the reference accumulates the number of pieces, not their load.
    • Claim 10 requires each memory's cumulative value to "indicat[e] relative distribution of the total processing load of the one of the plurality of kinds," and the information to include "a descriptive indicator having a value that indicates a processing load associated with the piece of information." Same defect.
  • The honest bottom line for this reference: it is the most relevant prior art and the primary § 103 base, not a § 102 anticipation. The only way it becomes a § 102 reference is if a tribunal construes "cumulative value indicative of the processing load" so broadly as to read on a count of items — i.e., treats item count as one available proxy for load. That construction is available to a defendant (and the specification's own description of the prior art arguably invites it, since the patent frames the invention as substituting weighted load for counts), but it is a § 102 argument to make, not a § 102 conclusion I can state. Under the plain language, with "processing load" and "descriptive indicators" as separate, load-bearing limitations, counts do not anticipate.
  • I want to be explicit about one thing: it is not a coincidence that this reference shares an inventor with '028. US 5,237,683 is Kitsuregawa's own earlier, count-based patent, and the '028 CIP exists because the count-based scheme did not equalize processing time. The prosecution strategy is legible from the face of the patent.

10. US 5,212,793 A — IBM, "Generic initiators"

• Full citation: U.S. Patent 5,212,793, Generic initiators, International Business Machines Corp., filed 1991‑09‑04, issued 1993‑05‑18.
• Description: Title indicates an abstraction for "initiators" (initiating entities/requests in a computer or bus/protocol architecture). I could not verify the disclosure text during this analysis, and I will not infer its content from the title.
• § 102 assessment: Indeterminate; no anticipation supportable on the record. Nothing in the available material connects this document to per-kind load accumulators, weighted estimated processing load, or deviation-minimizing switch control. Its date (1991‑09‑04) would place it as § 102(a) art if it contained the limitations, but there is no basis to assert that it does.

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Non-patent prior art (the four NPL entries of record)

The '028 record also lists non-patent citations, which for § 102/§ 103 purposes are printed publications and are often the stronger art in this field:

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Overall § 102 / § 103 picture

No reference of record anticipates any claim of US 5,603,028 on the language of the claims.

The reasoning is uniform across all ten references, and it is worth stating once cleanly. Every independent claim (1, 2, 3, 10) and every dependent claim (4–9, 11) requires, at minimum, two things:

• (A) a per-kind cumulative store of distributed quantities (claims 1, 2, 10) or per-kind accumulation step (claim 3); and
• (B) the accumulated quantity must be a processing load, i.e., a weighted, previously-estimated value carried by a "descriptive indicator" of the information — not an item count and not a queue-occupancy measure.

The cited art splits cleanly along that line, and nothing on the list has both:

• References with (A) but not (B): US 5,237,683 (per-kind counters — but counts, not loads) and, to a lesser degree, JP S62‑21398 A ("Distributor of data," unverified). This is the closest art.
• References with a load/balancing notion but neither (A) nor (B) as claimed: WO 86/02511 A1 / US 4,621,359 A (packet-output-port count redistribution) and US 5,155,851 A (queue-utilization-based routing of jobs to stations). These are § 103 art — real, citable, and dangerous in combination, but each fails at least three limitations standing alone.
• Merely structural/background references: US 3,732,548 (switching center), US 4,482,996 (async network node), US 5,212,793 (generic initiators, unverified), the Ahmadi and PAJ NPL entries.
• Apparently mis-cited / off-subject: JP S61‑83392 A ("Improved pressure type screen") — flagged, not corrected.

The strongest invalidity theory available on this record is § 103, not § 102: US 5,237,683 (Kitsuregawa) in view of US 5,155,851 (Bellcore) — i.e., take the '028 coupling-unit/kind-distribution architecture from the inventor's own prior patent, and substitute or supplement the item counters with a state/load-based routing metric as taught by Bellcore (or by the Hughes pair). That is precisely the kind of combination an examiner would reach for, and it is materially the same combination that the patent itself describes as the prior art it improves upon. Whether it would succeed turns on (i) motivation to combine, and (ii) whether the § 103 reference teaches per-kind weighted (as opposed to per-station aggregate) load accounting — which Bellcore does not do, because Bellcore has no "kinds" at all. I would not predict an obviousness rejection with confidence on this record; I would predict that a defendant would plead it.

One factual observation worth carrying forward: the '028 disclosure is itself being used as § 103 art against later filings (it appears as a cited reference on later load-balancing patents, e.g., in the Corigin/Clearspeed family — US 7,257,582 and US 7,917,727 — per the "Cited By" lists), and it is cited in the examination of at least one unrelated application. That is a forward-citation fact. The seven documents in the "Cited By" block of the Google Patents record are not prior art to '028 — they all post-date its 1992 priority — and none of them should appear in any invalidity chart for this patent. They are relevant only if you are analyzing those patents.

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Where I am uncertain (stated plainly, per instruction)

1. US 5,212,793 ("Generic initiators," IBM) and JP S62‑54350 A ("Switching device," NEC) — I could not verify the disclosure text. My "no anticipation supportable on the record" conclusions for these two rest on the recorded titles and the absence of any indication of weighted-per-kind load teaching. They are not affirmative findings that the references are irrelevant; they are findings that the available evidence does not support a § 102 mapping. If you need a defensible chart, retrieve the full texts (JPO J‑PlatPat / Espacenet for the JP; USPTO Patent Public Search for the US).
2. JP S62‑21398 A ("Distributor of data") — same limitation, plus the citation-data anomaly noted in the analysis and in the NPL table (the recurring "PAJ vol. 11, no. 62" string attached to inconsistent titles).
3. JP S61‑83392 A ("Improved pressure type screen") — flagged as a probable citation-data defect. I have deliberately not substituted any other document for it.
4. The 9‑item vs. 10‑item citation-list discrepancy (US 4,621,359 present in one, absent in the other) is unreconciled. I used the 10‑item list.
5. The 1997‑07‑29 Certificate of Correction is unverified. Every claim-limitation analysis above is run against the web OCR claim text. Pull the corrected copy before relying on any of it — https://patents.google.com/patent/[US5603028A](/patent/US5603028A)/en (granted PDF with figures) and USPTO PatentCenter (litigation/assignment/patent-record search) for the corrected grant.
6. No prior-art search was performed beyond the citations of record. The instruction was to examine each citation on the face of the patent. I have not run an independent novelty search for uncited art — which, given that the primary reference is the inventor's own earlier patent, is where the genuinely interesting uncited art (the GRACE/GRACE-derived literature, the Japanese relational-algebra-machine literature, and the 1988–1991 parallel-database bucket-distribution papers) is most likely to live. If you want a validity opinion rather than a citation review, that search is the necessary next step.

Confidence note: High confidence in the citation identities, dates, and the descriptions of US 5,237,683, US 5,155,851, WO 86/02511, US 4,621,359, US 3,732,548, and US 4,482,996 (each verified against primary or near-primary sources during this analysis). Low-to-zero confidence in the substance of US 5,212,793, JP S62‑54350 A, JP S62‑21398 A, and JP S61‑83392 A, for the reasons stated. No claim number, date, or identifier has been auto-corrected anywhere in this analysis.

I'll ground this obviousness analysis in the patent's own cited prior art. Let me verify the key references before building the combinations.

Let me verify two more cited references that matter for the job-class and routing limitations.

Obviousness Analysis under 35 U.S.C. § 103 — US 5,603,028

Building on the prior sections: This analysis assumes the claim set (11 claims; independents 1, 2, 3, 10) and the prosecution posture already described. Two facts from those sections drive everything below and I flag them again here because they are dispositive of which references are even available:

1. The '028 is a CIP of US 08/024,188 (filed 1993-02-26, now US 5,396,628), claiming JP priority to 1992-03-02. CIP status means each claim gets the earliest date its written description supports — nothing more. Claims whose only support is the January 1995-added matter (principally the job-class / "descriptive indicators" material, claims 4–9 and 11) may be entitled only to 1995-01-31.
2. This is a pre-AIA patent (all effective filing dates < 2013-03-16). So pre-AIA §102/§103 and pre-AIA §103(c) govern — commonly-owned or same-inventive-entity §102(e)/(f)/(g) art is disqualified as §103 art.

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1. The prior-art set (as it appears in the "Prior Art" section)

References cited on the face of the patent

Verification note: I retrieved and read full text for US 4,621,359, US 5,155,851, US 5,212,793, and US 5,237,683 (links in §7). I did not retrieve full text for JPS 62-21398, JPS 62-54350, JPS 61-83392, Sakai et al., Ahmadi et al., or Hellerman & Conroy. My characterizations of those are by title/general knowledge only and should be verified before being relied on in a filing. Do not treat the ones I did not read as established.

What the four verified references actually teach (this is what makes the §103 case work or fail)

• US 5,237,683 (Kitsuregawa). Each coupling unit has a group of counters "corresponding respectively to a plurality of kinds of data," and a control circuit that "judges whether or not there is a deviation of the distribution of data or work units ... on the basis of the contents of the counter group and changes over the connection patterns of the data switch ... so that the deviation is corrected." The counter increments/decrements by 1 — i.e., it is a unit count, not a weight. (Source: https://patentimages.storage.googleapis.com/bc/c5/8c/f5a65207c36e24/US5237683.pdf; https://www.freepatentsonline.com/[5237683](/patent/5237683).html)

• US 4,621,359 (McMillen/Hughes). A load balancing circuit coupled to a packet switching node that "monitors the output port addresses of said applied data packets and the number of data packets addressed to each of said output ports," and generates new routing tag signals identifying output ports "which are adapted to redistribute the output port load." The circuit is a minimum index circuit (find the least-loaded port) plus a modulo-M adder implementing a priority/offset scheme. Family member WO 86/02511 carries the same disclosure. (Source: https://uspto.report/patent/grant/[4621359](/patent/4621359); https://patentimages.storage.googleapis.com/2a/c3/22/d7b4cb39ca62e4/EP0197103B1.pdf)

• US 5,155,851 (Bellcore). Routes a stream of jobs through a data switch (10) to parallel processing stations, where "the switch means and the stations ... each of the stations has a measurable current processing status." A processor computes "occupancy factors" that "approximate the 'cost,' in terms of future job blockings, of increasing the number of jobs in queue i from k_i to k_i+1," converts them to utilization values, and selects the station with the smallest utilization value below a threshold. Claim 1 recites "comparing ... occupancy factors ... expressed in terms of said waiting positions, said servers, said service rate, said allocation factors, and past and present offered data jobs." (Source: https://patents.google.com/patent/US5155851)

• US 5,212,793 (IBM). MVS scheduler: work is "divided into various work classes or work groups"; the scheduler "checks the current work load against goals set up for each class" and performs a "capacity balancing function" by moving initiators between classes — expressly "a structure and mechanism for work load balancing." Class identity is derived from user-supplied JCL (region size, output, time allowed) and SRM data. (Source: https://patents.google.com/patent/US521212793 → corrected: https://patents.google.com/patent/US5212793)

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2. POSITA and the legal framework

Level of ordinary skill (as of the 1992–1995 window). A person with a B.S. in EE/CS (or equivalent) and 2–4 years of experience in parallel-database-machine or interconnection-network design, familiar with (a) multistage interconnection networks and bucket distribution, (b) job scheduling / workload balancing in general-purpose operating systems, and (c) hardware switching. This is a modest level of skill; the inventive act here is at the architecture level, not the circuit level.

Framework. Graham v. John Deere, 383 U.S. 1 (1966) (scope and content of prior art; differences; level of ordinary skill; secondary considerations). Pre-AIA §103(a) asks whether "the subject matter as a whole would have been obvious at the time the invention was made." Because the '028 issued 1997-02-11, KSR Int'l v. Teleflex, 550 U.S. 398 (2007), supplies the Office's operative standards for articulated reasoning: (A) known elements combined by known methods to yield predictable results; (B) simple substitution of one known element for another; (C) use of a known technique to improve a similar device in the same way; (D) application of a known technique to a known device ready for improvement. MPEP 2143. Crucially, the examiner did not apply these combinations — the '028 issued over '683. That is a fact, not a holding; KSR explicitly rejects the assumption that issuance reflects non-obviousness where the Office had only a fixed teaching-suggestion-motivation analysis.

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3. Element-by-element claim mapping

Independent claim 1 (apparatus)

Independent claim 2 (accumulators per kind)

Same substance as claim 1 in accumulator language: a plurality of accumulators "respectively corresponding to a plurality of different kinds of data units," control circuit changing connection patterns "so that deviation ... is corrected." Claim 2's per-kind accumulator element is met squarely by '683; the load-weighting element is met by '359/'851; the "processing load of some data of one kind ... is different from other data of the same one kind" element is not met by any single cited reference.

Independent claim 3 (method — 2×2 switch)

Three steps: (1) recognize the kinds of the two incoming pieces of information — '683 does this expressly ("The control circuit recognizes the kind of data that is inputted to each of the two input lines"); (2) using the descriptive indicators, accumulate cumulative per-kind load values for items output on the output lines — '683 does it by count; '359/'851 supply the load dimension; (3) change the connection pattern based on the descriptive indicators of the load of the two incoming items and on the accumulated values — '683 does it on counter values; the '028's refinement is the |W+V| vs |W−V| test, addressed at §5.

Independent claim 10 (coupling unit per se)

"A plurality of memories, each ... storing a cumulative value for one of the plurality of kinds ... indicating relative distribution of the total processing load of that kind among the plurality of outputs" — this is '683's counter group with the increment changed from ±1 to ±(weight). The rest (switch + control input, control circuit setting the pattern based on the incoming item's descriptor and the cumulative value for that kind) is '683 + '359.

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4. The §103 grounds

Ground 1 — '683 in view of '359 (the core combination)

Covers: claims 1, 2, 3, 10 (and by extension 4–6, 11 as to the "job + associated load" language only partly — see Ground 3).

Rationale (KSR rationales B and C — substitution of a known element / known technique improving a similar device in the same way):

'683 teaches the entire architecture of the independent claims except that its per-kind accumulator increments by a constant ±1. Its own stated object is to "distribut[e] data (or work units) ... equally for each kind" — a count equalization. '359 teaches, in a switch-node context that is structurally the same as the '028's coupling unit (a switch node with in-ports and out-ports, monitoring means coupled to the switch, and a tag/route-selection means), that (i) the thing to equalize is load, not count, (ii) the load measure is accumulated per output port, and (iii) the connection/routing decision is made by locating the minimum loaded port. The '028's control circuit does precisely the '359 min-index function, and the '028's "memory means" is '683's counter with '359's load metric substituted for the unit count.

Motivation, expressly articulated in the '028's own specification. The '028's Background states the problem the combination solves in so many words:

"the number of data or work units may be equally distributed. Since the processing load of the data or the work units varies depending on their contents, however, the processing loads will not be equal ... the processing time is determined by completion of processing by the memory in the second memory group which is the most heavily loaded and takes the longest processing time, thus resulting in extended processing time."

An admitted-prior-art statement of the precise deficiency, plus a reference ('359) that already solves "equal count ≠ equal load" at a switch node, is about as clean a motivation as §103 practice affords. This is rationale (C): a known technique (load-based port selection) applied to improve a similar device ('683's coupling unit) in the same way, with predictable results (the accumulator's arithmetic is unchanged; only the increment's magnitude changes).

Reasonable expectation of success. High. The control law is a strict substitution: wherever '683 writes counter[X] += 1 / -= 1, the combined system writes mem[X] += w / -= w. '683's own decision rule — compare the two counters, flip the pattern toward the smaller — operates identically on weighted values. No new hardware is required; the adder in '359 is already there.

Gap. '683 balances per kind but by count; '359 balances by load but across the whole node, not per kind. The combination must be read as teaching per-kind load accounting, which requires the POSITA to recognize that '683's per-kind accumulator indexing should be retained while '359's load metric replaces the unit count. That is a straightforward grafting, but it is the weakest link and is where a patent owner would focus a rebuttal.

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Ground 2 — '851 in view of '683 (the strongest single combination for the load-weighting element)

Covers: claims 1, 2, 3, 10.

Why this is materially stronger than Ground 1 on the "descriptive indicator carries a load" element: '359 counts packets (each weight = 1). '851 computes an explicit "cost" of assigning a job to a station and selects the minimum utilization value — i.e., it balances the workload, not the item count, and it treats the incoming item as a job (a descriptive indicator of work) rather than as raw data. The '028's claim 1 requires that "the pieces of information include descriptive indicators of data" and that the cumulative value "be determined based on characteristics of the descriptive indicators." '851's jobs + occupancy factors are a better match for that language than '359's uniform packets.

Motivation (KSR rationales A and C): '851 addresses exactly the failure mode the '028's Background recites — a parallel-station system where assigning work by number produces imbalanced completion times ("the probability of blocking an offered job from the job stream is minimized" / "route an offered job ... to the station which has the smallest utilization value below a predetermined threshold"). '683 supplies the missing structural pieces '851 lacks: the multistage coupling-unit network between a first and second group of memories, the per-kind accumulator group, and the local, per-coupling-unit decision ("each coupling unit individually determines an output destination of each piece of input data by use of the counts of its own counters"). Combining a weighted job-cost router with a per-kind accumulator network is rationale (A): known elements combined by known methods to yield a predictable result — and it maps onto claims 1 and 10 almost element-for-element, with claim 2's "plural accumulators respectively corresponding to a plurality of different kinds" coming from '683.

Expectation of success: High. '851 is explicitly a state-dependent router operating in real time; replacing its centralized processor's aggregate utilization with '683's distributed per-kind accumulators is a scale/distribution change that '683 already made possible.

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Ground 3 — Ground 1 or 2 further in view of '793 (the job-class dependent claims)

Covers: claims 4, 5, 6 ("said descriptive indicators include a representation of a job to be processed and an associated processing load of the job to be processed") and claims 7, 8, 9 ("the kinds of data are each user-identified job classes and ... each of the job classes has an associated processing load"), and claim 11.

'793 teaches the exact taxonomy the dependent claims recite:

• Work is divided into classes whose identity is user-specified ("job control language (JCL) statements provided by an end user may specify region size, amount of output, file references, or the time allowed until the job is cancellable");
• each class has an associated goal/load ("the maximum desired response time for each class of work");
• the system performs "capacity balancing" against those per-class goals.

Combined with '851 (jobs routed through a switch on the basis of computed load/cost) and '683 (per-kind accumulators driving a coupling-unit switch), the dependent claims' subject matter is fully met. Motivation: a POSITA implementing load-weighted distribution in a database machine in which jobs are scheduled by class would naturally use the installation's existing job-class construct as the "kind" index — '793 shows the art already associated user-defined classes with per-class load goals and balanced across them. This is rationale (D): a known technique ('793's class-based capacity balancing) applied to a known, improvement-ready device ('683's per-kind distributor with a load metric per Grounds 1–2). The specification's own Table I and the expressly incorporated Hellerman & Conroy, Computer System Performance (1975) independently establish that "work load in terms of job class and priority" was textbook background by 1975.

Caveat on the dependent claims. The job-class subject matter is the matter added by the 1995 CIP. If that matter lacks support in the JP 4-44780 filing and the 1993 parent, claims 4–9 and 11 get only the 1995-01-31 date — which enlarges the prior-art field considerably (everything published or filed before 1995-01-31 becomes available, including 1993–1994 load-balancing publications). That asymmetry between the independent claims (1992) and the job-class dependent claims (1995) should be resolved from the priority documents before any validity opinion is issued.

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Ground 4 (fallback, for the switch-fabric/bucket-distribution elements)

'683 + Sakai et al. (bucket distribution interconnection network) + Ahmadi et al. / US 4,482,996 / US 3,732,548 / JPS 62-21398 ("Distributor of data"). These supply nothing beyond what '683 already discloses about the multistage network and 2×2 switch element. They are useful only to defeat any argument that the network topology (the (N/2)×log₂N coupling-unit matrix) is inventive — the '028's own specification concedes this is conventional and points to the Electronic Communication Society Proceedings, Vol. J86-D, No. 6, p. 1272. I would not lead with this ground.

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5. Where the obviousness case is weak — the genuine non-obvious hooks

An honest §103 opinion must identify what the cited art does not render obvious. There are three such features, in descending order of strength.

(a) Per-kind, load-weighted accumulation — the "index × metric" intersection. '683 has per-kind but count-based. '359 and '851 have load-based but aggregate (not per-kind). The claimed subject matter sits at the intersection: a separate cumulative load accumulator for each kind of information, updated by that item's own estimated load, at each coupling unit. No single cited reference teaches it, and — importantly — none of the three contains the express statement that would make the grafting trivial. A patent owner would argue that '851's whole architecture (centralized processor, occupancy factors recomputed every half-hour to two hours, station-state-driven rather than item-descriptor-driven) is different in kind from '683's distributed, per-item, per-coupling-unit scheme, and that bolting one onto the other is hindsight reconstruction from the '028's own disclosure. Counter: the '028's own Background supplies the motivation (equal counts ≠ equal processing time), and KSR forbids requiring the prior art to recite the inventor's precise reasoning. But the counter is not a slam dunk.

(b) The "processing load of at least some pieces of information of one kind is different from the processing load of other pieces of information of the same kind" limitation (claims 1 and 2, repeated as "some data of one kind of data unit ... different from other data of the same one kind" in claim 2). This is a deliberate, drafted-in distinction and it is not met by '359 (uniform packets) or by '851 (a job's "cost" derives from station state — queue fill, service rate — not from the job's own descriptor). To meet it, one needs art in which each individual item carries its own weight that can vary within a class. Neither verified reference does. This limitation is the strongest candidate for a non-obviousness argument, and it is the one I would expect to survive if the patent were litigated. Filling it requires art outside the cited set — e.g., weighted fair queuing / weighted round-robin scheduling (each flow carries a weight), list-scheduling with per-job estimated processing times, or the '028's own examples (J1 = 10, J2 = 20, J3 = 40 — but note those cross classes, which is why the specification's statement that within-class loads differ is doctrinally awkward and arguably unsupported). Practitioner's note: the specification's own worked example at Table I assigns one load value per class (J1 class 0 → 10; J2 class 1 → 20; J3 class 3 → 40), which does not demonstrate the intra-class variance claims 1 and 2 require. If the claims are read to require intra-class variance, there is a §112 written-description exposure in parallel with the §103 gap — worth running down separately.

(c) The specific decision rule of claim 3 / the FIG. 2 flowchart — the |W+V| < |W−V| test. The claims themselves do not recite this formula (claim 3 recites only recognizing kinds, accumulating per-kind load values "using the descriptive indicators," and changing the pattern "based on the descriptive indicators of the processing load for each of the two pieces of information and based on said cumulative values"). So the formula is not a claim limitation and cannot rescue the claims. It is, however, a potential written-description/enablement issue and could matter if a narrower claim had been pursued. As drafted, the claims are broad and the formula is not a non-obviousness hook.

Additional structural weakness in the defense: the '028's own Background concedes that '683 is the invention's starting point and states the deficiency verbatim. An admission in the specification that the prior art distributes equally by count, coupled with the express statement that "the processing loads will not be equal," is the classic predicate for rationale (C) — an improvement over admitted art in a recognized problem area, where the improvement is the substitution of a weight for a constant. In re Fritch / MPEP 2144.02 (matter admitted as prior art in the specification is available for §103).

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6. Claim-by-claim bottom line

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7. Sources used

• US 5,603,028 full text — https://patents.google.com/patent/US5603028/en ; PDF — https://patentimages.storage.googleapis.com/59/05/31/351828d8ec33ab/US5603028.pdf
• US 5,237,683 (Kitsuregawa) — https://patentimages.storage.googleapis.com/bc/c5/8c/f5a65207c36e24/US5237683.pdf ; https://www.freepatentsonline.com/5237683.html
• US 4,621,359 (Hughes/McMillen) — https://uspto.report/patent/grant/4621359 ; family: https://patentimages.storage.googleapis.com/2a/c3/22/d7b4cb39ca62e4/EP0197103B1.pdf
• US 5,155,851 (Bellcore) — https://patents.google.com/patent/US5155851
• US 5,212,793 (IBM) — https://patents.google.com/patent/US5212793 ; PDF — https://patentimages.storage.googleapis.com/d2/cc/ab/25a3825c9eae6b/US5212793.pdf

Confidence: high on the content of the four verified references and on the pre-AIA/CIP framework. Moderate-to-low on JPS 62-21398, JPS 62-54350, JPS 61-83392, Sakai et al., Ahmadi et al., and Hellerman & Conroy — I have not read those documents and have not relied on them for any element of the grounds above. I have not verified whether the 1997-07-29 certificate of correction altered any claim; if it did, re-run the mapping in §3 against the corrected text.