US 4585157

I'll run targeted searches for this exact patent number and for any 2026 CAFC docket activity.

Let me verify there is no litigation or 2026 appellate activity tied to this specific number, and confirm the current ownership chain.

US Patent 4,585,157 — Analyst Summary

Source of record: Full patent text fetched from https://patents.google.com/patent/[US4585157](/patent/US4585157)/en (retrieved 2026‑09‑24). All identifiers below are reproduced literally from that source; no auto-correction applied.

1. Bibliographic Data

Uncertainty flags:

• The "Motors Liquidation Co" current assignee is an automated Google Patents annotation, not a verified USPTO reassignment record. It is consistent with General Motors' 2009 bankruptcy (Motors Liquidation Company was the GM debtor-in-possession/liquidation entity), but I did not confirm a recorded assignment instrument for this specific patent. Treat as low-confidence.
• Legal status is internally inconsistent in the record: "Anticipated expiration 2005‑04‑04" (the statutory 20-year date) appears alongside maintenance-fee events showing a 1998 lapse (see §4). The 2005 date is a computed projection, not an actual expiration event.

2. Abstract (verbatim substance)

"A method of bonding two integrated circuit chips in a face-to-face relationship to a single site of finger leads situated in a tape-type lead frame. The finger leads contained at a single site in a lead frame are divided into two groups and are bonded in two separate bonding processes. The first group has its inner free ends configured in combination with contact bumps on a first chip, effective to leave the second group of finger leads outside the peiphery of the first chip after bonding of the first chip to the tape. In the second bonding process, a second integrated circuit chip is placed beneath the tape that has a first integrated circuit chip already bonded to the top side of it and a heated thermode having a recess in its surface. The peripheral edge of the thermode is used to complete bonding of the second integrated circuit chip to the second group of finger leads at the same site of the lead frame."

Note: the abstract contains the misspelling "peiphery" (for "periphery") as filed — reproduced literally.

3. Plain-Language Overview of Each Independent Claim

All three claims describe the same underlying idea — two IC chips bonded face‑to‑face at one tape-automated-bonding (TAB) lead-frame site, in two sequential thermode bonding passes — but each claim recites a different apparatus/handling sequence for the second pass. The common technical thread is the recessed thermode: the second bonding thermode has a pocket that receives the already-bonded first chip so that no bonding pressure is applied to it.

Claim 1 — Generic two-pass method.
Provide a first chip with contact pads; provide TAB tape with sites each having a first and second group of finger leads (each with an inner free end) on first/second opposed major surfaces. Bond the first group's inner free ends to the first chip's pads (via contact bumps) on the tape's first major surface, by compressing leads + chip between a heated thermode and an anvil. Provide a second chip whose pads cooperate with the second lead group such that interconnection sites fall outside the periphery of the already-bonded first chip. Bond the second group to the second chip by compressing between a thermode and anvil, the thermode having a recess in its surface accommodating the first bonded chip so that no pressure is applied to that chip.

Claim 2 — "Flip the tape into a second bonder" variant.
Same as Claim 1 up to the first bond, but specifies the first group is bonded on the tape's bottom surface inside an inner lead bonder machine. Then: flip the tape upside down so the bottom surface carrying the first chip faces upward; feed the flipped tape through a second inner lead bonder whose heated thermode has a recess accommodating the first bonded chip; place the second chip on that machine's anvil; then bond the second lead group to the second chip's bumps by compressing the lower surface of the finger leads and the second chip between the recessed heated thermode and the anvil — again so no pressure is applied to the first chip.

Claim 3 — "Reel, invert spool, swap thermode in the same machine" variant.
Same first bond on the first major surface inside an inner lead bonder. Then: reel the tape onto a spool mounted in the bonder machine; turn the spool upside down and remount it in the same machine; replace the first thermode with a second thermode having a recess; unreel and position the tape between the second thermode and the anvil with the first bonded chip on top and seated in the recess. Place the second chip on the anvil, and bond the second lead group to it with the recessed thermode — no pressure on the first chip.

Practical distinction: Claim 1 is the broadest recitation (two thermode/anvil compressions, recessed thermode on the second); Claim 2 narrows to a tape-flip plus a second bonder machine; Claim 3 narrows to a spool-reel inversion plus thermode substitution within the same bonder machine. All three share the identical functional limitation that the recess prevents pressure on the first chip.

4. Prosecution / Maintenance Timeline (from the legal-events record)

• 1985‑04‑04 — Assignment recorded (GM, from Belcher).
• 1988‑10‑31 — Fee payment procedure event (payor number assigned; large entity).
• 1989‑10‑02 — Maintenance fee paid (4‑year).
• 1993‑11‑08 — Maintenance fee paid (8‑year) plus late-payment surcharge.
• 1998‑02‑13 — Maintenance fee reminder mailed.
• 1998‑04‑26 — Lapse for failure to pay maintenance fees.
• 1998‑07‑07 — Lapsed due to failure to pay maintenance fee, effective 1998‑04‑29.
• 2018‑01‑31 — Status entry: "Patent expired due to nonpayment of maintenance fees under 37 CFR 1.362." (This appears to be a bulk/administrative status-cleaning entry, not the operative 1998 lapse.)

Bottom line: the patent went abandoned in 1998 for non-payment of the 12‑year maintenance fee, roughly 12 years after issue — well before its nominal 2005 term. Any residual "2005‑04‑04 anticipated expiration" entry should be read as a computed term projection, not an actual expiration date.

5. Technical Details Worth Noting (from the specification)

• Copper tape: 0.0028 inch thick, non-plated copper, 2 oz weight, supplied by Minnesota Mining & Manufacturing Co.; gold- or tin-plated copper also contemplated.
• Bonding parameters exemplified: 0.8 sec, 525 °C, 200 gms/bump (specification states pressure may be adjusted per heat input and time).
• Bump metallurgy example: aluminum pad built to ~12,000 Å; sputtered Ti and W alloy layers (~2,000–3,000 Å each; ~5,000 Å combined); ~1,000 Å sputtered gold; then 0.001 inch plated gold.
• Optional silicone elastomer passivation on the first chip; optional plastic potting of the finished two-chip assembly.
• The specification expressly contemplates the two chips being "the same, different, mutually cooperative or mutually uncooperative," and includes an alternate embodiment (FIGS. 11–12) in which two identical rectangular chips are bonded rotated 90° relative to each other so the second chip's bumps fall outside the first chip's periphery, and the two chips can later be excised and used together or separately (FIGS. 14a/14b).
• Internal drafting inconsistencies (literal reading): the reference numeral "26" is used both for a long finger lead in FIG. 4 and for the thermode surface in FIG. 2; claims 2 and 3 contain a grammatical gap at "…to contact bumps on the chip contact pads interconnect the first group of finger leads…" (likely an omitted "such that" clause as transcribed). These are transcription/drafting artifacts, not substantive scope questions.

6. USPTO and CAFC 2026 Docket Search — Results

No results found linking US 4,585,157 to any 2026 Court of Appeals for the Federal Circuit docket, and no litigation or PTAB proceeding involving this patent number was located.

Searches performed:

• US4585157 "Tape bonding of two integrated circuits into one tape frame" — returned the patent itself plus citing references only.
• 4585157 Court of Appeals for the Federal Circuit docket 2026 — returned the CAFC's mid‑2026 scheduled-case lists and unrelated Federal Circuit/Federal Register materials; no entry mentioning 4,585,157.
• "4,585,157" OR "4585157" patent lawsuit infringement litigation docket — returned only unrelated hits.
• "4585157" patent "Motors Liquidation" assignee General Motors expired maintenance fee — returned unrelated hits.

Important identifier-collision warning: searches for the bare string "4585157" surface several different rights and non-patent records that must not be confused with US 4,585,157:

• JP4585157B2 — "Relay connector," Japanese patent (application 特願2001‑284165, registered 2010‑11‑24, owner かがつう株式会社). Entirely unrelated subject matter.
• Argentine trademark Act No. 4585157 (INPI, Class 35, "LOS AZULES," 2025).
• A GlaxoSmithKline FDA periodic report number 4585157‑4.
• An Italian ULSS candidate ID and various furniture/other numeric matches.

Confidence and limitations: I did not obtain a direct, authenticated query of USPTO PatentCenter/Public PAIR or a PACER/Docket Alarm docket report; the above reflects open-web searches only. The absence of a 2026 CAFC docket entry is therefore reported as "not found in searchable public sources," not as a certified negative. Given the patent lapsed in 1998 and its nominal term would have ended 2005‑04‑04, contemporaneous 2026 appellate activity concerning US 4,585,157 would be anomalous.

I'll search for litigation involving US patent 4585157.

Initial results show no litigation. Let me check litigation-specific databases directly.

Let me run a few more targeted checks before concluding.

Litigation Search Report — U.S. Patent No. 4,585,157

Patent: U.S. 4,585,157 — "Tape bonding of two integrated circuits into one tape frame"
Inventor: Stephen R. Belcher
Original assignee: General Motors Corporation (Detroit, MI)
Application No.: US 06/719,987 · Filed: April 4, 1985 · Granted: April 29, 1986
Current assignee of record (per Google Patents): Motors Liquidation Co (the GM bankruptcy successor entity)
Status: Expired — lapsed for failure to pay maintenance fees, effective April 29, 1998

Result: No litigation identified

I found no U.S. district court action, ITC investigation, PTAB proceeding (IPR/PGR/CBM), or ex parte/inter partes reexamination involving U.S. Patent No. 4,585,157. Accordingly, I cannot provide plaintiff, defendant, jurisdiction, case number, filing date, or outcome for any case — because no such case appears in the sources I was able to search.

To be explicit: this is a negative finding on the evidence available to me, not a certified absence of litigation. I was not able to query PACER or the paywalled Westlaw/Lexis litigation databases directly, and I do not want to manufacture a case to fill the requested fields.

Bases for the conclusion

1. No litigation-specific hit for this patent number. Open-web searches for the patent number in litigation contexts returned nothing on point. The near-miss hits were false positives on the same digit string, and I deliberately did not substitute them:

   • JP 4585157 B2 ("Relay connector," Kagatsu K.K., registered 2010) — a Japanese patent that merely happens to share the number 4585157. Unrelated subject matter (RJ45 telephony/LAN connectors).
   • 4585157 as an Argentine trademark application (INPI "LOS AZULES"), a Porta furniture article number, a Lithuanian registry notice number, an Italian regional-health candidate ID, a CourtListener financial-disclosure investment record ID, and an FDA AERS case ID. All unrelated identifiers, not patent litigation.
   • Several PTAB documents (Unified Patents v. MasterObjects, MCOM IP, R2 Solutions v. Roku, Lear, EpicRealm, LG Display v. AU Optronics) matched only on general litigation-search boilerplate or on different patent numbers — none referenced 4,585,157.

2. Timeline makes assertion improbable. The patent issued in 1986, the last maintenance fee was paid in 1993 (8-year payment), and it lapsed on April 29, 1998 for non-payment of the 12-year maintenance fee. This predates the modern patent-assertion/NPE era by roughly a decade. A patent that lapsed in 1998 expires about 17 years after its 1985 filing — never having reached the 20-year term — and there is no window in which a post-2010 monetization campaign could have used it.

3. Google Patents lists no litigation. The "Cited By" and "Citations" tables for US4585157 show only patent-family citation relationships (e.g., US4693770 Matsushita; US5082802 Texas Instruments; US4862322 Bickford; US5060844 IBM), plus U.S. Patent Nos. 3,877,221 (IBM), 3,871,936 (Western Electric), 4,283,839 (Western Electric), and 4,371,912 (Motorola) as prior art of record. Citation relationships in prosecution are frequently mistaken for litigation; none of these are suits involving 4,585,157.

4. No assignment/enforcement trail. The only recorded post-issuance assignments are the original 1985 assignment from Belcher to General Motors and routine fee-payment entity-status filings. The listed current owner, Motors Liquidation Co, is the residue of the 2009 GM bankruptcy — an entity that does not enforce patents, further undercutting any realistic litigation history.

Recommended next steps if you need a definitive record

Because the operative rule is that I should not report a case I cannot verify, I'd suggest confirming through sources I could not access here:

• PACER / CourtListener RECAP — run a party-and-patent search on "4,585,157" and on the Patent Assignment records; RECAP only mirrors what has been downloaded, so a nil result is not dispositive.
• Westlaw KeyCite or Lexis CourtLink on the '157 patent — these are the tools the USPTO's own CRU "Litigation Search Report" uses (visible in the reexamination file histories surfaced in my searches) and are the most reliable single check.
• USPTO Patent Center / Global Dossier for any reexamination, reissue, or disclaimer activity on the patent.

If you can pull the KeyCite/CourtLink result, I'll fold it into this memo with full case details.

Bottom line: On the evidence I could obtain, U.S. Patent No. 4,585,157 has no known litigation history. If you have reason to believe a specific case exists (e.g., from a license, demand letter, or assignment dispute), give me the party name or district and I will check it against the databases again.

PTAB / AIA Trial Landscape — US 4,585,157

Patent: US 4,585,157 A — "Tape bonding of two integrated circuits into one tape frame"
Inventor: Stephen R. Belcher · Original assignee: General Motors Corp. (current record: Motors Liquidation Co)
Filed: 1985-04-04 · Granted: 1986-04-29 · Claims: 3 (all independent method claims — 1, 2, 3)
Source of record: https://patents.google.com/patent/US4585157/en

Proceedings overview

There are zero AIA trial proceedings on file against US 4,585,157 — no IPRs, no PGRs, no CBMs, no derivations — so the breakdown is 0 active / 0 claims invalidated / 0 claims sustained / 0 settled / 0 institution denials. Per the structured "PTAB proceedings on file" block, the USPTO Open Data Portal returns "no AIA trial proceedings for this patent as of the most recent ingest," and independent web searching surfaced no PTAB proceeding, no Final Written Decision, and no Federal Circuit appeal involving this patent. The bottom-line defensive posture is therefore not "hardened by surviving IPRs" and not "claims canceled" — it is that the patent is a dead letter: the maintenance-fee record shows it lapsed on 1998-04-29, roughly sixteen years before the AIA trial regime even existed (first IPR petitions filed 2012-09-16). Any demand letter citing this patent should be treated as either a clerical error or a bad-faith assertion.

PTAB proceedings

No AIA trial proceedings on file — no petitioner v. General Motors Corp.

• Type: N/A — no Inter Partes Review, Post-Grant Review, or Covered Business Method review has ever been instituted or even petitioned on this patent.
• Filed: N/A (no petition number exists; no proceeding number should be cited for this patent).
• Status: None — verbatim from the structured data: "The USPTO ODP API returns no AIA trial proceedings for this patent as of the most recent ingest." Plain English: the Board's docket is empty as to US 4,585,157.
• Judge panel: None — no APJ has ever been assigned.
• Petition grounds: None — no § 102, § 103, or § 112 ground has been advanced at the Board.
• Institution decision: None — no institution or denial decision exists.
• Final Written Decision: None. Accordingly, no claim of this patent has been canceled, confirmed, or construed by the PTAB. Claims 1, 2, and 3 are all UNTESTED at the Board.
• Settlement / termination: None.
• Appeal: None — no CAFC docket, no CourtListener record of an appeal from any PTAB decision on this patent.
• Defensive value: An IPR-based defense is unavailable in the ordinary sense (there is nothing to institute against — and no tactical reason to petition), but a defendant does not need one. The controlling fact is the legal-status record below.

Why there is no PTAB activity (the real story)

The absence is fully explained by the patent's own expiry, not by the strength of the claims. From the USPTO legal-events record on the patent page:

Because this patent issued before the 1995 URAA term change, its term ran 17 years from grant at the outside — i.e., to 2003-04-29 — but it never got there: the third (11-year) maintenance fee window closed 1998-04-29 (11.5 years from grant plus the six-month grace period under 35 U.S.C. § 41(b) / 37 CFR 1.362). The patent expired on that date and has been unenforceable since. Two caveats worth stating precisely:

• The "anticipated expiration 2005-04-04" value on the Google Patents page is a machine-calculated 20-years-from-earliest-filing placeholder. It does not reflect the actual lapse date and should not be quoted to a court. The authoritative event is the 1998-04-29 lapse.
• Reinstatement is theoretically available only by petition under 37 CFR 1.378 on a showing of unintentional delay, with the fee and surcharge, and even then 35 U.S.C. § 41(c)(2) intervening rights would shield pre-reinstatement activity. After 28 years, no realistic revival path exists. (I am flagging this as a low-precision point: I am not aware of a hard regulatory deadline that a 28-year delay categorically violates, but the "unintentional delay" showing is not realistically makable at this remove.)

Strategic summary

Claim status. All three claims — claim 1, claim 2, and claim 3 — are UNCHALLENGED and therefore UNTESTED at the PTAB, and simultaneously unenforceable by expiration. No claim was canceled, because no proceeding ever reached a Final Written Decision. Do not cite a "canceled claim" narrative for this patent; there is none. Equally, do not treat "no IPR activity" as evidence of validity — the reason no one petitioned is that the patent had already lapsed eight years before the PTAB was created and roughly fourteen years before the first IPR was filed. Well-asserted patents attract IPRs; this one was never assertable in the AIA era.

Estoppel landscape. § 315(e)(2) estoppel is entirely absent. Estoppel attaches only after a final written decision, and no petition was ever filed, so no petitioner (or privy) is estopped from anything. For a defendant hypothetically facing this patent today, all prior-art grounds are procedurally open and unconstrained — § 102(b) art, § 112 written-description and enablement, indefiniteness as to the "contact bumps"/"periphery" limitations, and claim-construction positions on the recessed-thermode limitation are all unfettered. Practically, none of that is needed: the expiration defense is complete and dispositive, and the § 286 six-year damages lookback window reaches back only to 2020-09-24, long after the patent was dead.

Pattern signals. Nothing to pattern-match: no petitioner has filed any IPR on this patent (so no serial-petitioner or follow-on-petitioner pattern), the patent owner has pursued no PTAB appeal (General Motors never appeared before the Board on this patent), and there is no defensive aggregator (e.g., Unified Patents) in the chain — Unified's founding post-dates the 1998 lapse by sixteen years and it has no recorded involvement here. The patent's modern significance is purely as a prior-art reference: it is cited by 16 later documents and was itself examined against US 3,871,936 (Western Electric), US 3,777,221 (IBM), US 4,283,839 (Western Electric), and US 4,191,912-adjacent Motorola art (US 4,371,912, Motorola). A pre-AIA § 102(b) reference published 1986-04-29 with a 1985-04-04 filing date, it remains a clean prior-art citation for TAB / face-to-face dual-chip bonding.

False-positive warning. Searches on the bare string "4585157" return substantial noise. In particular, JP4585157B2 (Kaga Tsusho, "Relay connector," granted 2010-11-24) is an entirely unrelated Japanese patent that happens to share the number; there are also unrelated matches in a GlaxoSmithKline AERS report number and a furniture SKU. Confirm any reference by jurisdiction and by the US patent's title/inventor (Belcher / General Motors, 1986-04-29 grant) before acting.

Recommended next steps

1. If you have received a demand letter citing US 4,585,157 — respond with the expiration record, not with invalidity contentions. The dispositive citation chain is: 35 U.S.C. § 41(b) and 37 CFR 1.362 (consequence of non-payment), evidenced by the USPTO legal-events entries "REMI 1998-02-13," "LAPS 1998-04-26," and "FP 1998-07-07 — effective date 19980429." Because there is no Final Written Decision to link to, the authoritative artifacts are the patent page (https://patents.google.com/patent/US4585157/en), the USPTO Patent Center file wrapper (linked from that page), and the assignment/legal-status record. A patent that expired on 1998-04-29 cannot be infringed today.
2. If you are evaluating the patent only as prior art — treat it as available under pre-AIA § 102(b) (published 1986-04-29). Verify your target patent's effective filing date against the 1985-04-04 / 1986-04-29 dates; it will only be § 102(b) art against targets filed after 1986-04-29, and consideration of the 1985-04-04 filing date is required for § 102(e)/(g) positions (no published application, so § 102(e) is unavailable — the 1986-04-29 grant is the operative publication date).
3. If you are considering a defensive IPR — do not file one. There are no live claims to invalidate, IPR against a lapsed patent provides no benefit, and the filing would waste the fee. There is likewise no § 315(b) one-year service-clock issue to track and no trial-stage milestone calendar (no institution deadline, no oral hearing, no statutory FWD due date) because no proceeding exists.
4. Escalation flag — a demand letter on an expired-1998, pre-AIA patent is a strong indicator of either records error or an improper assertion campaign. Preserve the letter and consider a fee-shifting / Rule 11 posture if suit is threatened.

Confidence note: The "no PTAB proceedings" conclusion rests on (a) the structured ODP block supplied for this patent and (b) independent web searches that surfaced no petition, institution decision, FWD, or CAFC appeal. I did not find any PTAB E2E or CourtListener record for US 4,585,157. I am reporting no fabrication of proceeding numbers — there are none to report.

I'll start by verifying the assignment record against live sources, since the authoritative patent text shows only one recorded assignment but Google Patents lists a different "current assignee."

Key finding on the GM side. Now let me pin down whether the 2009 GM bankruptcy omnibus IP assignment was ever recorded against this patent, and check for any litigation/NPE activity.

Inventors

Stephen R. Belcher — sole named inventor (US4585157A, "Tape bonding of two integrated circuits into one tape frame").

• Employer at time of filing: General Motors Corporation (Detroit, MI), a Delaware corporation. This is determinable from the assignment itself, not from inference: the assignment recorded at reel/frame 004393/0404 is captioned "ASSIGNMENT OF ASSIGNORS INTEREST.; ASSIGNOR: BELCHER, STEPHEN R." and names "GENERAL MOTORS CORPORATION, DETROIT, MI A CORP OF [DE]" as owner, with an effective/execution date of 1985-03-25, ten days before the 1985-04-04 filing date.
• Unusual patterns: None determinable. This is a single-inventor patent; there is no multi-inventor cohort whose departures could be tracked, and I found no evidence of Belcher leaving GM within 12 months of filing. The subject matter (tape automated bonding of ICs to a foil lead frame) sits in GM's electronics organization (the era's Delco Electronics / GM Hughes Electronics work on TAB for automotive electronics), but I could not verify Belcher's specific division — my search on this point returned no usable results. Treat the division attribution as unconfirmed.

Caveat on completeness: the Google Patents legal-events record is the only assignment data I could retrieve. It does not expose the "correspondent of record" field, and I was unable to complete live queries against the USPTO Assignment Center. Where the correspondent is unrecoverable, I say so below rather than guessing.

Original assignee

General Motors Corporation, a Delaware corporation, Detroit, Michigan — assignee of record on the issued patent (reel/frame 004393/0404).

• Line of business: Automobile design and manufacturing (OEM), with a substantial captive electronics/semiconductor operation. This patent is a process patent (TAB bonding of two ICs face-to-face into one tape site); it protects a manufacturing method, not a sold article, so "ships a product embodying the claims" does not map cleanly onto it.
• Product embodiment: GM/Delco assembled TAB-bonded integrated circuits for automotive electronic modules in this period, but I found no evidence that a specific commercial GM product practiced the two-chip face-to-face claims of this patent. Mark as unverified.
• Current status: Dissolved. "Old GM" filed Chapter 11 on 2009-06-01 (In re General Motors Corp., 407 B.R. 463 (Bankr. S.D.N.Y. 2009)); the §363 sale closed 2009-07-10, at which point General Motors Corporation renamed itself Motors Liquidation Company and the acquisition vehicle NGMCO, Inc. became General Motors Company. MLC's Chapter 11 plan was confirmed 2011-03-29; MLC dissolved 2011-12-15 and its residual wind-down assets passed to the Motors Liquidation Company GUC Trust, which still exists as successor. The 2016 Second Circuit Motors decision concerned notice to product-liability claimants and does not disturb the IP transfer.
• Note on the Google Patents "Current Assignee" field: it lists Motors Liquidation Co. That is consistent with GM's 2009 name change and the Omnibus Intellectual Property Assignment Agreement dated 2009-07-10 (MLC, f/k/a General Motors Corporation, and affiliates → General Motors Company, f/k/a NGMCO, Inc.), by which substantially all GM patents were conveyed. However, no reel/frame for that conveyance appears in the legal events for this patent, and I could not confirm a 2009 recording was made against US4585157 specifically. Treat "Motors Liquidation Co" as a normalization/entity-succession label rather than a verified recorded instrument. As a practical matter the point is academic: this patent lapsed for non-payment of maintenance fees effective 1998-04-29, eleven years before the bankruptcy.

Assignment timeline

Chronological list of recorded assignments:

• 1985-03-25 (executed) / recorded 1985-04-04 — Reel 004393/0404
  • Conveyance: Assignment of assignors' interest
  • Assignor: Belcher, Stephen R. (sole inventor)
  • Assignee: General Motors Corporation, Detroit, MI, a Delaware corporation
  • Correspondent: Not recoverable. The Google Patents legal-events record for this patent reproduces only the free-text string "ASSIGNMENT OF ASSIGNORS INTEREST.; ASSIGNOR: BELCHER, STEPHEN R.; REEL/FRAME: 004393/0404" and does not carry the PTO-1595 correspondent block. On a 1985 in-house-to-corporate filing by a single large-entity assignee, the correspondent is almost certainly GM's own patent department at the Warren/Detroit technical center, but I am not asserting a name or firm without the recorded document. Flagged as a gap.
  • Context: Original employment/assignment transfer from inventor to employer. No consideration structure disclosed; this is the standard pre-issuance inventor-to-employer assignment.

That is the only recorded assignment. There are no post-issuance assignments of US4585157 in the record I retrieved — no security interests, no releases, no corrective assignments, no licensing-only LLC in the chain, and no assignment corresponding to the 2009 GM bankruptcy transfer.

Two docket facts from the same record are relevant and should be carried forward, because they close the file:

• 1989-10-02 / 1993-11-08 — small-entity/large-entity 4-year and 8-year maintenance fee payments recorded.
• 1998-02-13 maintenance fee reminder mailed → 1998-04-26 lapse → 1998-07-07 "Lapsed due to failure to pay maintenance fee," effective 1998-04-29. (A later 2018-01-31 administrative status entry restates expiration for non-payment.)

Per your rule: the absence of recorded post-issuance assignments is itself the finding, and in this case the lapse date is dispositive of value.

Timeline diagram

timeline
    title Ownership of US 4585157
    1985 : Belcher assigns to General Motors
         : Application filed 04 Apr 1985
    1986 : Patent issued 29 Apr 1986
    1998 : Lapsed for unpaid maintenance fee
    2009 : Old GM renamed Motors Liquidation Co
    2011 : Motors Liquidation Co dissolved

NPE / troll-pattern signals

1. Shell-entity transfer — Not present. The only recorded link is inventor → General Motors Corporation at reel 004393/0404 (exec. 1985-03-25, rec. 1985-04-04). No "IP / Holdings / Licensing / Ventures" entity appears anywhere in the chain, and no registered-agent address is associated with this patent.

2. Known asserter in the chain — Not present. No assignee in the chain matches a public NPE list (Acacia, Marathon, Intellectual Ventures, IPNav, Wi-LAN, Conversant/Mosaid, Vringo, Pendrell, Innovatio, MPHJ, Lumen View, Round Rock, Document Generation Corp, Spangenberg entities). I did not find this patent in the RPX or Unified Patents asserter directories; note that I could not complete live queries against those directories within my tool budget, so the negative is weakly sourced rather than exhaustively confirmed.

3. Repeat correspondent across the chain — Not present / cannot be evaluated. There is only one recorded assignment, and its correspondent field is not exposed in the data I retrieved. A single link cannot exhibit the recurrence that this signal requires. No correspondent name or firm to cite — recorded here as a data gap, not as an exculpatory finding.

4. Cascading transfers — Not present. No chained LLCs, no transfers at all after 1985, and certainly none within any 24-month window.

5. Pre-litigation transfer — Not present. No infringement suit naming this patent was identified, and the last transfer of record predates any conceivable suit by decades. My litigation query on the patent number returned no usable results, so I state this as "no suit found" rather than "no suit exists."

6. Bankruptcy fire-sale — Present, but not as a patent fire-sale, and therefore non-supporting. The original assignee (General Motors Corporation) did file Chapter 11 on 2009-06-01 and did sell substantially all assets via a §363 sale on 2009-07-10, with the shell remaining as Motors Liquidation Company (dissolved 2011-12-15). Critically, that was a going-concern reorganization sale of an operating automaker's IP, not a patent liquidation — and it occurred eleven years after this patent lapsed for non-payment effective 1998-04-29. Whatever residual record title existed in 2009 had no enforceable claims attached to it.

7. Privateering — Not present. No evidence that GM transferred this patent to an NPE to assert against competitors, and no SEC filing, Patent Progress, or EFF coverage ties US4585157 to such an arrangement.

8. Defensive aggregator (anti-NPE) — Not present. The chain does not terminate at RPX, AST, LOT Network, Unified Patents, or OIN. The chain terminates at a maintenance-fee lapse.

Verdict

Insufficient data — only the original assignment.

The entire recorded chain is a single instrument: Stephen R. Belcher to General Motors Corporation, executed 1985-03-25 and recorded 1985-04-04 at reel 004393/0404. There is no post-issuance assignment, no security interest, no NPE, and no assertion activity to evaluate. The patent's own docket closes the question of economic value — the 1998-07-07 "Lapsed due to failure to pay maintenance fee" entry, effective 1998-04-29, terminated the enforceable term more than a decade before GM's 2009 Chapter 11 and the MLC name change that Google Patents reflects in its "current assignee" field. I found no evidence of any transfer enabling assertion, and the lone bankruptcy-adjacent event (GM's §363 sale) is an operating-company reorganisation untethered to a dead patent.

Two disclosures, per your constraints: the correspondent-of-record field was not recoverable from the sources I could reach, and my confirmatory queries against the USPTO Assignment Center, the RPX/Unified asserter directories, and the patent's litigation history did not complete. Verification starting point: USPTO Patent Assignment Search (search patent number 4585157), cross-checked against Google Patents legal events.

I'll verify the patent and each cited reference against USPTO/patent sources.

Now let me pull the other three references of record.

Let me verify two loose threads: the exact bibliographic dates for US3777221 and the relationship between the two "Loading of compliant tape" patents.

Note on date inconsistency (flagged per instructions)

The task header states the current date as April 26, 2026, while the governing operating rule for this session states today's date is 2026‑09‑24, and the previously generated sections of this analysis were produced/dated 2026‑09‑24. I am proceeding on 2026‑09‑24 as the operative date, and flag the discrepancy rather than silently harmonizing it. Nothing in my findings below turns on the ~5‑month difference.

I also note that the previously generated sections already covered the bibliographic record, the claims, the prosecution/maintenance timeline, and the no-litigation finding. I do not repeat those; I build on them.

1. Patent identification — literal, no auto-correction

Confirmed collision warning (no auto-correction applied): the bare string "4585157" also resolves to JP4585157B2 — "中継コネクタ / Relay connector," application 特願2001‑284165, registered 2010‑11‑24, owner かがつう株式会社 (Kagatsu K.K.), 8 claims, IPC H01R 13/719. This is a Japanese relay/RJ45 connector patent and is not US 4,585,157. My hits for the U.S. patent came from patents.google.com/patent/US4585157A/en and patents.justia.com/patent/4585157. I did not substitute any result bearing a similar-but-different number.

Search-method limitation (stated plainly): I queried Google Patents (which mirrors USPTO full‑text/OCR of the printed patent), Justia, and FreePatentsOnline. Google Patents' "Patent Citations (4) / Cited by examiner" table reproduces the examiner's citations of record. I did not obtain an authenticated USPTO Patent Center / Public PAIR "References Cited" printout, so this is a high-confidence but not certified reproduction of the face of the patent.

2. Complete set of patent citations for US 4,585,157

The record for US 4,585,157 shows exactly four patent citations, all "cited by examiner":

Statutory framework note (important): US 4,585,157 was filed 1985‑04‑04, so pre‑AIA 35 U.S.C. §§ 102/103 (first-to-invent) governs. The § 102(b) critical date is one year before filing = 1984‑04‑04. All four references published 1973–1983, i.e., all more than one year before the critical date, so each is available as § 102(b) prior art. (References 3 and 4 also fall in § 102(a)/(e) territory relative to the 1985 filing, but § 102(b) is the cleaner basis.)

Note on the "Cited By" tables: the 14–16 documents listed as citing US 4,585,157 (e.g., US 4,693,770 Matsushita; US 5,082,802 Texas Instruments; US 4,862,322 Bickford; US 5,060,844 IBM; US 6,022,274 ITRI) are forward citations / descendant art, not prior art against the '157 patent, and carry no § 102 significance here.

3. Reference-by-reference analysis

Citation 1 — US 3,871,936 A

Full citation: US 3,871,936 A, "Loading of compliant tape," Western Electric Co. (assignee of record), priority 1971‑10‑01, published 1975‑03‑18. 3 claims, 12 drawing figures.

Description (from the specification text): A continuous compliant-bonding tape (apertured; both sprocket apertures and chip apertures) is successively indexed through a loading machine. At an adhesive-application station, small accurately located dots of adhesive are applied to the tape. At a transfer station, beam-lead integrated-circuit chips are pressed against the tape so the beam leads are secured to the adhesive dots. Chips arrive at the transfer station in spring-biased holding nests on an indexable turret. Critically, the compliant tape is embossed to form protective pockets, so that when the chip-loaded tape is wound onto a take-up reel, subsequent winding does not damage the chips. The loaded reel is then taken to a bonding machine (the specification cross-references Ser. No. 863,259 → US 3,640,444 (Ludwig) and Ser. No. 173,447 → US 3,771,711 (Lesyk, Ludwig, Monahan)). The reference builds on the known compliant-bonding art of US 3,533,155 (Coucoulas).

§ 102 anticipation assessment:

• Claims 1, 2, 3 — not anticipated. None of the three claims reads on this reference. Its disclosure is an adhesive-based tape-loading system for beam-lead devices in which no bonding occurs during loading (the leads are stuck to adhesive dots, not thermode-bonded). Every claim of the '157 patent requires (i) bonding inner free ends of a first lead group to contact bumps/pads by compressing between a heated thermode and an anvil, and (ii) a second Group of leads bonded to a second chip by a thermode having a recess that accommodates the first bonded chip so no pressure is applied to it. US 3,871,936 discloses no thermode, no anvil, no two-chip face-to-face arrangement, and no contact-bump bonding.
• Residual § 102 relevance: none. Its only arguable significance to the '157 claims is that it puts pre-loading chips onto a tape and reeling the loaded tape onto a reel in the art — which is handling context supporting Claim 3's "reeling said tape onto a spool… turning said spool upside down" step, but as a § 103 (obviousness) consideration, not § 102.

Caveat flagged: my search also surfaced US 3,785,903, also titled "Loading of compliant tape" by Western Electric, with specification text referring to the same Ser. No. 173,447. That strongly suggests a family/continuation relationship with US 3,871,936, but I ran out of search steps before confirming the relationship, and US 3,785,903 is not a reference of record against the '157 patent. Treat the family relationship as unverified.

Citation 2 — US 3,777,221 A

Full citation: US 3,777,221 A, "Multi-layer circuit package," International Business Machines Corp. (Armonk, NY), priority/filing date listed as 1972‑12‑18, published 1973‑12‑04.

Description: A package of a pair of planar, inorganic (ceramic) substrates 11 and 12 held in parallel, aligned relation with respective signal planes 11a/12a arranged face-to-face. Lower substrate 11 is larger, with a tab 14 carrying contact lands 15/16 for I/O and through-holes (vias) 17. Substrate 11 carries circuit chip sites 24 with solder-coated land areas 25 that make fusible connections to mating solder-coated terminals 26 on the underside of integrated circuit chips 19 (i.e., flip-chip/C4-style solder attachment). Substrate 12 is smaller and is formed with openings 18 aligned with each chip site, larger than the chip, which expose the attached chips 19 on surface 11a of substrate 11, permit them to be attached and removed, and provide physical protection for the chips during handling. Exposed enlarged auxiliary pads 27 between the chip edge and opening 18 allow post-assembly circuit changes (solder-add discrete wires 28) and line deletions 29. Signal lines 21 (X-direction) and 22 (Y-direction) on the two facing planes are arranged generally orthogonal to one another and selectively soldered at crossover points. Supply/ground planes 23 are on the exterior surfaces.

§ 102 anticipation assessment:

• Claims 1, 2, 3 — not anticipated. US 3,777,221 is a ceramic-substrate multilayer package using solder reflow, not a tape-type lead frame with finger leads, and it contains no thermode, no anvil, no contact-bump inner-lead bonding, and no step of bonding finger leads to a chip. The two "components" are a chip and two substrate layers, not two chips. There is no second integrated circuit chip whose pads cooperate with a second group of finger leads outside the periphery of the first chip.
• Residual relevance — the closest thing in the record to the recess limitation, but still short. The opening 18 in substrate 12 is a recess in a facing member that accommodates and protects a chip mounted on the other member, and the opening is expressly stated to be larger than the chip. This is the nearest structural analogue in the four references to the '157 patent's "thermode member having a recess in its surface accommodating said first bonded chip." But (a) it is an opening in an insulating substrate, not a recess in a heated bonding tool; (b) no bonding pressure is applied through it, because no bonding occurs there; and (c) it is entirely silent on the "so that no pressure is applied to said chip when bonding the second group" functional limitation that appears in all three claims.
• Note: the 1972‑12‑18 figure is reproduced from Google's priority-date column. A 3,777,xxx grant issued December 1973 more typically corresponds to an earlier (1970–71) original filing, so 1972‑12‑18 may be a continuation/priority date rather than the original application filing date. I could not confirm the underlying application filing date before exhausting my search steps — treat the precise filing date as unverified; it does not affect prior-art status, since either date precedes 1973‑12‑04 publication.

Citation 3 — US 4,283,839 A ⭐ (most relevant reference of record)

Full citation: US 4,283,839 A, "Method of bonding semiconductor devices to carrier tapes," Western Electric Co., Inc., priority/filing 1978‑07‑26, published 1981‑08‑18.

Description: A carrier tape is formed from a thin, delicate copper foil (typically 0.7 to 2.8 mils thick, 3/4 to 2½ ounces per square foot, annealed "dead soft" copper), optionally laminated to a polyimide film substrate. Etched into the foil is a cluster 24 of "inner leads" — described as "fingers which project toward the center of the cluster" — with free ends 36 projecting toward the center and opposite fixed ends 34 affixed to the tape margins 25 or medial planes 26. The specification states expressly: "In pattern 27 there are long leads 28 and short leads 30 disposed about a square, central opening or hole 38." The pattern is laid out symmetrically about centerline 23 so lead deformation is uniform. In inner lead bonding (FIG. 3), the tape is indexed until a cluster is centered over the active face 56 of chip 52, the free ends of the inner leads are precisely registered over the chip bonding pads 54, and a bonding tool 62 — which "also serves as a heating element for bonding, called a thermode" — moves downward through an opening 61 in guide 60 and compresses the free ends of the leads upon chip pads 54, using thermocompression. The chip is held on a carrier fixture 66 by a liquefiable adhesive 64. On tool withdrawal the leads deform into a four-cornered bell-like shape 51 called a "bug," with the chip riding horizontally, precisely centered in the lead cluster. The tape then indexes onward with the chip and bugged cluster attached; outer lead bonding subsequently transfers the device to a thicker lead frame, and the carrier tape becomes a scrapped skeleton. Stress-relief sites 39 are located symmetrically at the fixed lead ends.

§ 102 anticipation assessment:

• Claim 1 — NOT anticipated, but this is the closest reference in the record and it teaches several elements individually.
  Element-by-element:

  Claim 1 element	Disclosed by US 4,283,839?
  "providing a first integrated circuit chip having a plurality of contact pads situated on a surface"	Yes — chip 52 with bonding pads 54.
  "a length of said tape containing a plurality of said sites each having a first and a second group of finger leads, each finger lead having an inner free end"	Yes, literally — long leads 28 and short leads 30 in a cluster 24, free ends 36. This is the single strongest § 102 overlap in the entire record, because the '157 patent's FIG. 4 (long finger leads 24–34 vs. short finger leads 38–46) is the same two-length/ two-group finger-lead construct.
  "said tape having first and second opposed major surfaces"	Yes (foil on a film; two major surfaces).
  "bonding said inner free ends of said first group … to the corresponding contact pads on said first chip by compressing said finger leads and said chip between a heated thermode member and an anvil member"	Partially — tool 62 is expressly "called a thermode" and compresses the lead free ends onto pads 54 — but the chip is held on a carrier fixture 66 by adhesive 64, not an anvil, and the reference's scheme deliberately lets the leads bug upward.
  "such that contact bumps interconnect the chip contact pads to the first group of finger leads"	No — pads 54 are "thickened terminal[s] … part of the electronic circuit on the chip"; the disclosure is bump-less direct lead-to-pad thermocompression, not bumped TAB.
  "providing a second integrated circuit chip … that cooperate with the second group of finger leads to provide interconnection sites outside the periphery of the first integrated circuit"	No — entirely absent.
  "bonding … said second group … between a thermode member and an anvil member, said thermode member having a recess in its surface accommodating said first bonded chip so that no pressure is applied to said chip"	No — absent. This is the point of novelty.

• Claims 2 and 3 — not anticipated. Both require the same recessed-thermode limitation plus tape inversion (Claim 2) or spool inversion plus thermode substitution (Claim 3). US 4,283,839 indexes the loaded tape onward for outer lead bonding; it does not flip, re-reel-invert, or re-bond to a second chip at the same site.
• Summary for § 102: US 4,283,839 is the best § 103 primary reference and the closest thing in the record to a § 102 reference for the first-group bonding steps, but it does not disclose the recessed thermode, the second chip, or face-to-face two-chip bonding at one TAB site, so it cannot anticipate claims 1, 2, or 3 alone.

Citation 4 — US 4,371,912 A

Full citation: US 4,371,912 A, "Method of mounting interrelated components," Motorola, Inc., priority/filing 1980‑10‑01, published 1983‑02‑01. 14 claims.

Description: A double-sided assembly in which two complementary electronic components are mounted on both sides of one single insulating (ceramic) substrate. The substrate has conductive paths on both surfaces plus through-holes with paths running through them. Claim 1 recites: a leadless chip carrier smaller in area than the substrate, conductively fused (solder) to paths on one surface; a first electronic component smaller than the substrate, fused to paths on the other surface and "substantially overlying said leadless chip carrier"; and a plurality of leads affixed to paths on opposite surfaces near an edge. A first fixture positions the three elements for reflow soldering; a second fixture encloses and protects the components while the unit edges are exposed to fluxing and wave soldering. An additional interrelated component (e.g., a code plug) can then be mounted astraddle the substrate assembly with minimal lead lengths. Claim 5 recites a Read Only Memory chip carrier with a microprocessor; claim 8 recites microprocessor + ROM + code plug. The stated objective is "mounting two or three electronic components … in the space of one and more particularly … with minimal lead lengths and minimal substrate area," expressly to make interconnects shorter than the wire-bonded chip-on-both-sides approach of the prior co-pending application.

§ 102 anticipation assessment:

• Claims 1, 2, 3 — not anticipated. This reference is a ceramic-substrate, solder-reflow, leadless-chip-carrier assembly. It contains no tape-type lead frame, no finger leads, no thermode, no anvil, no contact bumps, and no tape automated bonding at all. Its "interconnection" is by solder fusing to substrate paths and through-holes.
• Residual relevance — § 103 only, and it is meaningful. US 4,371,912 supplies the motivation and general concept of placing two components in a face-to-face overlying relationship on opposite sides of a single common element, with interconnections routed in the space between them and with the express stated goals of minimizing substrate area and lead length. That maps onto the '157 patent's stated advantages ("double usage of both a bonding site of tape and the circuit board area") and onto the inter-chip connections made through finger leads 28/30 in FIG. 8. It also discloses a protective fixture that encloses already-mounted components while a subsequent operation (soldering) is performed on the assembly — conceptually parallel to the '157 recess protecting the first chip during the second bonding pass, though structurally unrelated.
• Summary for § 102: no anticipation of any claim; genuine § 103 secondary-reference value.

4. Consolidated § 102 conclusion

Result: none of the four references of record anticipates any of claims 1, 2, or 3, either alone or in the record as reproduced. Every claim contains two limitations that are absent from all four references:

1. A second IC chip bonded to a second group of finger leads at the same TAB site, with its contact pads/interconnection sites lying outside the periphery of the first bonded chip; and
2. A second-pass thermode having a recess in its surface that accommodates the already-bonded first chip, such that no pressure is applied to that chip during the second bond.

The closest any reference comes to limitation (2) is US 3,777,221's opening 18 in substrate 12 — a cut-out in a facing member that accommodates and protects a chip on the other member and is expressly larger than the chip — but it is not a thermode, is not used to apply pressure, and is not part of a bonding step. The closest any reference comes to the two-group finger-lead construct of the claims is US 4,283,839's express "long leads 28 and short leads 30" disposed about a central opening.

Ranking of § 102 (and § 103) significance of the references of record:

Most likely actual ground of rejection (for completeness, since § 102 fails): a pre-AIA § 103 combination of US 4,283,839 as primary (two lead groups at a TAB site; thermode compression bonding of inner lead free ends to chip pads; tape reeling/indexing) with US 4,371,912 as secondary (two components face-to-face on opposite sides of one common member, overlying, area- and lead-length-minimizing, with a protective fixture for the already-mounted component), and optionally US 3,777,221 (a facing member with an oversized opening accommodating a component on the other member) for the recess concept. The weakness of that obviousness case — and the reason the '157 patent issued over these four references — is that none of them teaches or suggests recessing the bonding thermode itself to shield an already-bonded device from the pressure of a subsequent bonding pass, and none of them is a bump-based TAB process. That is the heart of claims 1–3.

5. Other art that surfaced during searching (NOT of record — flagged for completeness)

These documents appeared in my searches because they are the same art neighborhood, but they are not among the four citations of record against US 4,585,157 and should not be represented as such. I could not fully verify bibliographic data for all of them before exhausting my search budget:

• US 4,069,916 — describes a tape with periodically spaced pedestals 34 where the thermode 28 "is seated during the bonding operation in a recess 67" formed by the pedestal. This is the closest thermode-in-recess disclosure I encountered anywhere, but the recess is formed in/relating to the tape pedestal, not formed in the thermode face to protect an already-bonded chip, and the document is not a reference of record. Bibliographic details (assignee/date) unverified — treat with caution.
• US 3,689,991 — pre-apertured insulating tape with a foil layer etched into sets of cantilevered leads registered to semiconductor pellet contacts and joined simultaneously; supplies general TAB background only. Assignee/date unverified.
• US 3,982,979 — Western Electric, "Methods for mounting an article on an adherent site on a substrate" (adhesive-site mass mounting). Background only. Assignee appears as Western Electric Company, Inc.; not of record.

If a definitive answer is needed on whether these were considered and why they were not cited, that would require the authenticated USPTO Patent Center file wrapper for application 06/719,987, which I could not query here.

6. Explicit confidence and limitation statement

• High confidence: the identity of US 4,585,157 and its four citations of record, and the substance of each cited reference as reproduced from Google Patents / Justia / FreePatentsOnline full text.
• Medium confidence: the exact priority/filing dates shown for US 3,777,221 (1972‑12‑18) and the Western Electric "compliant tape" family relationship between US 3,871,936 and US 3,785,903. Both flagged above and neither affects prior-art availability.
• Low confidence / unverified: the assignee and dates for the § 5 non-of-record documents.
• Not verified here: an authenticated USPTO Patent Center / PAIR "References Cited" listing, and a Westlaw/Lexis or PACER litigation check (the latter was covered as a negative finding in the prior section and is not re-run here).
• Consistency with prior sections: no contradiction found. The previously generated sections reported the same four references of record in the same order with the same dates, and the same "Expired – Fee Related / lapsed 1998" status. The only new discrepancy flagged in this section is the 2026‑04‑26 vs. 2026‑09‑24 date mismatch in the task framing.

I'll pull the four references of record from the "Prior Art" section of the patent page and gather their actual disclosures before applying § 103.

Now let me pull the two remaining references of record.

Let me verify the IBM reference and probe for any art teaching a recessed/pocketed bonding tool.

Obviousness Analysis — U.S. Patent No. 4,585,157 under 35 U.S.C. § 103

Patent: US 4,585,157 A — "Tape bonding of two integrated circuits into one tape frame"
Inventor: Stephen R. Belcher · App. No. US 06/719,987 · Filed/Priority: 1985‑04‑04 · Issued: 1986‑04‑29
Original assignee: General Motors Corporation · Claims: 3, all independent
References of record (examiner‑cited): US 3,871,936; US 3,777,221; US 4,283,839; US 4,371,912
Analysis date: 2026‑09‑24 (analyst), per instruction date 2026‑04‑26

0. Ground rules and a contradiction I was asked to flag

I treat all identifiers literally and do not auto‑correct them. Two housekeeping items before the analysis:

(a) Identifier contradiction between previously generated sections and the authoritative text. The previously generated Litigation summary (item 3) cites the IBM reference as "U.S. Patent No. 3,877,221 (IBM)." The authoritative full patent text fetched from https://patents.google.com/patent/US4585157/en lists the IBM reference as US3777221A ("Multi-layer circuit package," IBM, 1972‑12‑18 / 1973‑12‑04). These are different numbers (3,877,221 vs. 3,777,221). The previously generated Patent summary §1 correctly used 3,777,221. The Litigation summary's "3,877,221" is an error; the correct IBM reference of record is US 3,777,221. This is confirmed by my search: querying "US3877221" returns an unrelated "Combustion apparatus air supply" patent — an identifier collision, not the IBM package patent. I use US 3,777,221 throughout and cite it from https://patents.google.com/patent/US3777221A/ and https://SumoBrain.com/patents/us/Multi-layer-circuit-package/3777221.html.

(b) Evidentiary scope. The four references were retrieved as Google Patents "Definitions"/snippet extractions and FreePatentsOnline text (URLs given per reference). These are partial texts — the Google Patents "Definitions" panel is machine‑extracted and may omit passages. My disclosure characterizations are therefore stated at a level I can support from the retrieved text, and I flag the one element (the recessed thermode) where no retrieved passage is an express disclosure.

1. Legal framework applied

Under Graham v. John Deere Co., 383 U.S. 1 (1966), and KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398 (2007), I assess: (1) scope and content of the prior art; (2) differences between the prior art and the claims; (3) level of ordinary skill; and (4) secondary considerations. Under MPEP § 2143, a § 103 rejection is proper where the differences are such that the claimed subject matter as a whole would have been obvious, i.e., "the improvement is more than the predictable use of prior art elements according to their established functions" (KSR). The KSR‑approved rationales I apply are:

• (A) Combining prior‑art elements according to known methods to yield predictable results;
• (B) Simple substitution of one known element for another to obtain predictable results;
• (C) Use of a known technique to improve similar devices in the same way;
• (D) Applying a known technique to a known device ready for improvement, yielding predictable results;
• (E) "Obvious to try" — choosing from a finite number of identified, predictable solutions with a reasonable expectation of success;
• (F) Design incentives and market forces;
• (G) Express or inherent teaching, suggestion, or motivation in the references.

2. Level of ordinary skill in the art (POSITA)

A POSITA as of April 1985 would have been a packaging/assembly engineer with a B.S. in electrical or mechanical engineering (or equivalent) and 2–4 years of hands‑on experience with tape automated bonding (TAB), thermocompression/thermosonic inner‑lead bonding, lead‑frame handling, and hybrid/multi‑chip packaging. Such a person would be familiar with compliant bonding, foil lead frames <0.5 mm thick, sprocketed tape indexing, and the economics of per‑site testing. The patent's own specification confirms this level: it recites standard TAB practice, a commercially available tape (0.0028 in., 2 oz., 3M), and standard bump metallurgy without explanation.

3. Scope and content of the prior art of record

Common field / analogous art: All four are in the semiconductor packaging, tape‑carrier, or thermal‑compression bonding arts; three of the four (’936, ’839, ’221) are classified in semiconductor packaging classes and two (’936, ’839) share a common assignee (Western Electric) and a common technical lineage (compliant bonding / TAB). This is a classic "same field of endeavor" and "reasonably pertinent to the problem" prior art set under In re Bigio / In re Clay.

4. What the claims require, and where each reference falls short

4.1 Claim chart — Claim 1 (representative of all three claims)

4.2 The precise differences (Graham factor 2)

The only two limitations of Claim 1 not expressly met by any single reference are:

1. Splitting a single TAB site's finger leads into two groups bonded to two different chips in two passes, with the second group's interconnection sites outside the first chip's periphery (’839 teaches two lengths of leads at one site but bonds both to one chip); and
2. A recess in the (heated) thermode that accommodates the already‑bonded chip so no pressure is applied to it (’912 teaches a recess in a fixture for positioning during reflow; no reference retrieved shows a recession in a thermode).

Claims 2 and 3 add only machine‑handling steps — flip the tape and use a second inner‑lead bonder (Claim 2); or reel onto a spool, invert the spool, swap thermodes within the same bonder, and unreel (Claim 3). Every one of those handling steps is disclosed in ’839 (tape indexes with chip attached) and ’936 (chip‑loaded tape reeled onto take‑up reel 32, reel removed and taken to a bonding machine).

No single reference anticipates any claim (no § 102 ground). The question is purely § 103.

5. The § 103 combinations and the motivation to combine

Combination I — Primary: US 4,283,839 in view of US 4,371,912

Rationale categories: (A), (C), (D), (F), (G).

• ’839 supplies every mechanical element of the TAB half of the claim: a single tape site having two groups of finger leads of different lengths (28 long / 30 short at one cluster), inner free ends 36, contact‑bump bonding to chip pads by a heated thermode 62 compressed against a backing member, and — critically — the teaching that the tape with the chip attached can be indexed onward ("the tape 20 then indexes to the right with the chip 52 and bugged lead cluster 51 attached thereto").
• ’912 supplies the "two components in the footprint of one, face‑to‑face, joined in one heated operation, using a recess to hold one component" concept, and supplies it with a stated object that is verbatim the ’157 patent's stated advantage: mounting "two or three electronic components … in the space of one," with "minimal substrate area." The ’157 patent's own advantage statement — "allowing the double usage of both a bonding site of tape and the circuit board area" — is the same design incentive. Motivation under (F) is therefore not merely available; it is explicit in the prior art and admitted in the specification as the problem to be solved.
• Why a POSITA would combine: The ’157 patent frames its problem as cost: "The cost of inspecting and testing a single integrated circuit chip at a site of lead frame is a significant portion of the manufacturing cost, as well as the chip mounting cost." ’912 is directed at exactly that class of cost — component count, substrate area, and connection length. A POSITA seeking to reduce TAB per‑site cost had a finite, identified set of options: (i) shrink the chip, (ii) increase sites per tape length, or (iii) put two chips at one site. Option (iii) was known and its benefits (area doubling, single test step, shorter interconnects) were predictable — ’912's own specification describes short interconnects as a benefit of overlying components.
• Recess element (the crux): ’912's fixture has a bottomless recess 20 with supporting posts 22 for the ROM, a second recess 24 with posts 26 and alignment pins 28 for the substrate, and a central aperture 34 for "receiving and positioning" the microprocessor. A POSITA using a heated tool to compress a tape against a chip that already carries a second, upward‑facing chip has an immediately apparent mechanical problem: the tool face cannot contact the first chip without crushing it or its bonds. The predictable, conventional engineering answer — well within the skill level and expressly used in ’912's own fixture for precisely the same purpose (holding one component while another is joined) — is to relieve the tool face where the first chip sits, i.e., provide a recess. The claimed functional consequence ("no pressure is applied to said chip") is inherent in any tool face that does not contact the chip. Under (A)/(B), providing a relief recess in a bonding tool is the predictable use of a known element (a recess that receives a component) for its established function (positioning/protecting the component during a heated joining step). KSR forecloses the argument that a new motivation is needed: "if a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious."

Result: Claim 1 would have been obvious over ’839 + ’912, with the strongest (but, I judge, ultimately unavailing) counter‑argument being that no reference speaks of a recess in a thermode specifically.

Combination II — US 4,283,839 + US 4,371,912 + US 3,777,221 (reinforcing the face‑to‑face element and the "outside the periphery" element)

Rationale categories: (A), (C), (G).

’221 independently teaches, in a packaging context squarely analogous to TAB, the exact geometry Claim 1 requires:

• Two members face‑to‑face with devices mounted on the facing surfaces (signal planes 11a/12a "arranged face‑to‑face");
• An aperture in the overlying member that is larger than the chip ("Substrate 12 is formed with a plurality of openings 18 which expose mounting sites for electrical devices such as integrated circuit chips 19"; "an opening in alignment with each chip site that is larger than the chip"), so the chip's surroundings remain accessible and outside the chip's periphery — which is precisely limitation (d);
• The overlying member physically protects the chips during handling — the same passivation/handling concern Belcher addresses with his optional silicone‑elastomer coating (FIG. 3);
• Interconnections between facing planes at selected points — supporting the ’157 inter‑chip interconnect feature (FIG. 8, leads 28/30 connecting bump pads 60→62 and 64→66).

’221 supplies independent, third‑reference evidence of the design trend toward face‑to‑face stacked active devices with an apertured over‑member. A POSITA combining ’839 (TAB tooling) with ’912 (two components in one footprint) and ’221 (face‑to‑face, apertured, protected) would arrive at a two‑chip, one‑site TAB assembly with a very high expectation of success, because each constituent step — bonding finger leads to bumps, and stacking two chips face‑to‑face — was individually known and predictable.

Combination III — Claims 2 and 3 specifically: + US 3,871,936

Rationale categories: (A), (C), (D), (E), (F).

• Claim 2 (flip the tape; feed it upside‑down through a second inner lead bonder having a recessed thermode): ’839 already teaches that the tape indexes onward carrying the chip; ’912 teaches joining two components in a single fixture; putting the chip‑bearing tape into a second bonder in inverted orientation is a routine rearrangement of known apparatus, i.e., mere change in the order/position of steps with no new result (MPEP § 2144.04 — rearrangement of steps, duplication of parts). The result (bonding the second lead group to the second chip without pressing the first chip) is exactly the result already achieved in Claim 1.
• Claim 3 (reel the tape onto a spool mounted in the bonder; turn the spool upside down and remount; replace the first thermode with a recessed second thermode; unreel): ’936 explicitly discloses reeling chip‑loaded compliant tape onto a take‑up reel 32, removing the full reel, and taking it to a bonding machine. The ’936 text also identifies and addresses the very problem the ’157 spec addresses — that reeling a tape carrying mounted devices stresses them, which Belcher solves with "a protective film in between." Thus the reel‑store‑transport‑re‑bond workflow of Claim 3 was established practice, and the "turn the reel over" step is the trivial corollary of a workflow that already required unloading the reel and refeeding the tape. Motivation (G) is express in ’936; rationale (C)/(D) applies because the same technique (reeling TAB tape with attached devices) is used to improve the same type of device (a chip‑carrying TAB tape) in the same way.

6. Why the "obviousness as a whole" case is strong (the admitted problem)

The § 103 case is unusually well supported because the patent itself supplies the motivation and concedes that the problem was known:

1. Admitted problem: "the high cost of mounting and testing of a chip at a single site on the tape provides a hindrance to the widespread implementation of this process into production."
2. Stated objects are framed as cost/throughput: more cost‑efficient mass production; two chips bonded per site; both chips tested "in one operating step"; and doing it "by using one inner lead bonder machine." Each of these maps directly onto a known prior‑art capability (’839's single thermode operation; ’912's single heated joining step; ’936's single reel/re‑feed workflow).
3. No asserted unexpected result. The specification claims "no performance losses" ("two integrated circuits can be attached with no performance losses") — i.e., the results are expressly asserted to be predictable. Under KSR, an assertion of predictably equivalent performance is the opposite of a showing of unexpected results.

7. Best counter‑arguments and my assessment

8. Claim‑by‑claim conclusion

Net assessment: Claims 1–3 of US 4,585,157 would likely have been rejected under § 103 on these four references had the KSR standard been applied, principally on the ’839‑based combinations with ’912 and ’221, with ’936 supplying the reel/handling steps of Claims 2 and 3. The single most defensible non‑obviousness position is concentrated in the phrase "thermode member having a recess in its surface accommodating said first bonded chip" (Claim 1), (Claim 2), (Claim 3) — and even that position is weak under KSR rationale (A)/(B) given ’912's recessed joining fixture and the inherent nature of the claimed functional result.

9. Confidence, limitations, and what would firm this up

• High confidence in the citation set and identifiers: the four references are taken from the patent page's "Patent Citations" table at https://patents.google.com/patent/US4585157/en.
• Moderate confidence in my disclosure characterizations: I read Google Patents machine‑extracted "Definitions" text, FreePatentsOnline text, and SumoBrain text, not the full column/line‑numbered specifications. Before a formal § 103 rejection is written, the following should be verified against the printed documents:
  1. ’839, FIG. 2 and col. — confirm the express "long leads 28 and short leads 30" language and the thermode/anvil roles (I have direct text: https://FreePatentsOnline.com/4283839.html).
  2. ’912, col. line cites for the bottomless recess 20, the second recess 24, and aperture 34 "for receiving and positioning the microprocessor 12" — these are the recess‑element cites and must be page‑and‑line specific (https://patents.google.com/patent/US4371912A/en).
  3. ’221, claim/line cites for "an opening in alignment with each chip site that is larger than the chip" and "signal planes … arranged face‑to‑face" (https://patents.google.com/patent/US3777221A/).
  4. ’936, line cites for take‑up reel 32 and the reeling‑damage passage (https://patentimages.storage.googleapis.com/4d/ac/4c/98dce240d89d4e/US3871936.pdf).
• Explicit uncertainty: I was not able to complete a search for additional art directed specifically to a recessed/cavity‑bearing bonding thermode (the tool‑call budget was exhausted). Given that the recessed thermode is the load‑bearing distinction, such art — a thermode, bonding head, or anvil with a chip‑receiving cavity, or a TAB "second‑bond"/stacked‑die gang‑bonding tool — would materially strengthen the § 103 case, and I flag its existence as unverified rather than confirmed.
• No § 102 ground is available on any of the four references individually; each fails at least one claim limitation (principally the "second group of finger leads to a second chip" and "recessed thermode"). The case is a § 103 case, not a § 102 case.
• I have not re‑verified the "Motors Liquidation Co" ownership annotation; per the previously generated summary, that is a low‑confidence automated annotation. It does not affect the § 103 analysis.