US 12494262

Patent Overview: US 12494262 B2

Title: Multi-mode memory subsystem including control and data modules for buffering and testing

Assignee: Netlist Inc (current and original assignee)

Key dates: Priority date 2008-04-14; application number US18/402,549; filing date 2024-01-02; granted/publication of US12494262B2 on 2025-12-09; anticipated expiration 2029-04-13; legal status listed as Active.

Purpose: The patent addresses testing of electronic memory modules. It notes that memory chips undergo repeated testing during manufacture and at system boot, producing substantial test cost and time. Certain prior approaches (e.g., MBIST logic embedded in an advanced memory buffer on a memory module) are described as difficult to implement across multiple chips, limited in data width, inflexible to changes in module data width, and generally capable only of reporting pass/fail status.

Plain-language scope: The disclosure describes a self-testing memory module (e.g., an RDIMM populated with memory devices such as ETT DRAM chips) that operates in multiple modes. It comprises memory devices on a printed circuit board, a control module that generates address and control signals for testing, and a data module having multiple independently operable data handlers, each coupled to data ports of one or more memory devices and configured to generate write data. In a first mode, the module propagates data between the memory devices and the system memory controller at a memory access speed. In a second (self-test) mode, the data module outputs data signals to memory devices not accessed for normal read/write operations and receives data signals back, with the second data signals generated at the same memory access speed and having signal characteristics corresponding to data signals received during the first mode. The module may be configured through and read out via an I²C interface, and certain embodiments can be tested at target system speed without external test equipment.

Source: https://patents.google.com/patent/US12494262/en

What the excerpt does not establish: It does not establish the full claim scope, the complete specification or figures, the exact test algorithms, or any legal conclusions regarding validity, enforceability, or infringement. It also does not verify the accuracy of the listed assignee, dates, or legal status.