US 11126487

I'll search for authoritative information on this patent, including any litigation activity.

Let me run a couple more targeted searches to check for any litigation or assignment records specific to this number.

Let me attempt to locate the verbatim claim text, since the fetched document did not include a claims section.

Search Results Summary — US Patent 11,126,487

Important caveats up front:

1. Litigation search: no results. I searched for this specific number against USPTO/PTAB materials and Federal Circuit 2026 dockets. No CAFC appeal, PTAB proceeding (IPR/PGR), or district-court case tied to patent 11,126,487 surfaced. The apparent "hits" for the digit string 11126487 were unrelated — e.g., an SEC EDGAR accession/filing identifier for International Rectifier Corporation (an SEC Form 8-K from 2003), and the PGR snippet mentioning an '087 patent refers to a Netlist patent (a different patent whose last three digits coincidentally match). I did not find any authoritative 2026 litigation activity. Treat this as "nothing found," not as affirmative proof of non-litigation.

2. Verbatim claims not available. The authoritative document I retrieved (Google Patents full text) contains the specification, abstract, and the "Solution to Problem" section, but not the numbered claims section. The claim overview below is therefore reconstructed from (a) the "Solution to Problem" summary, which mirrors independent claim 1, and (b) the detailed-description figure/reference-numeral mapping. It is a faithful paraphrase, not the literal claim language. I would need the claims section directly to quote the exact scope.

Bibliographic Data (from the authoritative record)

Abstract (as published)

A clock value converter in a CPU replaces a value of a carry counter in a safety clock in the CPU to cause the carry counter to show dispersed values. The CPU transmits a frame including a value of a time stamp and a first error detecting code generated based on the value of the time stamp and the value of the carry counter to a CPU. A clock value converter in the CPU causes, as in the CPU, a carry counter in a safety clock in the CPU to show dispersed values. An error detector in the CPU determines whether a second error detecting code generated based on the value of the received time stamp and a value of the carry counter in the safety clock in the CPU satisfies a condition set for the first error detecting code.

Plain-Language Overview of the Independent Claims

Sole independent claim (system claim, per the "Solution to Problem" recitation):

A communication system with a first and second communication device that talk to each other, where:

• The first device's clock has two counters: a first counter that counts elapsed time (the "time stamp," ref. 1111) and a second counter that counts overflows of the first counter (the "carry counter," ref. 1112).
• The first device's data-conversion unit replaces the value of the overflow/carry counter with a value generated at predetermined timing using a predetermined method — deliberately making the carry counter's values dispersed rather than clustered near one initial value.
• The first device's error-detecting unit generates a first error-detecting code (a CRC) computed over the time-stamp value and the (converted) carry-counter value.
• The first device's communicator builds a frame containing the payload data plus the time-stamp value and the first error-detecting code, and sends it to the second device.
• The second device's clock mirrors the first: a third counter (time stamp) and a fourth counter (carry counter), with a data-conversion unit applying the same predetermined timing and method so the scattered values stay in sync.
• The second device's communicator receives the frame, and its error-detecting unit generates a second error-detecting code from the received time-stamp value and the local fourth-counter value, then checks whether that second code satisfies the condition set for the first code (i.e., whether the CRCr matches the CRCs received in the frame).

What it means in practice: The invention targets a functional-safety (IEC 61784-3) problem. Traditionally, the "carry counter" that tracks time-stamp overflows almost never changes, so it sits at (or near) its initial value with very high probability; because residual-error-rate calculations are driven by the probability of frequently-occurring values, this predictable counter inflates the residual error rate. The patent forces both endpoints to scramble/shift/randomize the carry counter at predetermined synchronized times, so its values are spread out — lowering the residual error rate — while the two clocks remain bit-for-bit matched so CRCs still validate at the receiver.

Dependent/embodied variations described (likely claimed in dependent claims):

• Embodiment 1 — bit shift: The carry counter is converted by cyclically shifting specified bits (e.g., cyclically right-shifting the upper 24 bits by 8 bits). Low processing load.
• Embodiment 2 — scrambling area / random numbers: A dedicated "scrambling area" (ref. 1113, e.g., 24 upper bits) is overwritten with random numbers from a seeded, deterministic generator (same algorithm + same seed on both ends) so identical values are produced. Higher dispersion, higher CPU load.
• Embodiment 3 — master/slave notification: A master PLC notifies slave PLCs of the conversion method and timing via a frame containing a specific "data conversion command"; slaves reply whether they can perform the conversion (declining if the interval is too short or the algorithm is unavailable) — enabling method selection based on device throughput.
• Embodiment 4 — single timing device with converted-data storage: The master keeps only one safety clock and maintains a converted-data storage (ref. 118) holding the per-counterpart converted values, using those instead of the local carry counter for CRC generation — reducing the master's hardware cost.

Also disclosed (not necessarily claimed): an offset-time arrival check (whether the received time stamp + offset is earlier than the current local clock) to validate that data arrived within the expected window, with frames discarded on CRC mismatch or late arrival; and a computer-readable recording medium aspect for the programs implementing the conversion.

Confidence / Uncertainty Statement

• Bibliographic fields (title, assignee, inventor, dates, application numbers, classification, cited art) come from the authoritative Google Patents record for US11126487B2 and I regard them as reliable.
• The abstract is quoted from the authoritative record.
• The claim overview is inferential — the fetched document did not include the numbered claims, so the exact wording, count, and dependency structure of the claims are unverified. If you need the literal claim set, I should pull the claims section directly from the USPTO PatentCenter/Patent Public Search record or the granted patent PDF.
• No litigation, PTAB, or CAFC activity specific to 11,126,487 was found. This should be read as "not located in the searches performed," not as an authoritative all-courts negative.

I'll search for litigation involving US patent 11126487 across patent litigation databases.

Let me search more targeted litigation databases for this specific patent.

Let me try more specific litigation database searches.

Litigation Search Results: US Patent No. 11,126,487

No litigation or adversarial proceedings involving US Patent No. 11,126,487 were found.

I searched for this specific patent number across patent-litigation aggregators and general web sources (including references to the Unified Patents litigation portal, Docket Alarm, CourtListener/PACER-style records, and CAFC/PTAB materials). The searches returned no complaint, district-court case, ITC action, PTAB proceeding (IPR/PGR), or Federal Circuit appeal that identifies US 11,126,487 as an asserted or challenged patent.

Details of the search

• Exact-number queries (e.g., "11126487", "11,126,487") returned only unrelated documents — patents with similar but different numbers (e.g., US 7,286,407; US 10,326,987; US 11,122,274; the Mullen Industries v. Apple patents such as 11,109,218 / 11,246,024; and unrelated copyright cases). Per your instruction, I did not treat these similar-number results as matches.
• Assignee-focused queries (Mitsubishi Electric) returned only prosecution/classification documents and unrelated Mitsubishi patent-family materials — no infringement suits.

Summary table

Caveats and confidence

• Confidence: moderate-to-high that no public, indexed US litigation exists. This patent issued on 2021-09-21 to Mitsubishi Electric Corp. (inventor Naoki Ito), a large operating company that generally enforces via licensing rather than frequent public infringement suits. Its subject matter (a "safety clock" counter/CRC error-detection scheme for functional-safety PLC communication) further reduces the likelihood of NPE-style assertion.
• Limitations of this search: I was unable to query paywalled subscription databases (e.g., LexisNexis Docket Navigator, Westlaw Litigation Analytics, full PACER) directly within the allowed search steps, and my queries hit the tool's step limit. A definitive "no litigation" conclusion would require a direct docket search on PACER, Unified Patents' litigation portal (https://portal.unifiedpatents.com/litigation/caselist), Docket Alarm, and CourtListener's RECAP specifically for patent 11,126,487.
• Foreign (non-US) proceedings — e.g., in Japan or Europe based on the PCT/JP2018/033097 family — were not assessed here and could exist.

Bottom line: Based on the sources I could reach, there is no known litigation involving US Patent 11,126,487. If you need a court-admissible negative finding, I recommend a direct PACER/Docket Navigator check, which I could not fully execute within this session's limits.

I'll verify the structured data against public sources before reporting.

Let me run a few more targeted checks before concluding.

Proceedings overview

Total AIA trial proceedings on file for US 11,126,487: 0 (zero). Breakdown by status is inapplicable — there are no active proceedings, no claims invalidated, no claims sustained, no settlements, and no institution denials, because no petition has ever been filed and no trial has ever been instituted. Per the structured "PTAB proceedings on file" block sourced from the USPTO Open Data Portal (ODP), the AIA trial record for this patent is empty as of the most recent ingest, and I found nothing to the contrary in public web sources. Bottom-line defensive posture: the patent is completely untested at the PTAB. There is no FWD, no estoppel, and no claim-level invalidity record to leverage — but equally, no procedural history shielding the patent owner. A defendant today is writing on a blank slate.

No proceedings to report

I looked for a proceeding matching this patent's number and confirmed the absence rather than assuming it:

• Structured source (canonical): The "PTAB proceedings on file" block in this prompt reports no AIA trial proceedings for US 11,126,487 as of the most recent USPTO ODP ingest.
• Web verification: Targeted searches for US11126487 PTAB IPR, "11126487" patent AIA trial proceeding petition, and IPR-number-plus-patent-owner combinations surfaced no petition, institution decision, FWD, or CAFC appeal naming this patent. The PTAB hits that did return (e.g., IPR2017-01587 on U.S. 9,149,626; IPR2016-00452 on U.S. 8,147,709; IPR2017-00263/00264 on U.S. 9,936,758) are unrelated patents and unrelated parties — not this patent, and I am not importing them as if they were.
• No fabricated identifiers: Because no proceeding exists, I have not invented an IPR/PGR/CBM number. Any number presented here would be a fabrication, which the task constraints prohibit.

I note one limitation explicitly: my searches did not directly return a PTAB E2E / Patent Trial and Appeal Board End-to-End search result page for 11,126,487, and I could not retrieve the PTAB E2E docket directly in this session. The ODP block remains the authoritative source, and its answer is zero. If you need certainty beyond the ingest date, the definitive check is a party-name query against PTAB E2E (https://ptacts.uspto.gov/ptacts/) for "Mitsubishi Electric" and the patent number, plus the Patent Office's Patent Public Search "PTAB" collections.

Patent context relevant to the absence

A few facts about US 11,126,487 bear on why no IPR has appeared:

• Owner: Mitsubishi Electric Corporation (assignment recorded 2021-03-09; inventor Naoki Itō). This is a large, sophisticated operating company — a patent asserted by or against such a company tends to attract petitions, so its absence is mildly informative, not merely an artifact of a low-profile owner.
• Prosecution route: The patent is a § 371 national-stage entry of PCT/JP2018/033097, filed 2018-09-06, granted 2021-09-21, with anticipated expiration 2038-09-06. Its entire ~20-year term remains ahead of it, meaning the window for future IPR/PGR filings is wide open.
• Subject matter: Functional-safety communication between programmable logic controllers, in which a carry counter that tallies overflows of a time stamp is deliberately rewritten (bit-shifted in Embodiment 1; replaced with seeded random values in Embodiment 2) so the counter shows dispersed values, thereby lowering the residual error rate under IEC 61784-3. Independent claim 1 (as recited in the abstract and "Solution to Problem") is a system claim covering both a first and second communication device with paired counters, conversion means, and error-detection means. The prior art relied on is a single Japanese publication, JP 2003-298563 (Patent Literature 1).

Strategic summary

Claim status: entirely UNTESTED. No claim of US 11,126,487 has been canceled, confirmed, or even challenged at the PTAB. There is no FWD to cite, no certificate of cancellation, and no surviving-claim list — the patent stands exactly as issued. Practically, this means the full claim set (the system claim recited in the abstract plus its dependents) is intact and available to the patent owner in any dispute. If you are a defendant, do not assume any claim is weak just because the art cited in the specification is thin; conversely, do not assume the claims are strong just because nobody has attacked them. The invalidity merits have never been adjudicated by the Board.

Estoppel landscape: no estoppel exists. Because no IPR/PGR was ever instituted, 35 U.S.C. § 315(e)(2) estoppel has never attached to any party and no petitioner (or privy) is barred from raising anything. For a defendant currently facing assertion of this patent, every prior-art ground is available — § 102 and § 103 challenges in district court, an IPR petition, an ex parte reexam, or a PGR within the statutory window. Nothing has been burned. The flip side: if you file an IPR and lose, you will be the one who creates the estoppel, and you will have given the patent owner an institution-stage win to cite later. That is a reason to build the petition carefully rather than reflexively.

Pattern signals: none to read. There is no serial petitioner (no party has filed even one IPR on this patent), no PTAB-appeal track record for the owner on this patent, and no defensive aggregator (e.g., Unified Patents) in the chain. There is also no parallel litigation I could identify that would explain a pending-but-unindexed petition — no district court docket surfaced tying this patent to an infringement campaign. The absence of a defensive-aggregator filing is itself notable: such entities typically target patents with active assertion campaigns, and nothing here indicates one exists yet. If a demand letter citing this patent crosses your desk, that campaign may be new, and the PTAB record (empty today) can be expected to change if the assertion escalates.

Recommended next steps

• There is no FWD to link to, and no claims to quote as cancelled. I will not manufacture a disposition. If a counterparty tells you "claims 1–5 were invalidated" or similar, treat it as false until they produce an IPR/PGR number and FWD — no such record exists for US 11,126,487.
• Re-verify at the source before relying on this. Query PTAB E2E (https://ptacts.uspto.gov/ptacts/) and the Office's Patent Public Search PTAB collections by patent number and by "Mitsubishi Electric." The ODP ingest that produced the structured block can lag; a recently filed petition may not yet be indexed. If you find one, the analysis above flips immediately.
• If you are considering filing an IPR: the § 315(b) one-year clock runs from service of a complaint alleging infringement, so calendar it the moment you are served. Once instituted, the trial carries a statutory one-year deadline from institution to FWD (35 U.S.C. § 316(a)(11)), with the institution decision due within six months of the petition's filing (§ 314(b)). Because the patent is entirely untested, there is no § 325(d) "substantially the same prior art" risk from a prior Board proceeding, and no FWD reasoning you must out-argue.
• If you are the patent owner: the clean PTAB record means the preservation/§ 315(e) equities are still fully available to you, and there is no adverse claim-construction or validity ruling to manage. Expect that asserting this patent will invite the first petition and start a clock you currently do not have to run.

Sources consulted: the USPTO ODP "PTAB proceedings on file" structured block (canonical); Google Patents page for US11126487B2 (https://patents.google.com/patent/US11126487/en); PTAB E2E public information pages (https://ptacts.uspto.gov/ptacts/). No proceeding, opinion, or appeal specific to US 11,126,487 was located.

I'll research the assignment record for US 11126487 before building the analysis.

Assignment & Ownership Analysis — US 11126487

Verification note up front: I could not retrieve the Assignment Center reel/frame detail page or the correspondent-of-record for this patent through the sources available to me in this session. The USPTO Assignment Center search interface (https://assignmentcenter.uspto.gov/ / https://assignment.uspto.gov/patent/index.html) is the authoritative source and should be re-queried directly. Everything below is grounded in the authoritative patent text (including its embedded Google Patents legal-events block) and corroborating public indexes. I do not fabricate reel/frame numbers, execution dates, or correspondent names — where a datum was not obtainable, I say so.

Inventors

Pattern assessment:

• No departure signal. Naoki Ito continues to appear as a Mitsubishi Electric-originated filer well after the 2018 filing date (e.g., US20220222187A1 "Controller," priority 2019-12-05). There is no evidence of inventors exiting the original assignee.
• Name-collision caveat (important). "Naoki Ito" is a very common Japanese name, and public inventor profiles mix several distinct people (e.g., patents-review.com's "Naoki Ito — Tokyo, JP" profile interleaves endoscope, printer, road-boundary-detection, and rotor-manufacturing filings that are clearly different individuals or at least different technical units). The assignment record ties this Ito to Mitsubishi Electric via application 17/272,351; do not assume identity with other Naoki Ito filings.
• Single-inventor patent — no co-inventor coordination or split-assignment issues.

Original assignee

Mitsubishi Electric Corporation — 7-3, Marunouchi 2-chome, Chiyoda-ku, Tokyo 100-8310, Japan (address per its EP/JP family records).

• Status: Operating public company (Tokyo Stock Exchange, code 6503). Not acquired, not dissolved, not in bankruptcy.
• Primary line of business: Electrical/electronic equipment manufacturing — factory automation (MELSEC programmable logic controllers), power systems, building systems, transportation systems, satellite and defense electronics, semiconductors. This is a genuine operating industrial, not a holding vehicle.
• Product embodiment: The patent is directed to a safety clock (time stamp + carry counter) used for functional-safety communication between programmable logic controllers, per IEC 61784-3. This maps squarely onto Mitsubishi's MELSEC PLC / safety-CPU / industrial-network product line, which is the company's core business. I state this as consistent with Mitsubishi's shipped product line based on the patent's own description of "programmable logic controllers 1 and 2 ... network unit 200"; I did not independently verify a specific shipping SKU that reads on the claims.
• Applicant/prosecution posture: The US case is a national-stage entry of PCT/JP2018/033097 (filed 2018-09-06). Mitsubishi Electric is both original applicant and current assignee — i.e., the patent has never left the originating operating company.

Assignment timeline

One recorded assignment exists on the US side (inventor → employer). No post-issuance transfers were found.

• executed date: not surfaced / recorded 2021-03-09 — Reel not obtained (Assignment Center detail page not retrievable this session)
  • Conveyance: Assignment (Google Patents legal events label: "ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS)")
  • Assignor: ITO, NAOKI
  • Assignee: MITSUBISHI ELECTRIC CORPORATION
  • Correspondent: not obtained. This is the single most important missing datum for the NPE screen — see §3 below. It should be read off the reel/frame at Assignment Center.
  • Context: Internal — routine inventor-to-employer assignment perfecting title for the PCT national-stage entry; not an acquisition, fire-sale, or third-party transfer.

Surrounding prosecution/legal events (Google Patents, non-assignment):

Family note (for completeness, not US assignments): The same subject matter appears as a Mitsubishi Electric-owned PCT/JP family; the AU/CN/EP equivalents surfaced in search are all still in Mitsubishi Electric's name. Consistent with a wholly-owned, non-transferred portfolio asset.

Timeline diagram

timeline
    title Ownership of US 11126487
    2018 : PCT filed by Mitsubishi Electric
    2021 : Inventor assignment recorded
         : Patent granted to Mitsubishi Electric
    2038 : Anticipated expiration

NPE / troll-pattern signals

Aggregate: 0 strong signals, 0 weak signals confirmed, 1 unassessable (correspondent recurrence). The dominant substantive finding is the absence of any transfer: the patent sits with its original operating-company owner.

Verdict

Insufficient data (only the original assignment).

The chain consists of a single recorded event — the 2021-03-09 inventor→employer assignment of Naoki Ito's interest to Mitsubishi Electric Corporation — with no post-issuance transfer, no licensing-only LLC, no known asserter, and no litigation tie-in. The substantive takeaway is the inverse of an NPE finding: this is a wholly-owned operating-company patent that has never moved, so there is no NPE chain to reconstruct. The verdict is "insufficient data" rather than "operating-company assertion" only because (a) I could not confirm a shipping product reading on the claims, and (b) the correspondent of record remains unverified, which is the sole datum that would let Signal 3 be resolved definitively.

Verification link: run the patent-number query at the USPTO Assignment Center — https://assignmentcenter.uspto.gov/ (mirror: https://assignment.uspto.gov/patent/index.html) — and read the reel/frame plus correspondent for the 2021-03-09 recording to close the one open field.

Caveats: (1) The reel/frame, execution date, and correspondent were not obtainable through the sources available in this session and are deliberately left blank rather than estimated. (2) Maintained-status and "Active" legal status are as displayed by Google Patents and are not a legal conclusion. (3) Absence of a matching litigation or NPE-directory entry reflects the sources searched; it is not proof that no such record exists elsewhere.

I'll research US patent 11126487 and its cited prior art.

I have the patent's own disclosure and its one cited reference. Let me dig for the citation/references-cited list, which is what the question targets.

Let me try to surface the front-page "References Cited" section and any examiner citations directly.

1. Patent identified

US 11,126,487 B2 — "Communication system, communication device, and recording medium" (literal ID as requested: 11126487)

Source: https://patents.google.com/patent/US11126487/en (authoritative text supplied in the prompt); mirror at https://patents.justia.com/patent/11126487.

2. Method and an important limitation on this analysis

You asked me to examine each patent citation for 11,126,487. Two problems must be stated up front:

• The publication front page in the fetched record contains no "(56) References Cited" block. The Google Patents record I was able to retrieve lists classifications, family, and the description/claims, but not an examiner-cited U.S. references list. I could not retrieve the patent's full front page or USPTO PatentCenter/PAIR document images for application 17/272,351 in this session, and my follow-up queries for the citation list returned unrelated documents (see §5).
• The only reference that 11,126,487 itself identifies as prior art is one Japanese patent publication, listed in the specification's CITATION LIST.

So I can report one documented citation with confidence, and I will explicitly flag the rest as unverified rather than invent a list. I will not fabricate U.S. patent numbers.

3. Documented prior-art citation

Reference A — JP 2003-298563 A ("Patent Literature 1")

Full citation as given in the patent: Unexamined Japanese Patent Application Publication No. 2003-298563.

Brief description (as characterized by the patent's own Background Art): Perlines 0006–0007 of the description, Patent Literature 1 "describes a transmitter that transmits data with time information appended, and a receiver that compares the received time information with time information indicated by a clock included in the receiver." It is cited as the general teaching of appending a transmission timestamp and validating it at the receiver against a local clock — i.e., the delay/latency-detection architecture on which the present patent improves.

§ 102 anticipation analysis:

The reference is cited in the Background, not as an anticipatory reference, and its disclosure as summarized is narrower than every issued claim. Mapping to the granted claim set (text at https://patents.justia.com/patent/11126487):

Conclusion: JP 2003‑298563 does not anticipate any claim under § 102. At most it anticipates the isolated sub‑feature of appending/comparing time information that underlies claim 1 and claim 8. Its realistic role is § 103 background art (evidence that timestamped frames validated against a receiver clock were known, making the motivation to reduce residual error in that timestamp field obvious). § 102 of the carry-counter-dispersion limitation finds no support here.

4. Patent family / related documents (not prior art, but relevant context)

These are the same invention, not references against it:

• US 2021/0182138 A1 — U.S. pre-grant publication of the same application (https://patents.justia.com/patent/20210182138).
• The PCT parent, PCT/JP2018/033097 (filed 2018‑09‑06), which is the U.S. application's basis.

I could not confirm a WO publication number or a JP national-family member from the retrieved material, and I am not going to guess one.

5. Literal-ID collisions encountered (flagged per your strict rule)

Searches for the digit string 11126487 returned documents where "11126487" is part of a different serial/application number, not patent 11,126,487. These are not the subject patent and must not be auto-corrected into it:

1. EP 0265277 B1 "Differential Control Device" — INPADOC family page lists "US 11126487 A 19871022" and "JP 25206086 A 19861024." Here "US 11126487" is a 1987 U.S. application serial number (the document that issued as US 4,872,373 A, "Differential control device" — https://patents.google.com/patent/US4872373). Unrelated subject matter (vehicular differential control).
   Source: http://data.epo.org/gpi/EP0265277B1-DIFFERENTIAL-CONTROL-DEVICE.html
2. JPS6416734U — a Japanese utility model whose application number is JP 11126487U (filed 1987‑07‑20; published 1989‑01‑27; "switching power supply" subject matter). Source: https://patents.google.com/patent/JPS6416734U/

Both are literal matches of the digits but predate and are unrelated to Mitsubishi's US 11,126,487 B2.

6. Gaps, and what I could not verify (stated explicitly)

• The complete (56) References Cited list for US 11,126,487 B2 was not retrieved. I cannot confirm how many U.S. patent documents (if any) were cited by the examiner or listed by the applicant. My tooling returned no citation list for this patent; the three follow-up queries seeking it were cut off. Do not treat §3 as an exhaustive citation list.
• The bibliographic details of JP 2003‑298563 A (title, applicant/inventor, exact publication date) are not present in the U.S. specification, and I did not independently verify them. I have deliberately left those fields as "not verified" rather than filling them in.
• The full claim set of the grant: I could confirm claims 1–11 (system claims 1–10 in substance; claim 11 is an apparatus/"communication device" claim). Whether further method/program claims (e.g., 12–15) exist is unverified; the anticipating-reference analysis in §3 therefore addresses claims 1–11 only.

Recommendation for a definitive § 102/§ 103 study: pull the front page of the US 11,126,487 B2 grant and the file wrapper for application 17/272,351 from USPTO PatentCenter (links on the Google Patents record: USPTO PatentCenter and Assignment), plus the international search report / written opinion for PCT/JP2018/033097, to obtain the actual examiner-cited references. Those are the authoritative sources for the citation list, and I did not have them in this session.

I'll ground this analysis with searches on the cited prior art and related references.

Obviousness Analysis — U.S. Pat. No. 11,126,487 B2

Patent: US11126487B2 — "Communication system, communication device, and recording medium"
Application: US17/272,351 (national stage); PCT: PCT/JP2018/033097, filed 2018-09-06
Inventor: Naoki Ito · Assignee: Mitsubishi Electric Corporation
Effective filing date / priority: 2018-09-06 (AIA applies; 35 U.S.C. §§ 102(a)(1), (a)(2), 103)
Publication counterpart: US20210182138A1 · Granted: 2021-09-21 · Anticipated expiration: 2038-09-06
Source of record: https://patents.google.com/patent/[US11126487](/patent/US11126487)/en

1. Evidentiary scope and important limitations of this analysis

Two threshold caveats before the merits:

1. The claim set is not reproduced in the supplied page text. The page provides the abstract, the description, and the "Solution to Problem" / "Advantageous Effects" summaries, but not the numbered claims. The analysis below therefore treats the abstract/summary language as a faithful proxy for independent claim 1 (the summary wording tracks the abstract almost verbatim) and treats Embodiments 2–4 as representative of the dependent claims. This is an inference, not a verified claim reading. Any invalidity contention must be re-run against the actual claim text from the USPTO PatentCenter file wrapper.
2. The "Prior Art section" of this page contains only one listed reference and the applicant's own admissions. The "Citation List" on the page lists exactly one item — Patent Literature 1: Unexamined Japanese Patent Application Publication No. 2003-298563. The remainder of the Background Art is applicant-admitted prior art (the "known clock," FIGS. 4A/4B, 5A/5B) plus the IEC 61784-3 functional-safety standard. I attempted to retrieve the full text of JP 2003-298563 and the international search report for PCT/JP2018/033097; my searches did not return the document or the ISR, so I rely on the '487 specification's own characterization of Patent Literature 1 ("a transmitter that transmits data with time information appended, and a receiver that compares the received time information with time information indicated by a clock included in the receiver") and I flag that characterization as unverified. The ISR, and any art cited during US prosecution, would materially change the picture and should be pulled from the file wrapper.

2. The prior art of record / admitted prior art

Why the admissions matter. Under In re Nomiya and Riverwood Int'l v. R.A. Jones, statements in the specification describing the prior art are binding admissions usable as § 103 prior art. Assumptions 1–3 above are therefore available to an examiner without any documentary reference at all for everything except the generic content of PL1.

3. Person of ordinary skill in the art (POSITA)

A POSITA here is an engineer with a bachelor's degree in electrical/computer engineering (or equivalent) and 2–4 years of experience in industrial fieldbus / functional-safety communication (e.g., PROFIsafe, CIP Safety, openSAFETY) and embedded PLC firmware, familiar with IEC 61508/61784-3, CRC-based error detection, clock/timestamp design, and conventional data-scrambling (LFSR/PRBS) and bit-manipulation techniques.

4. Element-by-element analysis of the independent system claim

Using the paper's summary language as the claim proxy:

Note the architecture that makes the residual-error-rate problem arise in the first place: the carry-counter value is never transmitted. Only time stamp 1111 rides in the data body (page: "The data body includes data forwarded to the programmable logic controller 2 … and the value of the time stamp 1111"). The receiver reconstructs the sender's CRC using its own carry counter 1112. Hence, per the page's own reasoning, the residual error rate is a function of the probability that a particular carry-counter value occurs — which is exactly why the skewed distribution of FIGS. 5A/5B drives the error rate up. That causal chain is stated by the applicant, not by me.

5. Proposed § 103 combinations and the motivation to combine

Combination I (primary): AAPA-1/AAPA-2 + AAPA-3 (IEC 61784-3)

Rejection form: Claim 1 unpatentable under § 103 over the known safety clock admitted in the specification's Background Art in view of IEC 61784-3.

*Rationale under KSR:*

• Design incentive / market pressure (KSR rationale F): IEC 61784-3 imposes an allowable residual error rate per target safety level and prescribes how to compute it. A POSITA implementing a certified safety protocol has an explicit, standards-driven requirement to keep that number low. This is about as concrete a "reason to improve" as exists.
• The problem is identified by the standard itself (KSR rationale D — known technique applied to a known device ready for improvement): IEC 61784-3 "describes the use of the probability of occurrence of values that frequently occur in transmitted data for calculating the residual error rate." The skew of the carry counter is precisely a "specific value that occurs highly frequently." The applicant's own specification acknowledges that "the probability of occurrence of zero … is used for calculating the residual error rate."
• Predictable result (KSR rationale A/G): Flattening a value's occurrence distribution lowers its occurrence probability; lowering occurrence probability lowers the residual error rate computed by the standard's formula. The result is arithmetic, not emergent.

Strength: Moderate-to-strong. The weakness is that IEC 61784-3 is a standard, not an apparatus reference; it tells the skilled person what metric to optimize but does not itself teach rotating/scrambling a carry counter. So Combination I alone is best framed as establishing motivation, with the mechanism supplied by Combination II.

Combination II: Combination I + conventional data scrambling (LFSR/PRBS) and bit-rotation techniques

Rejection form: Claim 1 unpatentable over the admitted known clock in view of IEC 61784-3 and further in view of the well-known technique of scrambling/whitening digital data with a linear-feedback shift register or cyclic bit rotation.

Rationale:

• Scrambling data with a PRBS/LFSR to spread values, avoid long runs of like bits, and flatten the transmitted-symbol distribution is notoriously well-known in digital transmission — e.g., IEEE 802.3 Ethernet's 11-bit LFSR scrambler, and MPEG-2 Transport Stream "energy dispersal" (1 + x¹⁴ + x¹⁵ with a fixed seed). A POSITA would not need to be taught that a fixed, deterministic, seed-driven sequence can be reproduced identically at transmitter and receiver — that is the entire premise of self-synchronizing and additive scramblers.
• Simple substitution / use of a known technique to improve a similar device in the same way (KSR rationales A and C): substituting a cyclic byte rotation (the page's FIG. 6 method: "cyclic rightward shifting of upper 24 bits per 8 bits") or a seeded PRBS substitution (FIG. 11/13: scrambling area 1113, algorithm 2000, seed 3000) for a raw counter value is a straight substitution of a known value-diversification mechanism into a known data field.
• The "same method/same timing at both ends" limitation is a design constraint, not an inventive contribution. PL1 already requires the receiver's clock to track the transmitter's; within the '487 specification, the CPU 101 is required to store "data about the same conversion method" and "the same conversion timing." A POSITA who decides to diversify the carry counter would use the same deterministic transform on both sides as a matter of necessity — otherwise the two CRCs could never match.
• Byte-rotation / rotation-by-8-bits is also the archetypal endianness/word-rearrangement operation, further reinforcing that the claim's FIG. 6 technique is a predictable mechanical variation.

Strength: Strong. This is the combination most likely to be the heart of a real § 103 rejection.

Combination III: PL1 + AAPA-1/AAPA-2 (+ AAPA-3)

Rationale: PL1 teaches the full transmit/append/receive/compare loop that the '487 claim recites at the frame level, including a receiver-side clock used as the reference for a received time value. Adding a carry counter to the receiver's clock so that the receiver can independently regenerate a CRC over data + timestamp + carry counter is a simple substitution of one known element for another and an application of a known technique to a known device. In a safety context, a POSITA would look for any value that is (a) available at both ends and (b) not transmitted, since that is precisely the property that makes a corruption detectable — a classic design choice in the fieldbus safety art.

Strength: Moderate. PL1's page-described disclosure is about time information comparison (a delay check) rather than CRC verification, so PL1 alone does not reach the "error detecting code" limitation; it needs AAPA-3/-4.

Realistic primary rejection: Examiner will most likely deploy a profile/safety-protocol reference disclosing CRC-over-payload-plus-life-counter (the actual ISR art), rather than PL1, for the error-detection elements.

6. Representative dependent-claim combinations

7. Where a § 103 rejection would be vulnerable

Rebutting or narrowing arguments the applicant can be expected to raise, and how they fare:

1. "Change in the principle of operation" (In re Ratti). AAPA-1's stated principle is that carry counter 12 "can have a value representing the number of times the time stamp 11 overflows." Converting that counter arguably severs the counter from its meaning. Weak rebuttal for the applicant: the specification itself concedes the point — "the value of the carry counter 1112 is converted at predetermined timing, and thus does not strictly represent the number of times the time stamp 1111 overflows" — and time measurement is still performed entirely by time stamp 1111. No substantial reconstruction or redesign is needed; the counter's only claimed role is as CRC input. This defeats the Ratti framing.
2. "Teaching away." The known art teaches why the counter should monotonically count overflows; an applicant could argue this discourages destroying monotonicity. Counter: a teaching away requires a statement that the modification would not work or a criticism of the alternative — none is present in the admitted art.
3. "Unexpected results." The claimed benefit (dispersed counter values → lower residual error rate) is exactly the result a POSITA would predict from whitening a data field under a metric that is a probability-of-occurrence function. No objective evidence of unexpected results appears in the supplied page, and I have not identified commercial-success, licensing, or industry-praise evidence in the record. Absent such evidence, this argument likely fails.
4. Genuinely strong applicant position: the frame-side combination. If no reference of record teaches combining (i) a non-transmitted counter value, (ii) an error-detecting code computed over payload + transmitted timestamp + the receiver's own corresponding counter, and (iii) synchronized, identical stochastic conversion of that counter at both ends, the applicant can argue the references are being combined only by using the specification as a blueprint (impermissible hindsight under In re McLaughlin / KSR's warning). The strongest non-obviousness story here is the mutual, synchronized, receiver-side reconstruction of an untransmitted counter — not the scrambling itself, which is old.
5. Claim-scope caveat: if the granted independent claim recites specifics I could not see (e.g., particular timing tied to the clock increment, a specific "condition" test, or the specific "does not strictly represent the number of overflows" behavior), the analysis must be redone element-by-element.

8. Bottom line

• The overwhelming majority of the claim is admitted prior art. The 16-bit time-stamp / 32-bit carry-counter clock, the overflow-incremented carry counter, the frame carrying a timestamp, and the CRC as the error-detecting code are all presented on the page as known (FIGS. 4A/4B, 5A/5B) or as the practice of IEC 61784-3. The only feature with any colorable novelty is deliberately converting the carry counter into dispersed values at predetermined timing, identically at both ends, before feeding it into the CRC.
• That remaining feature is the subject of a concrete, standards-imposed design goal. IEC 61784-3 both sets the residual error rate target and prescribes computing it from the occurrence probability of frequently-occurring transmitted values. When the standard tells you the metric and identifies the driver (a value that "occurs highly frequently"), and a notoriously well-known whitening/rotation technique is available to flatten that distribution with a predictable statistical effect, the § 103 case is strong and rests on KSR rationales A, C, D, F, and G rather than on strict TSM.
• Most likely form of a real rejection: a functional-safety fieldbus reference disclosing CRC-over-payload + life/timestamp counter, in view of art disclosing seeded value-scrambling or cyclic bit-shifting of counter/sequence values, with the admitted known clock and IEC 61784-3 supplying motivation. My best independent contribution is AAPA (FIGS. 4A–7) + IEC 61784-3 + conventional LFSR/PRBS or cyclic-rotation scrambling.
• Verification gaps I could not close: (a) the actual claim set is absent from the supplied page; (b) JP 2003-298563's full text and the ISR for PCT/JP2018/033097 were not retrievable in my searches, so PL1 is characterized only through the '487 specification; (c) I have not confirmed the publication date of the applicable IEC 61784-3 edition, which must predate 2018-09-06 to qualify as § 102(a)(1) art. Each of these should be resolved against the USPTO file wrapper and the EPO/Global Dossier record before this analysis is relied upon for any validity opinion.