Invalidity dossier

US 5844586

Process for making ink jet heater chips

Current assignee: Standard Microsystems LLC

Added 9/23/2026, 8:45:06 PM

At a glanceNo PTAB challengesNo litigation on file

Active provider: DeepSeek · deepseek-flash

Patent summary

Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.

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Patent Overview — US 5,844,586 A

Title: "Process for making ink jet heater chips"

Patent number / application: US 5,844,586 A; Application No. US 08/628,059.

Inventors: Karen L. Berry and Joseph P. Maniaci.

Assignee: Originally assigned to Standard Microsystems Corporation (per the assignment entries listing inventors Berry and Maniaci); the current-assignee field lists Standard Microsystems LLC. The source notes that listed assignees may be inaccurate and that Google has not analyzed or warranted the list.

Key dates: Priority/filing date 1996-04-08; granted and published 1998-12-01; anticipated expiration 2016-04-08. Legal status shown as "Expired – Fee Related." (The source describes legal status as an assumption, not a legal conclusion.)

Purpose and plain-language scope: The invention relates generally to thermal inkjet printing, and more particularly to a thermal inkjet printhead and a process for its fabrication. In the described flow, a field oxide layer is covered with protective dielectric material, then a stacked metal layer — a thin resistive heater material such as aluminum-tantalum alloy plus a thicker conductive (e.g., aluminum) layer — is patterned to form a resistor at the heater region. A passivation layer (typically silicon nitride plus silicon carbide) is applied, patterned, and etched to open a via. A conductive protective layer is deposited over the passivation layer and patterned/etched prior to any photolithographic or etching step on the passivation layer, forming a cavitation layer at each heater region; the passivation layer is then patterned and etched to open vias. A second conductive layer is deposited and patterned to define bond pad areas and interconnect. Previously, tantalum and gold layers were patterned so the tantalum cavitation layer was exposed and free of overlying aluminum-copper alloy, while remaining gold defined bond pad and interconnect. The printhead is completed with a thick film and nozzle plate defining ink reservoirs at the cavitation layers and associated heating regions. FIGS. 1–4 illustrate fabrication stages, with the completed product in FIG. 4.

Source: https://patents.google.com/patent/US5844586/en

What the excerpt does not establish: It provides no full claim text, no complete detailed description or drawings, no prior-art references, and no examples or experimental data. It also does not establish litigation, ownership transfers, validity, or claim scope beyond the summarized passages.

Generated 10/1/2026, 9:41:12 PM

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Litigation summary

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Proceedings on file (0)

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No PTAB proceedings on file. This patent has not been challenged via IPR, PGR, or CBM. The absence is itself a signal — well-asserted patents eventually attract IPRs. The LLM analysis below may surface filings the ODP feed hasn’t indexed yet.

PTAB challenges

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Assignment history

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Prior art

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Obviousness

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Extensions

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Derivative works

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