Prior art

The most relevant prior art for US patent 10,734,481, based on the citations within the patent document and their titles, are identified below. The analysis focuses on references that explicitly describe graded dopant regions, drift fields, or retrograde wells aimed at controlling carrier movement in semiconductor devices, as these features are central to independent claims 1 and 20.

Analysis of Prior Art Citations

The core of US10734481's independent claims (Claims 1 and 20) revolves around a semiconductor device having active regions and/or well regions with at least one graded dopant concentration designed to aid carrier movement from the first surface to the second surface (or into the substrate) to improve performance.

The following patent citations are considered most relevant:

1. US4481522A: CCD Imagers with substrates having drift field

   • Full Citation: US4481522A, "CCD Imagers with substrates having drift field," issued November 6, 1984, to RCA Corporation.
   • Publication/Filing Date: Priority Date: 1982-03-24, Publication Date: 1984-11-06.
   • Brief Description: This patent describes Charge Coupled Device (CCD) imagers that utilize a "drift field" in their substrates. A drift field is typically created by a non-uniform doping concentration, which helps to guide charge carriers. The abstract of US10734481 explicitly mentions improving pixel resolution and color sensitivity for imaging ICs using graded dopants, and the detailed description discusses "degradation of CMOS digital images in digital imaging ICs is another result of the havoc caused by minority carriers. Pixel and color resolution can be significantly enhanced in imaging ICs with the embodiments described herein." The concept of a drift field for carrier movement in an imager substrate directly anticipates the graded dopant concentration for aiding carrier movement in an active region or well, particularly in imaging applications.
   • Potentially Anticipates: Claims 1 and 20, especially with respect to the application of graded dopant concentrations to aid carrier movement in imagers (as further specified in dependent claim 19 and 36, which claim an image sensor).

2. US5329144A: Heterojunction bipolar transistor with a specific graded base structure

   • Full Citation: US5329144A, "Heterojunction bipolar transistor with a specific graded base structure," issued July 12, 1994, to At&T Bell Laboratories.
   • Publication/Filing Date: Priority Date: 1993-04-23, Publication Date: 1994-07-12.
   • Brief Description: This patent details a heterojunction bipolar transistor (HBT) featuring a "graded base structure." The use of a graded base doping is a known technique to create an internal electric field to accelerate minority carriers through the base, thereby reducing base transit time and improving high-frequency performance. US10734481's background and detailed description refer to "graded base BJTs" to create an "aiding drift field to enhance the diffusing minority carrier's speed from emitter to collector" (Paragraph).
   • Potentially Anticipates: Claims 1 and 20, particularly the aspect of a graded dopant concentration to aid carrier movement. While this reference specifically relates to bipolar transistors (which are minority carrier devices, as noted in US10734481's background), the fundamental concept of using graded doping to create a drift field for carrier movement is directly claimed by US10734481.

3. US5448087A: Heterojunction bipolar transistor with graded base doping

   • Full Citation: US5448087A, "Heterojunction bipolar transistor with graded base doping," issued September 5, 1995, to TRW Inc.
   • Publication/Filing Date: Priority Date: 1992-04-30, Publication Date: 1995-09-05.
   • Brief Description: Similar to US5329144A, this patent discloses an HBT with "graded base doping" to enhance performance. The grading of dopants in the base region creates an electric field that assists the transport of minority carriers. This directly addresses the principle of using graded dopants to aid carrier movement, as described in US10734481.
   • Potentially Anticipates: Claims 1 and 20, for the same reasons as US5329144A, by teaching the use of graded dopants to create a drift field for carrier acceleration.

4. US6310366B1: Retrograde well structure for a CMOS imager

   • Full Citation: US6310366B1, "Retrograde well structure for a CMOS imager," issued October 30, 2001, to Micron Technology, Inc.
   • Publication/Filing Date: Priority Date: 1999-06-16, Publication Date: 2001-10-30.
   • Brief Description: This patent describes the use of a "retrograde well structure" in a CMOS imager. Retrograde wells, by definition, have a doping concentration that increases with depth, creating an electric field that can repel minority carriers from the surface or sweep them deeper into the substrate. US10734481 explicitly mentions retrograde wells in its background: "Retrograde and halo wells have also been attempted to improve refresh time in DRAMs (dynamic random-access memories), as well as, reducing dark current (background noise) and enhance RGB (Red, Green, Blue) color resolution in digital camera ICs." It also states, "As desired, the n − well and p − wells can also be graded or retrograded in dopants to sweep those carriers away from the surface as well." This reference directly anticipates the use of graded dopants in well regions adjacent to active regions to aid carrier movement in imagers, which is a key aspect of claims 1 and 20, particularly in the context of imaging devices (dependent claims 19 and 36).
   • Potentially Anticipates: Claims 1 and 20, particularly the element concerning "at least one well region adjacent to the first or second active region containing at least one graded dopant region, the graded dopant region to aid carrier movement from the first surface to the second surface of the substrate," within the context of CMOS imagers.

5. US6737722B2: Lateral transistor having graded base region, semiconductor integrated circuit and fabrication method thereof

   • Full Citation: US6737722B2, "Lateral transistor having graded base region, semiconductor integrated circuit and fabrication method thereof," issued May 18, 2004, to Sanken Electric Co., Ltd.
   • Publication/Filing Date: Priority Date: 2001-04-25, Publication Date: 2004-05-18.
   • Brief Description: This patent discloses a lateral transistor with a "graded base region." This directly teaches the application of graded dopants within an active region (the base of a transistor) to influence carrier transport, which is a fundamental concept underlying claims 1 and 20 of US10734481.
   • Potentially Anticipates: Claims 1 and 20, as it describes a graded dopant region in an active transistor area to affect carrier movement.

6. US6753202B2: CMOS photodiode having reduced dark current and improved light sensitivity and responsivity

   • Full Citation: US6753202B2, "CMOS photodiode having reduced dark current and improved light sensitivity and responsivity," issued June 22, 2004, to Texas Instruments Incorporated.
   • Publication/Filing Date: Priority Date: 2001-05-03, Publication Date: 2004-06-22.
   • Brief Description: This patent focuses on improving CMOS photodiodes by reducing dark current and enhancing light sensitivity. While the title doesn't explicitly state "graded dopants," techniques to achieve reduced dark current and improved sensitivity in photodiodes often involve optimized doping profiles, including graded dopants, to manage minority carrier generation and collection. US10734481's background mentions "reducing dark current (background noise) and enhance RGB (Red, Green, Blue) color resolution in digital camera ICs" as areas where graded dopants can improve performance.
   • Potentially Anticipates: Claims 1 and 20, particularly in relation to image sensors (dependent claims 19 and 36), if the disclosed methods for reducing dark current and improving sensitivity implicitly or explicitly involve graded dopant concentrations that aid carrier movement.

7. US6831292B2: Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same

   • Full Citation: US6831292B2, "Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same," issued December 14, 2004, to Amberwave Systems Corporation.
   • Publication/Filing Date: Priority Date: 2001-09-21, Publication Date: 2004-12-14.
   • Brief Description: This patent describes semiconductor structures that use "defined impurity gradients." "Impurity gradients" are synonymous with graded dopant concentrations. The patent further details methods for fabricating these structures. This directly anticipates the core feature of graded dopant concentrations.
   • Potentially Anticipates: Claims 1 and 20, as it broadly teaches the concept of "defined impurity gradients" (graded dopant concentrations) in semiconductor structures, which forms a fundamental basis of the claims.

8. US7064385B2: DMOS-transistor with lateral dopant gradient in drift region and method of producing the same

   • Full Citation: US7064385B2, "DMOS-transistor with lateral dopant gradient in drift region and method of producing the same," issued June 20, 2006, to Atmel Germany Gmbh.
   • Publication/Filing Date: Priority Date: 2003-09-19, Publication Date: 2006-06-20.
   • Brief Description: This patent explicitly teaches a DMOS transistor featuring a "lateral dopant gradient in the drift region." The drift region is a critical active region in power devices like DMOS transistors. The presence of a dopant gradient in this region directly corresponds to the "graded dopant concentration to aid carrier movement" as claimed in US10734481, especially in the context of power MOS transistors and IGBTs mentioned in US10734481's technical field.
   • Potentially Anticipates: Claims 1 and 20, specifically for the element related to a "graded dopant concentration to aid carrier movement" within an active region (the drift region of a DMOS transistor).

9. US20070045682A1: Imager with gradient doped EPI layer

   • Full Citation: US20070045682A1, "Imager with gradient doped EPI layer," published March 1, 2007, by Hong Sungkwon C.
   • Publication/Filing Date: Priority Date: 2005-08-31, Publication Date: 2007-03-01.
   • Brief Description: This patent application describes an imager that incorporates a "gradient doped EPI layer." An epitaxial (EPI) layer can serve as an active region or part of the substrate where devices are formed. The "gradient doped" aspect directly aligns with the "graded dopant concentration" of US10734481, specifically for imaging applications.
   • Potentially Anticipates: Claims 1 and 20, particularly as applied to image sensors (dependent claims 19 and 36), by teaching the use of a gradient-doped epitaxial layer to aid carrier movement in an imager.