Obviousness

Under 35 U.S.C. § 103, an invention is considered obvious if the differences between the claimed invention and the prior art are such that the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art (PHOSITA). The analysis requires identifying prior art, identifying the differences between the prior art and the claimed invention, and determining if there was a motivation for a PHOSITA to combine or modify the prior art to arrive at the claimed invention with a reasonable expectation of success.

US patent 10025731 describes a memory module that includes a printed circuit board with at least one connector, a plurality of memory devices, and a circuit. The circuit comprises a first set of bi-directional ports coupled to the memory devices, a second set of bi-directional ports coupled to the connector, a switching sub-circuit configured to selectively couple ports between the two sets, and a correction circuit associated with each port. The correction circuit is designed to reduce noise in signals transmitted between the ports. The correction circuit can include a coarse correction element (e.g., programmable impedance matching circuit), a fine correction element (e.g., a self-adjusting damper circuit), a filter element, and a repeater/amplifier element.

Prior Art as Described in US10025731

The patent itself describes the "Description of the Related Art" as follows, effectively outlining the conceptual prior art that existed at the time of the invention (priority date April 14, 2008):

1. System 10 (FIG. 1): This system incorporates a multiplexer-demultiplexer 12 to isolate unused subsystems 16, 18, thereby reducing the load on drivers. [cite: The present application relates generally to the field of electrical signal integrity and more specifically to circuits for improving electrical signal integrity. Description of the Related Art. Traditional systems sometimes incorporate multiplexers and/or demultiplexers to help quiet inactive signal paths, minimizing the overall dynamic power dissipation, and isolating unused subsystems. FIG. 1 schematically illustrates an example of such a system 10 which incorporates a multiplexer- demultiplexer 12 to isolate unused subsystems of a plurality of subsystems 16 , 18.] However, this arrangement can introduce "transmission line discontinuity regions," leading to signal reflections, distortions, and degraded system performance. [cite: the multiplexer and/or demultiplexer 12 can present transmission line discontinuity regions in electronic systems (e.g., in electronic systems with signal paths with electrical lengths longer than 1 ⁇ 4 of the wavelength of the operational frequency or the signal transition rate). In such systems, signal reflections may occur, changing wave characteristics and degrading system performance.]
2. System 20 (FIG. 2): This system uses device select signals 22, 24 (e.g., chip select signals) to logically isolate unused memory devices by not activating their address, control, and/or device select signals. [cite: In memory applications, some systems control “chip select” or device select signals, along with the memory address and control signals, based on the device select signals, in order to disable memory devices when they are not being accessed. FIG. 2 schematically illustrates an example of such a system 20 which isolates unused subsystems of a plurality of subsystems 16 , 18 using device select signals 22 , 24 (e.g., chip select signals).] The drawbacks of this approach include introducing timing delays on signal paths and failing to address power dissipation issues adequately. [cite: Generating controllable address and device select signals can introduce timing delays on the device select, address, and control paths. In addition, this arrangement does not address the power dissipation and may degrade performance degradation by, for example, requiring that secondary control signals be generated for the memory devices.]

These descriptions serve as the foundational "prior art" from which the claimed invention seeks to differentiate itself, highlighting the problems that a PHOSITA would be motivated to solve.

Motivation for a Person Having Ordinary Skill in the Art (PHOSITA)

A PHOSITA in the field of memory system design, observing the limitations of the conventional approaches (System 10 and System 20) as described in the patent, would be motivated to develop a memory module that simultaneously achieves effective load isolation, reduces power consumption, and significantly improves signal integrity. The patent explicitly articulates these motivations:

• Higher speed processors and memory densities lead to increased power dissipation and memory access time, impairing system performance. [cite: However, higher speed processors and higher memory densities translate to higher power dissipation and increased memory access time, impairing the performance of the system.]
• Impedance mismatches further degrade performance and power efficiency. [cite: Additionally, impedance mismatches between the system board, the memory boards, and the memory devices may also substantially degrade the performance and power efficiency of traditional memory systems.]
• Multiplexers, while providing isolation, introduce signal integrity issues due to transmission line discontinuities and reflections. [cite: In such systems, signal reflections may occur, changing wave characteristics and degrading system performance.]
• Device select signals cause timing delays and do not fully address power dissipation. [cite: Generating controllable address and device select signals can introduce timing delays on the device select, address, and control paths.]

The overarching motivation would be to overcome these well-recognized challenges in high-performance memory systems, seeking a solution that maintains or improves system speed and capacity without compromising signal integrity or excessively increasing power consumption.

Obvious Combinations of Prior Art

A PHOSITA, aiming to solve the identified problems, would have found it obvious to combine elements and principles from the described prior art and general engineering knowledge to arrive at the claimed invention.

1. Combining Load Isolation with Signal Integrity Improvement:

   • Switching Sub-Circuit (Load Isolation): The concept of isolating inactive memory subsystems to reduce load and power consumption was known, as evidenced by System 10 (multiplexer-demultiplexer) and System 20 (device select signals). A PHOSITA would be motivated to employ a switching mechanism (which the patent describes as a "switching sub-circuit 140" that can function as a "bidirectional multiplexer-demultiplexer" or a "router" [cite: The switching sub-circuit 140 comprises or is characterized as a bidirectional multiplexer-demultiplexer in certain embodiments. In other embodiments, the switching sub-circuit 140 comprises or is characterized as a router.]) to selectively couple active memory devices/ranks while isolating inactive ones. This directly addresses the goal of reducing dynamic power consumption by providing a known static value to un-driven ports. [cite: the switching sub-circuit 140 isolates and provides a known static value to all un-driven ports, thereby reducing any dynamic power consumption associated with floating or toggling electrical nodes.]
   • Correction Circuit (Noise Reduction): Recognizing that the very act of switching (as in System 10) or driving signals across longer or more complex paths can introduce signal integrity issues, a PHOSITA would be motivated to integrate signal conditioning elements into the signal paths.

2. Specific Elements of the Correction Circuit:

   • Coarse Correction Element (Programmable Impedance Matching): Impedance mismatches are a fundamental cause of signal reflections in high-speed transmission lines, as acknowledged by the patent. [cite: Additionally, impedance mismatches between the system board, the memory boards, and the memory devices may also substantially degrade the performance and power efficiency of traditional memory systems.] The use of impedance matching circuits to mitigate reflections is a well-established engineering practice. A PHOSITA would foresee the benefit of a "programmable impedance matching circuit" [cite: the at least one coarse correction element 152 comprises at least one programmable impedance matching circuit in certain embodiments.] (e.g., using programmable resistors [cite: the programmable impedance matching circuit 160 may comprises at least one programmable resistor 162.]) to dynamically adjust to varying load conditions or transmission line characteristics, especially after a switching element, to reduce noise. This would be a conventional response to a known problem.
   • Filter Element: Filters are standard components in electrical engineering used to remove unwanted frequency components or noise from signals. The patent mentions that the "filter element 156 may reduce noise from the one or more signals where the noise includes a predetermined range of frequencies" [cite: The filter element 156 may reduce noise from the one or more signals where the noise includes a predetermined range of frequencies.]. Common types like band-pass, low-pass, or high-pass filters [cite: In other embodiments, the filter element 156 comprises at least one other type of a filter such as a notch filter, a low-pass filter, or a high-pass filter.] would be obvious choices for a PHOSITA to address noise, including cross-coupling. [cite: the filter elements 156 reduce or filter out cross-coupling between signals, for example.]
   • Repeater/Amplifier Element: High-speed signals degrade over transmission lines due to attenuation and dispersion. Repeaters and amplifiers are routinely used to restore signal strength, reshape waveforms, and improve slew rates, thereby enhancing signal quality. The patent notes that the "repeater/amplifier element 158 reshapes the signal, which may be deteriorated due to transmission over lossy transmission lines having discontinuity regions" [cite: the repeater/amplifier element 158 reshapes the signal, which may be deteriorated due to transmission over lossy transmission lines having discontinuity regions.]. Their inclusion to "improve the signal quality of the one or more signals" [cite: the correction circuit 150 further comprises at least one repeater/amplifier element 158 , which improves the signal quality of the one or more signals.] would be a conventional engineering solution.
   • Fine Correction Element (Self-Adjusting Damper): While the patent refers to specific provisional applications for its "self-adjusting damper circuit 170" [cite: Examples of self-adjusting damper circuits 170 in accordance with certain embodiments described herein are described in U.S. Provisional Application No. 61/044,825, filed Apr. 14, 2008, and copending U.S. application Ser. No. 12/422,912, filed by the assignee of the present application on Apr. 13, 2009.], the general concept of dampening signal reflections and oscillations to smooth signals is a known technique in signal integrity. If these provisional applications were not enabling or if other dampening circuits were publicly known before the priority date and applicable in this context, then the inclusion of a damper circuit to "further reduces signal reflections due to impedance mismatches and/or reduces other noise" [cite: the at least one fine correction element 154 of the correction circuit 150 further reduces signal reflections due to impedance mismatches and/or reduces other noise.] would be an obvious design choice for a PHOSITA seeking to refine signal quality after coarse impedance matching.

The combination of a switching sub-circuit for selective load isolation (addressing the problems of System 10 and System 20) with a comprehensive correction circuit employing established signal integrity techniques (impedance matching, filtering, amplification, and dampening) to counteract the inherent signal degradation in high-speed memory systems, would represent a logical and foreseeable advancement to a PHOSITA at the time of invention. The patent explicitly states the problems and proposes solutions that are generally known remedies for those specific problems, thereby establishing a strong motivation for combination.