Obviousness

Analysis of Obviousness under 35 U.S.C. § 103 for U.S. Patent 8,148,962

Date of Analysis: May 13, 2026
Patent under Review: U.S. Patent 8,148,962 ("the '8962 patent")
Priority Date: May 12, 2009

This analysis considers whether the invention claimed in the '8962 patent would have been obvious to a Person Having Ordinary Skill in the Art (POSA) at the time the invention was made. A POSA in this field would typically possess a degree in electrical engineering and have several years of experience in designing analog integrated circuits, particularly power management circuits like low-dropout (LDO) regulators.

The central inventive concept of the '8962 patent, particularly as articulated in independent claim 1, is a voltage regulator architecture that controls a pass device using a signal derived from two currents supplied to a single current path. The first current is substantially constant, while the second current is variable. The magnitude of this second current is determined by a direct comparison between a stable reference voltage (the gate of a feedback transistor) and the regulator's output voltage. This architecture is designed to provide a fast transient response without requiring a large output capacitor.

An obviousness rejection under 35 U.S.C. § 103 would require showing that a POSA would have been motivated to combine prior art teachings to arrive at the claimed invention with a reasonable expectation of success.

---

Potential Combination of Prior Art

A potential obviousness argument could be constructed by combining teachings from a primary reference disclosing a base regulator design with secondary references that teach modifications to improve performance. One such combination is:

• Primary Reference: A standard LDO voltage regulator architecture, as broadly understood in the art and exemplified by patents like U.S. Patent 6,188,211 to Rincon-Mora et al. ("Rincon-Mora").
• Secondary References:
  • U.S. Patent 7,319,314 to Maheshwari et al. ("Maheshwari"), which teaches using a replica regulator for output correction.
  • General knowledge of current-based driver stages for improving the switching speed of transistors, as might be found in references like U.S. Patent 5,909,109 to Cherry Semiconductor Corp. ("Cherry").

Step-by-Step Rationale for Combination

1. Starting Point: A Conventional LDO Regulator (Rincon-Mora)
   A POSA would be intimately familiar with the structure of a conventional LDO regulator, such as that described in Rincon-Mora. This reference discloses the fundamental components: a pass transistor, a feedback loop (typically with a resistive divider), and an error amplifier that compares the feedback voltage to a reference and drives the gate of the pass transistor. The '8962 patent acknowledges that its invention is an improvement over such known regulator designs. A primary motivation for a POSA is to improve the transient response of these regulators—that is, their ability to react quickly to large, sudden changes in load current.

2. Motivation to Improve Transient Response with a Better Driver Stage (Cherry)
   A known limitation of simple LDOs is the speed at which the error amplifier can charge and discharge the large gate capacitance of the pass transistor. A POSA seeking to improve transient response would be motivated to implement a more effective "predriver" circuit. References like Cherry teach driver stages where the gate of a transistor is controlled by the interplay of opposing pull-up and pull-down current sources at a single node. This technique is known to enable faster slewing of the gate voltage compared to a standard voltage-output amplifier. Therefore, a POSA would have been motivated to replace the standard error amplifier output stage in a regulator like Rincon-Mora's with a current-based driver stage to achieve a faster response.

3. Motivation to Use a Replica Circuit for Accurate Comparison (Maheshwari)
   Once the decision to use a current-based driver is made, the POSA must decide how to generate the variable control current. This current must accurately reflect the error between the desired output voltage and the actual output voltage. The Maheshwari patent teaches the benefits of using a "replica" circuit for creating accurate correction signals in a regulator. Maheshwari specifically discloses using a replica amplifier and a correction amplifier that compares the replica output to the actual output voltage. A POSA would understand from Maheshwari that replica devices provide excellent matching and are well-suited for creating a signal that precisely tracks deviations in the output voltage. This would motivate the POSA to employ a replica-based comparison circuit to generate the variable current needed for the current-based driver.

Analysis of the Gap Between the Combination and Claim 1

While the combination above teaches many elements of the '8962 patent, a significant gap remains, which points toward the non-obviousness of the claimed invention.

The proposed combination (Rincon-Mora + Cherry + Maheshwari) teaches:

• An LDO regulator architecture.
• The use of a current-based driver for the pass transistor to improve speed.
• The use of a replica circuit to generate an accurate correction signal based on the output voltage.

However, the combination does not teach or suggest the specific, elegant implementation at the core of the '8962 patent. The inventive step in the '8962 patent lies in how the inputs for the comparison circuit are derived and utilized:

• Unique Reference Voltage Source: The '8962 patent does not use a standard bandgap reference as the input for its final comparison circuit. Instead, it uses the stabilized gate voltage of a feedback transistor from a separate, master current path (the "first current path"). This voltage (Vgate in the patent's equations) serves as an exceptionally stable reference.
• Direct Comparison via Replica Transistor: The second current supply circuit (as detailed in Claim 2 and Figure 5) uses a single replica transistor to directly compare this stable gate voltage with the regulator's output voltage (Vout). The resulting current (I=K(Vout−Vgate−Vt)²) is an inherent and immediate measure of the output voltage error.
• Synergistic Architecture: This variable current is then directly supplied to the same node as a constant current from a current mirror. The resulting voltage on this node, which drives the pass device, is a simple, fast, and direct function of the output voltage deviation.

A POSA combining the prior art would most likely have used a conventional bandgap voltage reference and designed a more complex error amplifier to generate the control current. The '8962 patent's approach of creating a stable reference voltage on the gate of a transistor in one current path and then using that voltage as a direct input to a replica transistor in a second path for comparison is a non-trivial, inventive leap. It combines the functions of reference generation, error amplification, and current-driving into a simple and efficient circuit. This specific arrangement is not suggested by the prior art and leads to the stated advantages of high stability across frequencies and operation without a large capacitor.

Conclusion

A plausible argument for obviousness can be constructed by combining multiple prior art references, each addressing known problems in voltage regulator design. However, such a combination would require significant modification and would not naturally lead to the specific and synergistic circuit architecture claimed in U.S. Patent 8,148,962. The unique method of generating a stable reference voltage and using it in a direct replica-transistor comparison to create a control current for a current-summing driver stage constitutes a non-obvious inventive step over the cited prior art. Therefore, the claims of the '8962 patent are likely not invalid as obvious under 35 U.S.C. § 103.