Patent 7051306

Prior art

Earlier patents, publications, and products that may anticipate or render the claims unpatentable.

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Prior art

Earlier patents, publications, and products that may anticipate or render the claims unpatentable.

✓ Generated

To identify the most relevant prior art for US patent 7051306, a review of its cited references has been performed. The following patent was found in the search results as a cited reference within US7051306.

Prior Art Reference: US6598148B1

  • Full Citation: US 6,598,148 B1, "Method and apparatus for managing power consumption in a processor", Moore et al..
  • Publication/Filing Date: The publication date for US6598148B1 is July 2003. To confirm the filing date and get a full abstract, further search would be beneficial.
  • Brief Description: US 6,598,148 B1 describes a method and apparatus for managing power consumption in a processor. This involves dynamically adjusting power by, for instance, turning off portions of the processor or reducing their operating frequency, often in response to processor utilization or other performance metrics. The underlying principle involves partitioning a system into components where power can be controlled independently.
  • Potential Anticipation (35 U.S.C. § 102):
    • Claim 1 (Method): This claim in US7051306 details a method for managing power on an integrated circuit with power islands by determining a target power level, identifying actions to change power consumption, and performing those actions, with selecting a frequency being one such action. US6598148B1's concept of dynamically adjusting power in parts of a processor (which could be considered analogous to "power islands") by reducing operating frequency or turning off components potentially anticipates elements of Claim 1, especially the dynamic power management aspect and the use of frequency selection as an action. The phrase "dynamically change the power consumption of the power islands... based on the needs and operation of the integrated circuit" (as described in US7051306) aligns with the dynamic adjustment based on processor utilization described in US6598148B1.
    • Claim 16 (System): This claim describes a system with power control circuitry and a power manager to achieve similar dynamic power management. While US6598148B1 focuses on a "processor," the underlying system architecture for managing power in partitioned areas could potentially anticipate the broad concept of a system with power control circuitry and a power manager for independent power control in "power islands."
    • Claim 37 (Software Product): This claim covers a software product for power management. US6598148B1, by describing a "method and apparatus," implicitly or explicitly involves software or firmware to implement the dynamic power management. The "power management software operational when executed by a processor to direct the processor to determine a target power level... determine at least one of actions... and perform the at least one of the actions" could be broadly anticipated by a software product implementing the dynamic power management described in US6598148B1.

Due to the general nature of the snippet, further detailed analysis of the full text of US6598148B1 would be required to definitively assess the scope of anticipation, particularly concerning the specific "power island" delineation and hierarchical power management structure emphasized in US7051306.

Generated 5/18/2026, 12:46:10 AM