US 7020281

A summary of US Patent 7,020,281, which is now expired, is provided below. A search of the United States Court of Appeals for the Federal Circuit (CAFC) 2026 dockets for this patent number did not yield any results.

Summary of US Patent 7,020,281

Title: Timing attack resistant cryptographic system

Assignee: The patent was originally assigned to Certicom Corp. and later assigned to Blackberry Limited. The current assignee is listed as Malikie Innovations Ltd.

Inventors:

• Ashok Vadekar
• Robert J. Lambert

Filing Date: January 18, 2001

Issue Date: March 28, 2006

Abstract:
The patent describes a method for performing a cryptographic group operation a specified number of times on an element of a group. The method aims to be resistant to timing attacks by ensuring that the operations performed for each bit of the integral number are substantially equal. This is achieved by representing the number as a binary vector and processing each bit sequentially. For each bit, a group operation is performed on an intermediate element. Then, depending on whether the bit is a one or a zero, either the group element or its inverse is used in a subsequent group operation. A final corrective step may be performed based on the value of the last bit. This consistent processing for each bit is intended to prevent attackers from deducing secret information by analyzing the time taken for the cryptographic computation.

Plain-Language Overview of Independent Claims

US Patent 7,020,281 has two independent claims: Claim 1 and Claim 6.

Claim 1: This claim describes a method for a computing device to generate a result from a repetitive group operation in a way that resists timing attacks. The method involves the following steps:

• Representing a number as a binary sequence of bits.
• Initializing a result.
• Sequentially processing each bit of the binary sequence. For each bit, the device performs a group operation on the current result. Then, based on the state of the computing apparatus, it performs another group operation with either the selected element or the inverse of the selected element.
• The state of the computing apparatus is updated based on a comparison of the current and preceding bits.
• This process is repeated for a predetermined number of bits, ensuring that each bit is processed with similar operations to hide the sequence of bits and produce a final result.
• The final result is then output for use in other computations.

Claim 6: This claim outlines a method for a cryptographic processor to perform a group operation on a scalar and a selected element to generate a result. The steps are as follows:

• The scalar is represented as a binary vector.
• This binary vector is recoded into a signed-digit representation, meaning it is represented using plus-one and minus-one digits.
• Each digit of this signed representation is selected sequentially. For each digit, a group operation is performed on an intermediate element to create a new intermediate element.
• The selected element is then either added to or subtracted from the intermediate element based on the signed digit.
• The final intermediate element is then output as the result of the group operation for subsequent use.