Patent 11107768

Obviousness

Combinations of prior art that suggest the claimed invention would have been obvious under 35 U.S.C. § 103.

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Obviousness

Combinations of prior art that suggest the claimed invention would have been obvious under 35 U.S.C. § 103.

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Obviousness under 35 U.S.C. § 103 requires an analysis of whether the differences between the claimed invention and the prior art would have been obvious to a person having ordinary skill in the pertinent art at the time the invention was made. This analysis considers the scope and content of the prior art, the differences between the prior art and the claims, the level of ordinary skill, and secondary considerations of non-obviousness. The motivation to combine prior art references can stem from the knowledge of those skilled in the art, the prior art references themselves, or the nature of the problem to be solved.

Here, we will analyze the obviousness of US patent 11107768 by identifying combinations of prior art that would render its claims obvious, along with the motivation for such combinations.

Prior Art References:

The patent US11107768 lists a "Prior art date" of 2012-09-26. Therefore, prior art existing before this date is relevant for obviousness analysis. The provided patent extract includes the following references under "Priority claimed from":

  • US14/036,256 (priority claimed from 2013-09-25, which is after the prior art date for US11107768, so this document itself isn't prior art for 11107768, but its underlying priority application might be).
  • US9615453B2 (This is an issued patent, but the extract does not specify its filing or priority date, only its publication date in the patent family history (2017-04-11), which is after the prior art date for US11107768. We will assume the reference to "patent/US9615453B2/en" under "Priority claimed from US14/036,256" indicates a family relationship rather than direct prior art for US11107768.)

Given the lack of specific prior art references within the provided document that predate 2012-09-26, and to adequately perform an obviousness analysis, we will consider general knowledge in the field of semiconductor packaging, specifically concerning glass substrates and through-glass vias (TGVs) as discussed in the definitions and descriptions within the patent and from the search results.

Level of Ordinary Skill in the Art:

A person having ordinary skill in the art (PHOSITA) in the field of this patent would likely possess a strong understanding of semiconductor device fabrication, packaging technologies, materials science related to glass and polymers, and display technologies (OLED, MEMS, LCD). They would be familiar with techniques for forming interconnections, dielectric layers, and encapsulations in microelectronic devices.

Obviousness Combinations for Independent Claim 1 (Display Device):

Independent Claim 1 describes a display device with a display panel substrate having contact pads and a display area with very small distances (less than 100 micrometers) between its edges and the substrate boundaries. A glass substrate with metal conductors (TGVs) and metal bumps connects to the display panel.

  • Combination 1: General knowledge of display device manufacturing + Glass interposers with TGVs.
    • Scope and Content of Prior Art: The patent itself defines a "display device" comprising a display panel substrate with contact pads and a display area, and notes that "microelectronic devices have a tendency to be minimized and thinned". The use of glass as an interposer for IC chips and printed circuit boards, with a CTE closely matched to silicon, was a known advantage by 2012. Furthermore, the formation of through-glass vias (TGVs) was an active area of development, with various methods like laser drilling and wet/dry etching being explored for 3D packaging. The filling of TGV holes with conductive material, such as by plating, was also well-known.
    • Differences: Claim 1 specifies small distances (less than 100 micrometers) between the display area's edges and the substrate's boundaries, and the presence of metal conductors through the glass substrate and metal bumps between the glass and display panel.
    • Motivation to Combine: A PHOSITA would be motivated to combine these known elements to achieve miniaturization and high integration in display devices, which was a general trend in microelectronics. The patent explicitly states that "microelectronic devices have a tendency to be minimized and thinned with its functional development". The advantages of glass as an interposer, such as high signal isolation, low dielectric loss, and low manufacturing cost, would motivate its use in display devices. The ability to create TGVs with small diameters and pitches, as evidenced by ongoing research, would naturally lead a skilled artisan to integrate these into a compact display module to connect the display panel to external circuitry via the glass interposer. The need for electrical connection between a display panel and an interposer would naturally lead to the use of metal bumps, a standard flip-chip technology. The explicit mention of "flip-chip technology" for interconnecting bumps on Al pads of chips to package media, though with challenges, indicates this was a known method. The requirement for small boundary distances for compact display devices would be a design choice driven by market demand for smaller bezels and increased display area, a predictable variation based on design incentives.

Obviousness Combinations for Independent Claim 12 (Chip Package with Through-Glass Metal Plugs):

Independent Claim 12 describes a chip package with a glass substrate having metal plugs extending through it, where the top and bottom surfaces of the plugs are coplanar with the respective surfaces of the glass substrate and have the same area.

  • Combination 1: Glass interposers with TGVs + Known TGV manufacturing techniques.
    • Scope and Content of Prior Art: By the priority date, glass was recognized as an "emerging material for interposer application" due to its mechanical strength, low loss, chemical resistance, and cost-effectiveness compared to silicon. The fabrication of TGVs was a known challenge, but various methods such as laser drilling, wet etching, and dry etching were being explored. Filling TGVs with conductive material, often by electroplating, was also known. Furthermore, the patent itself defines "metal plugs 21" as being formed from "metal traces 6" or "non-circular metal traces 752", and specifically mentions "the top surface of the metal plugs 21 are the same area as the bottom surface of the metal plugs 21", and that these surfaces are "substantially coplanar" with the glass.
    • Differences: The specific details of the metal plugs having the "same area" at top and bottom surfaces and being "substantially coplanar" are key.
    • Motivation to Combine: A PHOSITA would be motivated to develop reliable and electrically efficient TGVs in glass interposers. The coplanarity of the metal plugs with the glass surface is a desirable feature for subsequent processing steps like metallization and chip attachment, ensuring a smooth surface for further layer deposition or bonding. The "same area" at the top and bottom of the plugs would be a natural outcome of many through-hole formation processes (e.g., certain etching or drilling techniques) followed by uniform filling, especially when aiming for consistent electrical connectivity. The goal of "high integrability, low component loss, small device form factor, manufacturability and low cost" for integrating TGVs and passive components would provide the motivation for these structural characteristics. The continued efforts to improve TGV manufacturing processes, including precise control over via diameter and reduced roughness of sidewalls, would inherently lead to the type of well-defined and coplanar plugs described in the claim.

Obviousness Combinations for Independent Claim 13 (Method for Creating a Glass Substrate):

Independent Claim 13 describes a method involving stretching metal traces, arranging them with a specific pitch, applying a thermal resistance layer, forming a fixed layer, and then introducing and solidifying a liquid glass layer within a mold.

  • Combination 1: Known methods of forming interconnections/traces + Glass substrate manufacturing techniques + Thermal processing considerations.
    • Scope and Content of Prior Art: The patent describes the traces as metal or polymer traces. The concept of forming "multiple traces" is fundamental to semiconductor packaging and circuit boards. The use of a "thermal resistance layer" and "mold" in manufacturing processes involving high temperatures (as implied by liquid glass solidification) would be standard engineering practice. The process of forming glass layers from a liquid state (e.g., "high temperature liquid to form on the fixed layer 12 and fill in the mold 10") is consistent with known glass manufacturing techniques, which often involve softening and remelting glass. The Corning fusion process was known to provide high-quality glass substrates, and various TGV processes like wet/dry etching and laser drilling were used to fabricate vias.
    • Differences: The specific sequence of steps, including stretching traces to a "suitable length L1," arranging them with a particular "pitch t1," using a "liquid thermal resistance layer 8" that "permeated the net 4 through the gaps 5," and forming a "fixed layer 12" to fix the traces before introducing the liquid glass layer, are detailed aspects.
    • Motivation to Combine: A PHOSITA would be motivated to create glass substrates with embedded interconnects. The stretching and precise arrangement of traces are techniques used to control circuit geometry. The use of a thermal resistance layer and a fixed layer prior to introducing molten glass would be motivated by the need to protect the pre-formed traces and maintain their precise arrangement during the high-temperature glass forming process. The patent explicitly states that the thermal resistance layer has a "heat deflection temperature between 400 and 900° C." and the mold has a "heat deflection temperature between 400° C. and 900° C. or between 800° C. and 1300° C.", demonstrating a clear awareness of thermal management. The ability to control the pitch of traces is crucial for high-density interconnects, a continuous goal in microelectronics. The overall combination aims to address the challenge of reliably integrating fine-pitch metal traces within a glass substrate, which aligns with the industry's drive for miniaturization and high-density packaging.

Obviousness Combinations for Independent Claim 17 (Manufacturing Process for Glass Substrate with TGVs using a Metal Trace Block):

Independent Claim 17 describes a manufacturing process utilizing a metal trace block (composed of multiple metal plates) that is fastened together to define TGV shapes, around which liquid glass is poured and solidified, followed by cutting.

  • Combination 1: Known TGV manufacturing techniques + Modular fabrication approaches + Glass molding/casting methods.
    • Scope and Content of Prior Art: As established, TGV formation in glass substrates was a recognized area of development. The concept of using molds for shaping materials, including glass, is ancient and well-understood. The creation of complex internal structures within molded parts often involves temporary or sacrificial elements to define voids. The patent describes various metal plates (first, second, third) that "form a metal trace block 19" which then acts as a template for the glass. It also mentions the glass layer being a "high temperature liquid" that fills the mold and then solidifies.
    • Differences: The specific use of a "metal trace block" constructed from multiple "first metal plate 7," "second metal plate 9," and "third metal plate 11," fastened together with "bolts 130, 132, 134, 136" to define the TGV shapes, and then pouring liquid glass around this assembly, are particular details of this claim.
    • Motivation to Combine: A PHOSITA would be motivated to develop efficient and precise methods for mass-producing glass substrates with TGVs. Creating a modular "metal trace block" would offer advantages in terms of precision, scalability, and potentially reusability in manufacturing. The use of multiple metal plates to define the vias allows for complex TGV geometries and arrays. Fastening these plates with bolts is a common mechanical engineering solution for assembling precise molds or fixtures. Pouring liquid glass around such a defined metal structure is a logical extension of known glass casting or molding processes to embed conductive pathways. The subsequent cutting of the glass along lines to produce individual substrates is a standard singulation technique. This approach would be motivated by the desire to achieve "high accuracy" in arranging holes in glass substrates, as recognized in prior art related to TGV manufacturing. The cost reduction opportunities in glass interposer fabrication, including via formation, would further motivate such innovative manufacturing processes.

Generated 5/26/2026, 6:49:17 PM