Patent 11032111

Obviousness

Combinations of prior art that suggest the claimed invention would have been obvious under 35 U.S.C. § 103.

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Obviousness

Combinations of prior art that suggest the claimed invention would have been obvious under 35 U.S.C. § 103.

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Obviousness Analysis under 35 U.S.C. § 103 for US Patent 11032111

This analysis will examine the obviousness of US patent 11032111 under 35 U.S.C. § 103, considering the KSR Int'l Co. v. Teleflex Inc. standard for obviousness, which emphasizes a more flexible and expansive approach than the previous "teaching, suggestion, or motivation" (TSM) test. Under KSR, obviousness can be established if there was an "apparent reason to combine the known elements in the fashion claimed by the patent at issue," considering "the interrelated teachings of multiple patents; the effects of demands known to the design community or present in the marketplace; and the background knowledge possessed by a person having ordinary skill in the art".

A person having ordinary skill in the art (POSA) in this field would likely be an electrical engineer or computer engineer with experience in high-speed serial communications, SerDes architectures, and equalization techniques. They would be familiar with standards like IEEE Std 802.3 and common challenges in designing reliable high-speed links, such as signal attenuation and inter-symbol interference (ISI).

The patent US11032111 describes a SerDes pre-equalizer with adaptable preset coefficient registers. The independent claims (Claim 1 and Claim 8) center on the concept of:

  • Using multiple registers, each corresponding to a different channel model, to store initial pre-equalizer coefficient values.
  • Selecting one of these registers for initial values.
  • Updating these values during a training phase.
  • Using the updated values for data transmission.
  • Specifically, Claim 8 focuses on this within a pluggable module transceiver in a chip-to-module (C2M) link.

Prior Art References (from the provided patent text, "Prior art keywords" and "BACKGROUND" section):

The patent itself references the following as general prior art:

  • IEEE Std 802.3-2015 (or later): This standard provides a common media access control specification for local area network (LAN) operations at selected speeds from 1 Mb/s to 100 Gb/s. It also discusses the need for enhanced equalization techniques due to increased channel attenuation and dispersion at faster symbol rates. The standard outlines various sublayers (MAC, Reconciliation, PCS, FEC, PMA, PMD) and their functions, including scrambling/descrambling, encoding/decoding, error correction (FEC), and transceiver conversions. It also mentions the PMD sublayer's role in initial startup, auto-negotiation, and link-training to adapt equalization filters.
  • General SerDes architectures and methods: The patent states that existing SerDes systems utilize transceivers, pre-equalization filters, and training phases. The need for "efficient adaptation interface for transmitter pre-equalizers in a standards-suitable fashion" is highlighted as a problem in the background.
  • Chip-to-module (C2M) links: The patent specifically identifies C2M links as a context for its invention, acknowledging that different host manufacturers use varying integrated circuit packages and PCB layouts, leading to significant variations in the C2M link model. It also states that "enhanced equalization techniques" are a "potential course of action" to account for increased channel attenuation and dispersion, but such techniques "should be implemented in a manner that does not limit performance or introduce undesirable hardware complexity or cost."
  • Known filter adaptation procedures: The patent mentions "least mean squares (LMS) adaptation, or recursive least squares (RLS) adaptation" as known methods for filter adaptation.

Obviousness Combinations:

Given the context and the explicit problem statement in the patent regarding the variability of C2M links and the desire for efficient, standards-suitable pre-equalization adaptation, a POSA would be motivated to combine known elements to address these challenges.

Combination 1: IEEE Std 802.3-2015 + General SerDes Architectures + Knowledge of C2M Link Variability

  • Motivation to combine: The IEEE Std 802.3-2015 already details the need for equalization and a link-training phase to combat channel non-idealities in high-speed communication links. A POSA familiar with general SerDes architectures and the acknowledged problem of significant variation in C2M link models across different manufacturers (as highlighted in US11032111's background) would be motivated to find a way to more efficiently adapt pre-equalization for these varying channels. The "drivers known to the design community or present in the marketplace" (e.g., the need for pluggable modules to be usable with the widest possible range of host ports) would compel a POSA to seek a flexible and adaptable pre-equalization solution.
  • Reasoning for obviousness: It would be obvious to a POSA to pre-program or store different sets of initial pre-equalizer coefficients, each tailored to a specific, known channel characteristic or model (like different C2M link variations). The concept of using "preset coefficient registers" for different channel models (as claimed in Claim 1 and 8) is a logical extension of existing training procedures and the need to address known channel variations efficiently. Instead of starting a lengthy adaptation process from a generic set of coefficients every time, providing pre-stored "good starting points" based on common channel types would reduce training time and improve performance. The patent itself states that manufacturers "may formulate a range of C2M link models using different assumptions" and that these models "enable the design of 'default' pre-equalizer coefficients for each case." This strongly suggests that a POSA would recognize the benefit of storing these default coefficients. The selection of the "best" register by determining a performance characteristic (e.g., error signal energy or bit error rate, as in claims 4-6) is a standard optimization technique known in the art of adaptive equalization.

Combination 2: IEEE Std 802.3-2015 + Known Filter Adaptation Procedures (LMS/RLS) + Knowledge of Pre-equalization Benefits

  • Motivation to combine: The IEEE standard mandates training phases for equalization, and LMS/RLS are well-established adaptive filtering algorithms. The patent itself highlights the advantages of pre-equalization (e.g., avoiding noise enhancement, reduced bit-width, lower power consumption). A POSA, striving to achieve these benefits in a standards-compliant manner, would be motivated to optimize the pre-equalization process.
  • Reasoning for obviousness: Once the idea of storing preset coefficients for different channel models is established (as discussed in Combination 1), the subsequent steps of updating these coefficients during a training phase and using the updated values for data transmission are merely the application of well-known adaptive equalization principles. The patent explicitly states that the "percentage constraint leaves room for convex optimization via known filter adaptation procedures such as, e.g., least mean squares (LMS) adaptation, or recursive least squares (RLS) adaptation." This indicates that the adaptation process itself, following the initial selection from registers, relies on existing, known techniques. The "modifying" or "updating" of coefficient values is an inherent part of any adaptive equalization system.

Motivation to adapt for "Chip-to-Module" (C2M) links (Claim 8 specific):

The patent repeatedly emphasizes the specific challenges of C2M links, including up to 20 dB of signal attenuation and significant variations between host ports and pluggable modules. The "demand" for pluggable modules to be interoperable across a wide range of host ports and the "limitations on the area, complexity, and power available on the host side of the link" would strongly motivate a POSA to provide "flexibility to adapt to the different C2M link characteristics" within the pluggable module itself. Therefore, applying the concept of adaptable preset coefficient registers to a pluggable module transceiver in a C2M link (as in Claim 8) would be an obvious design choice for a POSA facing these known problems and desiring to improve the efficiency and adaptability of such modules.

Conclusion on Obviousness:

Based on the KSR standard, the claims of US11032111 appear obvious in light of the IEEE Std 802.3-2015, general SerDes architectures, widely known adaptive equalization techniques (like LMS and RLS), and the clearly articulated problem of variable channel characteristics in C2M links. A POSA would have been motivated to combine these existing elements and knowledge to improve the efficiency and performance of pre-equalization in high-speed communication systems, particularly in the context of pluggable modules and their diverse operating environments. The selection of initial coefficients from pre-stored registers, followed by further adaptation during a training phase, represents a predictable combination of known elements to achieve a known result (efficient and effective equalization) in a well-understood field.

Generated 5/22/2026, 12:46:38 AM