Prior art — US Patent 12395359

Prior Art Analysis

Based on the citations listed in the patent documentation for US 12,395,359, the following prior art references are most relevant to the claims of the patent. The analysis focuses on the potential for these references to anticipate the independent claims (1, 6, 12, and 14) under 35 U.S.C. § 102. Anticipation requires that a single prior art reference discloses every element of a claim.

US20150092939A1

Full Citation: US Patent Application Publication No. 2015/0092939 A1, "Dark bits to reduce physically unclonable function error rates," published April 2, 2015. Filed September 27, 2013.
Brief Description: This reference describes a method for improving the reliability of a PUF by identifying and excluding unstable bits, referred to as "dark bits." During an enrollment phase, the PUF is read multiple times to identify bits that are not repeatable. The locations of these dark bits are stored. In subsequent operations, these dark bits are masked or ignored, and are not used in the final PUF response. The system may also use error correction codes on the remaining, more stable bits.
Potential Anticipation: This reference does not appear to fully anticipate the claims of US 12,395,359. While it teaches identifying unreliable bits ("dark bits") and storing their locations (similar to a "repair list"), its primary method is to exclude these bits from the response, not replace them with other, reliable "additional output bits" from the PUF as claimed in patent '359. The core inventive step of '359 is the active substitution of erroneous bits with pre-selected, reliable spare bits. US '939 focuses on masking and exclusion. Therefore, it lacks the "determining a match" (S4) and "replacing... with the matching additional output bits" (S6) steps central to all independent claims of patent '359.

US20170149572A1

Full Citation: US Patent Application Publication No. 2017/0149572 A1, "Authenticatable device with reconfigurable physical unclonable functions," published May 25, 2017. Filed May 5, 2014. Assignee: Analog Devices, Inc.
Brief Description: This publication discloses a reconfigurable PUF where the specific set of components (e.g., memory cells) used to generate the PUF response can be changed. If a portion of the PUF becomes unreliable or is compromised, the system can select a different set of components to generate a new PUF response. The device can store multiple "helper data" sets corresponding to different configurations, allowing it to adapt to failures or attacks.
Potential Anticipation: This reference comes closer but likely does not anticipate. It teaches reconfiguring the PUF to avoid unreliable bits, which is conceptually similar to replacement. However, it appears to describe switching to entirely new sets of bits rather than performing a one-to-one replacement of specific erroneous bits with specific "additional output bits" to correct an error while maintaining the original response value. The claims of '359 focus on repairing a specific PUF response to its original, correct state by swapping in a replacement bit that provides the correct value. US '572 seems to generate a new, different response from a different PUF configuration. It lacks the precise steps of detecting an error in a generated response, finding the specific bit(s) at fault, and finding a matching additional bit to restore the original response.

US20190065734A1

Full Citation: US Patent Application Publication No. 2019/0065734 A1, "Error correction circuit for physical unclonable function (puf) circuit," published February 28, 2019. Filed August 28, 2017. Assignee: NXP B.V.
Brief Description: This reference describes an error correction circuit for a PUF. It stores "helper data" that contains syndrome information derived from an error correcting code (ECC) like a Hamming code. When a PUF response is generated, the circuit calculates a new syndrome and compares it to the stored syndrome. The result of this comparison directly identifies the location (index) of any single-bit error. The circuit then corrects the error by flipping the identified erroneous bit.
Potential Anticipation: This reference does not anticipate the claims of US 12,395,359. Its method of correction is to simply flip the value of the erroneous bit (e.g., 0 to 1). It does not teach replacing the faulty response bit with a different, more stable "additional output bit" from the PUF. The inventive step of patent '359 is the permanent substitution of the source of the bit, not just the temporary correction of its value. US '734 does not disclose a "repair list" of matched pairs or the use of spare, reliable bits as permanent replacements.

US9703989B1

Full Citation: US Patent 9,703,989 B1, "Secure physically unclonable function (PUF) error correction," issued July 11, 2017. Filed December 23, 2014. Assignee: Altera Corporation.
Brief Description: This patent details a method for improving PUF stability by identifying unreliable bits during an enrollment phase. The system stores the indices of these unreliable bits. During operation, if the PUF response has errors, error correction codes are first used to fix a certain number of errors. If errors remain, the system can use the stored indices to mask the unreliable bits before a final authentication or key generation step.
Potential Anticipation: Similar to US '939, this reference focuses on identifying and then masking or ignoring unreliable bits rather than replacing them. It does not teach the key steps of claim 1: "determining a match... between each determined erroneous response bit and a selected additional output bit" and "replacing... said erroneous response bits with the matching additional output bits." The method in US '989 is one of exclusion and ECC, not substitution with spare, reliable PUF outputs. Thus, it does not anticipate the independent claims of US 12,395,359.