Patent 11177887

Prior art

Earlier patents, publications, and products that may anticipate or render the claims unpatentable.

Active provider: Google · gemini-2.5-flash

Prior art

Earlier patents, publications, and products that may anticipate or render the claims unpatentable.

✓ Generated

To identify the most relevant prior art for US patent 11177887, I will examine the "Cited By" and "Citations" sections of the patent itself. Since direct access to the USPTO database for live querying is not possible through this interface, I will rely on the provided patent text, which lists these citations.

Most Relevant Prior Art for US Patent 11177887

Based on the provided patent text, the following prior art references are cited:

Patent Citations (Examiner Cited)

  1. US6160647A

    • Full Citation: US6160647A, Stratos Lightwave, Inc., "Optoelectronic transmitter with improved control circuit and laser fault latching"
    • Publication/Filing Date: Priority date: 1997-08-09; Publication date: 2000-12-12
    • Brief Description: This patent describes an optoelectronic transmitter with an improved control circuit and laser fault latching.
    • Potential Anticipation (35 U.S.C. § 102): Without a detailed claim comparison, it's difficult to definitively state which claims of US11177887 are anticipated. However, given its focus on optoelectronic transmitters and control circuits, it could potentially anticipate aspects of claims related to the overall optical subassembly module, its electrical coupling, or the laser arrangement within the TOSA, especially claims 1, 9, and 10 which describe the general optical subassembly module and transceiver.

  2. US20040240803A1

    • Full Citation: US20040240803A1, Rechberger David L., "Use of chip-on-board technology to mount optical transmitting and detecting devices with a protective covering with multiple optical interface options"
    • Publication/Filing Date: Priority date: 1999-11-01; Publication date: 2004-12-02
    • Brief Description: This publication details the use of chip-on-board technology for mounting optical transmitting and detecting devices, including protective coverings and multiple optical interface options.
    • Potential Anticipation (35 U.S.C. § 102): This reference's focus on mounting optical devices using chip-on-board technology could potentially anticipate claims 1, 2, 8, 9, and 10, particularly those relating to the mounting of TOSA modules to a substrate (e.g., "edge mounted to the second mounting region of the substrate" in claim 2) and the overall subassembly structure.

  3. US20030206703A1

    • Full Citation: US20030206703A1, Chiu Liew Chuang, "Transmitters, receivers, and transceivers including an optical bench"
    • Publication/Filing Date: Priority date: 2002-05-01; Publication date: 2003-11-06
    • Brief Description: This publication describes transmitters, receivers, and transceivers that include an optical bench.
    • Potential Anticipation (35 U.S.C. § 102): The concept of an "optical bench" within transceivers could potentially anticipate broader aspects of claims 1, 9, and 10, which generally cover the optical subassembly module and transceiver architecture.

  4. US20060043609A1

    • Full Citation: US20060043609A1, Brennan John M, "Integrated circuit with substantially perpendicular wire bonds"
    • Publication/Filing Date: Priority date: 2004-08-26; Publication date: 2006-03-02
    • Brief Description: This publication discusses an integrated circuit featuring substantially perpendicular wire bonds.
    • Potential Anticipation (35 U.S.C. § 102): This reference directly addresses wire bonds and their orientation. While US11177887 emphasizes reducing the angle of wire bonds (angle θ being less than or equal to 45 degrees, as per claim 6), the prior art's mention of "substantially perpendicular wire bonds" could be a point of distinction or a starting point for the inventive step. It would be highly relevant to claims 5 and 6, which specifically discuss wire bonds and their angle.

  5. US20120267777A1

    • Full Citation: US20120267777A1, Tessera Research Llc, "Multi-chip module with stacked face-down connected dies"
    • Publication/Filing Date: Priority date: 2011-04-22; Publication date: 2012-10-25
    • Brief Description: This publication describes a multi-chip module with stacked face-down connected dies.
    • Potential Anticipation (35 U.S.C. § 102): While not directly about optical components, the concept of stacked and interconnected dies within a multi-chip module could be relevant to the general packaging and interconnection of components within the TOSA modules or on the substrate, potentially anticipating broad structural claims like 1, 2, 9, and 10.

  6. US20140105612A1

    • Full Citation: US20140105612A1, Linkwell Opto-Electronics Corporation, "Optical engine assembly and transceiver using the same"
    • Publication/Filing Date: Priority date: 2012-10-16; Publication date: 2014-04-17
    • Brief Description: This publication describes an optical engine assembly and a transceiver that utilizes it.
    • Potential Anticipation (35 U.S.C. § 102): This reference, dealing with optical engine assemblies and transceivers, is highly relevant to the overall subject matter of US11177887. It could potentially anticipate broad claims relating to the optical subassembly module or transceiver, such as claims 1, 9, and 10.

  7. US20190278035A1

    • Full Citation: US20190278035A1, Kaiam Corp., "Stacked transceiver architecture"
    • Publication/Filing Date: Priority date: 2018-03-09; Publication date: 2019-09-12
    • Brief Description: This publication discloses a stacked transceiver architecture.
    • Potential Anticipation (35 U.S.C. § 102): The concept of a "stacked transceiver architecture" could be relevant to the compact design and arrangement of components within the optical transceiver module, potentially anticipating claims 1, 9, and 10 which describe the general optical subassembly module and transceiver.

Family Cites Families (Examiner Cited)

  1. US6860649B2

    • Full Citation: US6860649B2, Philip J. Edwards, "Transceiver for LC connector"
    • Publication/Filing Date: Priority date: 2000-12-27; Publication date: 2005-03-01
    • Brief Description: This patent describes a transceiver designed for an LC connector.
    • Potential Anticipation (35 U.S.C. § 102): This reference broadly pertains to transceivers, and could generally anticipate claims 1, 9, and 10 concerning the overall optical subassembly and transceiver.

  2. US10044445B2

    • Full Citation: US10044445B2, Applied Optoelectronics, Inc., "Techniques for reducing electrical interconnection losses between a transmitter optical subassembly (TOSA) and associated driver circuitry and an optical transceiver system using the same"
    • Publication/Filing Date: Priority date: 2016-08-31; Publication date: 2018-08-07
    • Brief Description: This patent by the same assignee describes techniques for reducing electrical interconnection losses between a TOSA and driver circuitry. This is directly relevant to the problem US11177887 aims to solve.
    • Potential Anticipation (35 U.S.C. § 102): This patent is highly relevant as it addresses the same problem of reducing electrical interconnection losses in TOSAs. It could potentially anticipate claims 1, 4, 5, 6, 7, 10, 11, and 13, which relate to the TOSA module, LDD, RF terminals, wire bonds, and the goal of reducing their length and improving signal quality. The differences might lie in the specific mechanism for achieving this reduction (e.g., the stepped profile).

  3. US10073229B2

    • Full Citation: US10073229B2, Applied Optoelectronics, Inc., "Transmitter optical subassembly (TOSA) module with integrated welding member for use in optical transmitters or transceivers"
    • Publication/Filing Date: Priority date: 2016-10-26; Publication date: 2018-09-11
    • Brief Description: Another patent by the same assignee, this one describes a TOSA module with an integrated welding member.
    • Potential Anticipation (35 U.S.C. § 102): This reference is relevant to the construction and mounting of TOSA modules. It could potentially anticipate claims related to the TOSA module itself, its body, and how it is coupled to the substrate (e.g., claims 1, 2, 8, and 10), depending on whether the welding member or method of coupling described is pertinent to the edge mounting or recessed mounting features of US11177887.

  4. US10313024B1

    • Full Citation: US10313024B1, Applied Optoelectronics, Inc., "Transmitter optical subassembly with trace routing to provide electrical isolation between power and RF traces"
    • Publication/Filing Date: Priority date: 2018-04-26; Publication date: 2019-06-04
    • Brief Description: Also by the same assignee, this patent focuses on trace routing for electrical isolation within a TOSA.
    • Potential Anticipation (35 U.S.C. § 102): This reference deals with electrical aspects within a TOSA, which could be relevant to the electrical coupling of the TOSA to the substrate. It might anticipate aspects of claims 1, 5, 9, 10, and 11, particularly concerning the electrical interconnection and RF signals.

  5. US10884201B2

    • Full Citation: US10884201B2, Applied Optoelectronics, Inc., "Receptacle configuration to support on-board receiver optical subassembly (ROSA)"
    • Publication/Filing Date: Priority date: 2018-08-02; Publication date: 2021-01-05
    • Brief Description: This patent, again by the same assignee, describes a receptacle configuration for supporting an on-board ROSA.
    • Potential Anticipation (35 U.S.C. § 102): While focused on ROSAs, this patent deals with the "on-board" mounting of optical subassemblies to a substrate, a general theme shared with US11177887. It could potentially anticipate claims 1, 9, and 10, specifically those related to the "on-board" nature of mounting optical subassemblies and the overall transceiver configuration.

Non-Patent Citations (Examiner Cited)

  1. U.S. Office Action dated Dec. 24, 2020, received in U.S. Appl. No. 16/737,414, 9 pgs.
    • Full Citation: U.S. Office Action dated Dec. 24, 2020, received in U.S. Appl. No. 16/737,414, 9 pgs.
    • Publication/Filing Date: Office Action dated 2020-12-24, related to an application filed 2020-01-08 (as noted in the description of US11177887 as a co-pending application).
    • Brief Description: This is an Office Action from a co-pending application related to a "Monitor Photodiode (MPD) Submount for Vertical Mounting and Alignment of Monitoring Photodiodes."
    • Potential Anticipation (35 U.S.C. § 102): This is not prior art in the traditional sense, but an official communication from the USPTO regarding a related application. However, the content of the application (US16/737,414) itself, once published, could serve as prior art for US11177887. Given its title, it would be highly relevant to any claims in US11177887 that detail the MPD, its submount, or its vertical mounting and alignment, such as claims 1, 9, and 10 if read broadly to include such components. The description of US11177887 explicitly states that its stepped profile is equally applicable to other TOSA configurations including designs where an MPD is mounted to the TOSA body (FIG. 7B), which could imply relevance to the MPD submount discussed in the co-pending application.

Generated 5/27/2026, 6:48:55 AM